Commit Graph

464 Commits

Author SHA1 Message Date
Axel Dörfler
c1400fb617 intel_extreme: use VESA EDID info as fallback.
* Only in case retrieving EDID info failed on head A and C.
* Should help with detecting the native resolution for ticket #10878.
2014-06-04 01:02:40 +02:00
Alexander von Gluck IV
e321d716e4 radeon_hd: Add latest generation radeon_hd cards
* These aren't tested, but since we go off of DCE
  versions for a lot of stuff, they may work.
* AMD doens't include market names in their drivers
  anymore, so if we want to label them it will take
  additional work.
2014-05-25 09:03:03 -05:00
Alexander von Gluck IV
339a018112 radeon_hd: Rework dp aux functions to take connector index
* This is less pretty, but we need access to the connector
  to find the HPD gpio pin mask on the card.
* dp_aux communications seem to work again.
* If you have a DisplayPort item attached to your card you
  may want to just unplug it at this point. We attempt DP
  link training and it fails. This failure will also cause
  other monitors to not function as app_server still isn't
  multi-head aware (#10486)
2014-02-03 20:20:13 -06:00
Alexander von Gluck IV
8ebdc440de radeon_hd: Better tracing. Fix DP ack bitwise shift 2014-02-03 06:44:28 +00:00
Adrien Destugues
ef726c687a Intel_extreme: improve i855 support.
https://github.com/druga/haiku-stuff/tree/master/intel_extreme
Rebased against current sources.

* The BIOS video mode sometimes reports a scaled mode instead of the
physical panel dimensions. Get the data from the VBT table as well, and
use it if the reported resolution is bigger.
* On first boot, force the panel native mode so the user doesn't have to
set it manually.
* Only allow a single head at a time on i855gm, as the card can't drive
both heads at the same time.
* Detect when a new requested mode is the same as the current one, and
skip modesetting in that case. Avoids screen flickering when changing
workspaces.
* Fix some cases of misdetecting which pipes to enable
2014-01-17 12:42:20 +01:00
Pawel Dziepak
73ad2473e7 Remove remaining unnecessary 'volatile' qualifiers 2013-11-06 00:03:07 +01:00
Alexander von Gluck IV
42eed3ba69 RadeonHD: Fix incorrect name -> chipset mapping
* Put names and chipsets next to each other to
  help prevent further mismatch.
* Fix potential (but unlikely) string overflow
* CID 611140
2013-07-16 11:20:24 -05:00
Alexander von Gluck IV
991183511b RadeonHD: Drop marketing names
* They are all over the place.. I give up
* Going off of engineering names and DCE is more accurate
* A lot of this info came from the x.org wiki
* I'd like to transition some of the engineering
  name checks to use DCE versions.. they tend to be more
  accurate and exact. (in some cases we can't, but most of
  the time we can)
2013-07-09 12:40:29 -05:00
Alexander von Gluck IV
4ce958fcd4 RadeonHD: Cleanup, new cards
* Fix some incorrect chip codenames
* Introduce a dual gpu flag
* Add some new chipsets and document
  the next generation of chips
2013-06-29 13:18:52 -05:00
Jérôme Duval
21f6b3ea28 agp_gart: switch to phys_addr_t as suggested by Urias and Axel.
* this is a follow-up to hrev45621
2013-05-16 19:01:33 +02:00
Jérôme Duval
c162f52eaa intel_extreme and radeon_hd: some 64 bit fixes 2013-05-04 20:20:33 +02:00
Jérôme Duval
f92b1f2eaf GCC 4.7.x finds that 1 << 31 is a signed integer, use the unsigned notation
* error: narrowing conversion of '-2147483618' from 'int' to 'uint32 {aka long unsigned int}'
 inside { } is ill-formed in C++11
2013-04-26 21:17:33 +02:00
Bill Randle
7d9c1f30f1 radeon_hd: Add Northern Island registers 2013-01-29 12:29:06 -06:00
Bill Randle
7aedc8b3e1 edid_raw: Correct missing bitfield
* edid1_detailed_timing_raw was missing
  a field which threw off the sync bits.
* The result was the monitor will receive
  a different sync polarity than it requested.
  Most monitors handle this, but it is still
  a bug
2013-01-27 12:18:49 -06:00
Alexander von Gluck IV
a2b448a0c1 intel_extreme: Mark IvyBridge as having a PCH
* Modesetting now works on IvyBridge
* Preferred mode needs work though as my chipset
  defaults to 1024x768 vs 1366x768
2012-12-29 00:09:00 +00:00
Alexander von Gluck IV
660ca29ee0 intel_extreme: Add IvyBridge PCIID's
* This needs testing and likely some IvyBridge
  fixups
2012-12-26 11:01:43 -06:00
Ithamar R. Adema
53a59cd99a Fix minor typo 2012-11-22 22:58:24 +01:00
Alexander von Gluck IV
4e7e3e331d radeon_hd: display port improvements
* Remove non-generic radeon dp_get_lane_count
* Set lane count and link rate at set_display_mode
* Pass entire mode to pll_set vs only pixel clock for DP code
* Add helpers for DP config data to common code
* Obtain more correct link rate
2012-08-05 12:15:35 -05:00
Alexander von Gluck IV
694eca3bb6 radeon_hd: Add DP link_train_ce
* First attempts at DisplayPort link training
  clock equalization.
* Add DP define to detect equalization state
* Working towards resolving #8626
2012-08-05 00:01:43 -05:00
Alexander von Gluck IV
f8af317470 radeon_hd: Final round of header cleanup
* This puts the registers in a better state and ensures
  all model dependant defines are prefixed with card series
* Consolidate evergreen defines into single header
2012-07-31 12:10:51 -05:00
Alexander von Gluck IV
93aac98d0a radeon_hd: r5xx to Avivo define cleanup
* Reorganize and clean up card defines
* Fix define spaces
* Unify card naming
* No (real) functional change
2012-07-30 15:57:53 -05:00
Alexander von Gluck IV
8ef0a0d2a6 radeon_hd: Card define cleanup
* Trying to do cleanup on the layout of these headers
2012-07-30 15:57:52 -05:00
Alexander von Gluck IV
45dc5c4664 radeon_hd: Add Southen Island gpu temp sensor code
* Add AMD SI defines in si_reg.h
* Prefix SI registers with SI_
* Tab and space cleanup
2012-07-30 09:45:45 -05:00
Alexander von Gluck IV
0e8316cc90 intel_810: Style cleanup. No functional change
* I think the FunctionNames need to change to function_name
2012-05-30 16:11:09 -05:00
Gerald Zajac
e0ee3b7971 driver: New intel 810 video driver
* Introduced by Gerald Zajac in #8615
* Will need reviewed, tested, and some style cleanup
* Not in images until steps above complete
2012-05-30 15:21:18 -05:00
Alexander von Gluck IV
9e195872df radeon_hd: Begin work on radeon_hd command processor
* First steps at getting card command processor wired
  up to the ring buffers.
* Code doesn't run yet as I have *no* idea what happens
  when these rings are in an invalid state.
2012-04-17 16:10:40 -05:00
Alexander von Gluck IV
0de9d6cdef radeon_hd: Move out some DisplayPort common code
* General DisplayPort functions in common dp.cpp
* DP port information struct in common header
* Please don't use this private accelerant common DP
  code just yet as it is very early.
2012-04-06 13:43:09 -05:00
Alexander von Gluck IV
8dfc5dbb26 radeon_hd: Complete move to common DisplayPort header
* Non-spec DP stuff in accelerant displayport.h
* Common DisplayPort header still has TODO's however
2012-04-04 10:41:34 -05:00
Alexander von Gluck IV
c6799d8ae1 dp_raw: Continued cleanup of DisplayPort common header
* Reduce number of common DP registers in radeon_hd
* Move to bitwise shifts as they will make more
  sense to more people in the long-run
2012-04-03 09:52:21 -05:00
Alexander von Gluck IV
64dcb00f9f radeon_hd: Begin to widdle down DP to common code 2012-04-02 17:00:24 -05:00
Alexander von Gluck IV
37550d80c9 dp_raw: Add AUX communication defines 2012-04-02 15:45:13 -05:00
Alexander von Gluck IV
30d5507541 dp_raw common: Style fix, no change. 2012-04-02 15:36:07 -05:00
Alexander von Gluck IV
4185aa0c8c common header: Add work in progress DisplayPort header
* Obtained via DportV1.1.pdf
* Written based on my Xorg membership
2012-04-02 11:52:36 -05:00
Alexander von Gluck IV
83e3a8ea50 radeon_hd: Start work on proper DP link training
* The AtomBIOS timeout fix has made my DP bridge
  stop working
* The current DisplayPort code is a little lacking
  on DP link training... I think thats the cause.
* This puts the first steps towards DP training
  in place.
* I plan on trying to make some of this DP stuff
  common accelerant stuff after it works.
2012-03-14 06:22:59 -05:00
Alexander von Gluck IV
0a2f1274ff radeon_hd: Update southern islands info
* Add 7770 and 7750 pciid's
* Remove Thames and reorganize code names for SI
  (seems the codenames changed before release)
* Untested as always
2012-02-16 12:05:06 -06:00
Alexander von Gluck IV
249495e284 Add complete set of DRM DisplayPort defines into radeon_hd
* I'd rather this be common code, but I don't have access
  to the DisplayPort specifications. If I added it as common
  code I would want to be 100% it was complete and variables
  were named properly.
* For now putting in radeon_hd private headers
2011-12-14 10:19:00 -06:00
Alexander von Gluck IV
61cf713381 Include file style cleanup, no functional change 2011-12-09 21:26:41 -06:00
Alexander von Gluck IV
cb050a33be Add support for thermal status queries on newer chipsets
* add temperature query support for Juniper, Sumo, Evergreen, and North Islands
* add missing thermal defines for evergreen cards
* northern island cards use the evergreen thermal calculations
2011-11-24 19:42:45 -06:00
Alexander von Gluck IV
0cd972316d Add first hints of thermal monitoring on radeon cards
* add a few missing/needed header defines
* show GPU temp in millidegrees C on r600/r700
* evergreen+ support soon
* function may be moved to driver long term once testing done
2011-11-21 17:54:27 -06:00
Alexander von Gluck IV
0188ca92a5 First attempt at older Radeon card support
* add missing chipset ranges
* add a few more older (X1200) PCI ID's (mostly IGP)
* add code to detect and set frame buffer size on old chipsets
* we get to the connector detection currently and fail due to the
  lack of legacy support on my X1200 IGP
2011-11-12 11:41:31 -06:00
Alexander von Gluck IV
359b926f79 * style cleanup of shared storage names
* return better data on card 
* display chipset flags in screen preflet


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@43226 a95241bf-73f2-0310-859d-f6bbb57e9c96
2011-11-08 19:50:07 +00:00
Alexander von Gluck IV
76a3e009dd * add lots of missing evergreen defines
* evergreen headers are split due to different
  header copyrights
* detect and set up evergreen memory controler
* change the way we manage radeon chipsets to
  more closely match drm driver as the chipset
  model numbers aren't in order and change from
  numbers to names.
* check for evergreen when populating frame buffer
  information.
* style cleanup


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@43225 a95241bf-73f2-0310-859d-f6bbb57e9c96
2011-11-08 17:17:43 +00:00
Alexander von Gluck IV
025d4eed52 * reorganize register definitions
There were a large number if incorrect, duplicated, misplaced
  registers that were leading to bugs in the code.  This is my first
  shot at cleaning them up.  Luckly as we are using AtomBIOS the number
  of registers we need to know about is shrinking.
* remove registers left over from register banging days
* r770 is less then r710, r720 in the drm sources. Fix in code.
* enable newer radeons for testing


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42930 a95241bf-73f2-0310-859d-f6bbb57e9c96
2011-10-28 04:30:54 +00:00
Alexander von Gluck IV
46af81655d * redesign pretty much everything frame buffer related
* don't resize the frame buffer after mapping it.. doesn't make sense
* add memory controller code and program the memory controller for r600
* remove unneeded frame_buffer_int
* don't malloc mc_info, waste of time
* fix scaler setting
* vramStart in mc should be 0... get vertical colored lines however when this
  this is set properly (everything in mc_info is the MC view of FB BAR)
  When vramStart is the FB physical address... i get proper video on some cards
  ... thoughts?


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42924 a95241bf-73f2-0310-859d-f6bbb57e9c96
2011-10-26 04:51:51 +00:00
Alexander von Gluck IV
d5c8ef5d69 * add chipset flags vs isIGP
* we can now utilize these chipset
  flags throughout the driver to better id
  cards and features
* remove leftover BIOS size define from intel skel
* no *real* functional change


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42904 a95241bf-73f2-0310-859d-f6bbb57e9c96
2011-10-24 17:53:22 +00:00
Alexander von Gluck IV
98421bb887 * simplify some trace statements
* add potential support for IGP chipsets
* igp code is *untested* and should work *in theory*
* potentially resolves #8040 / #8046 ?


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42901 a95241bf-73f2-0310-859d-f6bbb57e9c96
2011-10-24 14:58:27 +00:00
Alexander von Gluck IV
a4ba3a0f61 * pass dceMajor and dceMinor to accelerant
* will fix other var names to match style guidelines
  shortly


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42891 a95241bf-73f2-0310-859d-f6bbb57e9c96
2011-10-21 14:32:01 +00:00
Alexander von Gluck IV
9774c58f55 * remove un-used registers that were left over from
base intel_extreme driver long ago
* no functional change


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42880 a95241bf-73f2-0310-859d-f6bbb57e9c96
2011-10-18 18:11:26 +00:00
Alexander von Gluck IV
afbd52f16a * improve framebuffer programming on newer cards
* correct? color mode setting bug
* fix var naming to match style guidelines
* add a few missing register defines


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42879 a95241bf-73f2-0310-859d-f6bbb57e9c96
2011-10-18 05:54:28 +00:00
Michael Lotz
4254fc3705 Fix wrong register values introduced in r42870.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42872 a95241bf-73f2-0310-859d-f6bbb57e9c96
2011-10-16 22:00:30 +00:00