RadeonHD: Cleanup, new cards
* Fix some incorrect chip codenames * Introduce a dual gpu flag * Add some new chipsets and document the next generation of chips
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@ -32,10 +32,11 @@
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// Card chipset flags
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#define CHIP_STD (1 << 0) // Standard chipset
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#define CHIP_IGP (1 << 1) // IGP chipset
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#define CHIP_MOBILE (1 << 2) // Mobile chipset
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#define CHIP_DISCREET (1 << 3) // Discreet chipset
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#define CHIP_APU (1 << 4) // APU chipset
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#define CHIP_X2 (1 << 1) // Dual cpu
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#define CHIP_IGP (1 << 2) // IGP chipset
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#define CHIP_MOBILE (1 << 3) // Mobile chipset
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#define CHIP_DISCREET (1 << 4) // Discreet chipset
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#define CHIP_APU (1 << 5) // APU chipset
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#define DEVICE_NAME "radeon_hd"
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#define RADEON_ACCELERANT_NAME "radeon_hd.accelerant"
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@ -86,16 +87,18 @@ enum radeon_chipset {
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RADEON_PALM, //Fusion APU (NI), Radeon HD 6000
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RADEON_SUMO,
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RADEON_SUMO2,
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RADEON_CAICOS, //Nothern Islands, Radeon HD 6000
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RADEON_CAICOS, //Nothern Islands, Radeon HD 6000 / Low end 7000
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RADEON_TURKS,
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RADEON_BARTS,
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RADEON_CAYMAN,
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RADEON_ANTILLES,
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RADEON_LOMBOK, //Southern Islands, Radeon HD 7000
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RADEON_CAPEVERDE,
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RADEON_CAPEVERDE, //Southern Islands, Radeon HD 7000 aka ARUBA
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RADEON_BONAIRE,
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RADEON_PITCAIRN,
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RADEON_TAHITI,
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RADEON_NEWZEALAND
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RADEON_OLAND, //Sea Islands, Radeon HD 8000
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RADEON_HAINAN, // NO DCE?
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RADEON_CURACAO,
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};
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@ -124,7 +124,7 @@ const struct supported_device {
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{0x9513, 2, 0, RADEON_RV670, CHIP_STD, "Radeon HD 3850 X2"},
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{0x9515, 2, 0, RADEON_RV670, CHIP_STD, "Radeon HD 3850"},
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{0x9501, 2, 0, RADEON_RV670, CHIP_STD, "Radeon HD 3870"},
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{0x950F, 2, 0, RADEON_RV670, CHIP_STD, "Radeon HD 3870 X2"},
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{0x950F, 2, 0, RADEON_RV670, CHIP_STD | CHIP_X2, "Radeon HD 3870 X2"},
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{0x9710, 3, 0, RADEON_RV620, CHIP_IGP, "Radeon HD 4200"},
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{0x9715, 3, 0, RADEON_RV620, CHIP_IGP, "Radeon HD 4250"},
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{0x9712, 3, 0, RADEON_RV620, CHIP_IGP, "Radeon HD 4270"},
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@ -153,15 +153,15 @@ const struct supported_device {
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{0x944e, 3, 1, RADEON_RV770, CHIP_STD, "Radeon HD 4810"},
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{0x944c, 3, 1, RADEON_RV770, CHIP_STD, "Radeon HD 4830"},
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{0x9442, 3, 1, RADEON_RV770, CHIP_STD, "Radeon HD 4850"},
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{0x9443, 3, 1, RADEON_RV770, CHIP_STD, "Radeon HD 4850 X2"},
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{0x9443, 3, 1, RADEON_RV770, CHIP_STD | CHIP_X2, "Radeon HD 4850 X2"},
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{0x94a1, 3, 1, RADEON_RV770, CHIP_IGP, "Radeon HD 4860"},
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{0x9440, 3, 1, RADEON_RV770, CHIP_STD, "Radeon HD 4870"},
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{0x9441, 3, 1, RADEON_RV770, CHIP_STD, "Radeon HD 4870 X2"},
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{0x9441, 3, 1, RADEON_RV770, CHIP_STD | CHIP_X2, "Radeon HD 4870 X2"},
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{0x9460, 3, 1, RADEON_RV770, CHIP_STD, "Radeon HD 4890"},
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// From here on AMD no longer used numeric identifiers
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// Marketing Names: Radeon HD 54xx ~ HD 63xx
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// Marketing Names: Radeon HD 5450 - HD 6320
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// Introduced: 2009
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// Codename: Evergreen
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// Process: 40 nm
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@ -186,7 +186,8 @@ const struct supported_device {
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{0x6899, 4, 0, RADEON_CYPRESS, CHIP_STD, "Radeon HD 5850"},
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{0x6898, 4, 0, RADEON_CYPRESS, CHIP_STD, "Radeon HD 5870"},
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// Hemlock
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{0x689c, 4, 0, RADEON_HEMLOCK, CHIP_STD, "Radeon HD 5900"},
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{0x689c, 4, 0, RADEON_HEMLOCK, CHIP_STD | CHIP_X2, "Radeon HD 5900 X2"},
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{0x689d, 4, 0, RADEON_HEMLOCK, CHIP_STD | CHIP_X2, "Radeon HD 5900 X2"},
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// Fusion APUS
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// Palm
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{0x9804, 4, 1, RADEON_PALM, CHIP_APU, "Radeon HD 6250"},
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@ -209,7 +210,7 @@ const struct supported_device {
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{0x9644, 4, 1, RADEON_SUMO2, CHIP_APU, "Radeon HD 6410D"},
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{0x9645, 4, 1, RADEON_SUMO2, CHIP_APU, "Radeon HD SUMO2 M"},
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// Radeon HD 64xx - HD 69xx
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// Radeon HD 6450 - HD 7670
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// Introduced: 2010
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// Codename: Nothern Islands
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// Process: 40 nm
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@ -244,6 +245,7 @@ const struct supported_device {
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{0x6750, 5, 0, RADEON_TURKS, CHIP_STD, "Radeon HD 6500"},
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{0x6758, 5, 0, RADEON_TURKS, CHIP_STD, "Radeon HD 6670"},
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{0x6759, 5, 0, RADEON_TURKS, CHIP_STD, "Radeon HD 6570/7570"},
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{0x6850, 6, 0, RADEON_TURKS, CHIP_MOBILE, "Radeon HD 7570"},
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// Barts
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{0x673e, 5, 0, RADEON_BARTS, CHIP_STD, "Radeon HD 6790"},
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{0x6739, 5, 0, RADEON_BARTS, CHIP_STD, "Radeon HD 6850"},
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@ -266,12 +268,10 @@ const struct supported_device {
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// Antilles (Top, Dual GPU)
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{0x671d, 5, 0, RADEON_ANTILLES, CHIP_STD, "Radeon HD 6990"},
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// Marketing Names: Radeon HD 74xx - HD 79xx
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// Marketing Names: Radeon HD 7750 - HD 79xx
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// Introduced: Late 2011
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// Codename: Southern Islands
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// Process: 28 nm
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// Lombok?
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{0x6850, 6, 0, RADEON_LOMBOK, CHIP_MOBILE, "Radeon HD 7570"},
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// Cape Verde (TODO: Need to find friendly names)
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{0x6820, 6, 0, RADEON_CAPEVERDE, CHIP_STD, "Radeon HD Verde"},
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{0x6821, 6, 0, RADEON_CAPEVERDE, CHIP_STD, "Radeon HD Verde"},
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@ -292,6 +292,13 @@ const struct supported_device {
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{0x683b, 6, 0, RADEON_CAPEVERDE, CHIP_STD, "Radeon HD Verde"},
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{0x683f, 6, 0, RADEON_CAPEVERDE, CHIP_STD, "Radeon HD 7750"},
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{0x683d, 6, 0, RADEON_CAPEVERDE, CHIP_STD, "Radeon HD 7770"},
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// Bonaire (TODO: Need to find friendly names)
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{0x6649, 6, 0, RADEON_BONAIRE, CHIP_STD, "Radeon HD Bonaire"},
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{0x6650, 6, 0, RADEON_BONAIRE, CHIP_STD, "Radeon HD Bonaire"},
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{0x6651, 6, 0, RADEON_BONAIRE, CHIP_STD, "Radeon HD Bonaire"},
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{0x6658, 6, 0, RADEON_BONAIRE, CHIP_STD, "Radeon HD Bonaire"},
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{0x665c, 6, 0, RADEON_BONAIRE, CHIP_STD, "Radeon HD 7790"},
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{0x665d, 6, 0, RADEON_BONAIRE, CHIP_STD, "Radeon HD Bonaire"},
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// Pitcairn (TODO: Need to find friendly names)
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{0x6800, 6, 0, RADEON_PITCAIRN, CHIP_MOBILE, "Radeon HD 7970"},
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{0x6801, 6, 0, RADEON_PITCAIRN, CHIP_STD, "Radeon HD Pitcairn"},
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@ -312,8 +319,25 @@ const struct supported_device {
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{0x679f, 6, 0, RADEON_TAHITI, CHIP_STD, "Radeon HD Tahiti"},
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{0x679a, 6, 0, RADEON_TAHITI, CHIP_STD, "Radeon HD 7950"},
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{0x6798, 6, 0, RADEON_TAHITI, CHIP_STD, "Radeon HD 7970"},
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// New Zealand (Top, Dual GPU)
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{0x6799, 6, 0, RADEON_TAHITI, CHIP_STD, "Radeon HD 7990"}
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{0x6799, 6, 0, RADEON_TAHITI, CHIP_STD, "Radeon HD 7990"},
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// Marketing Names: Radeon HD 83xx - HD 89xx
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// Introduced: Late 2013
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// Codename: Sea Islands
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// Process: 28 nm
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// Oland DCE 6,4
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// Hainan NO DCE?
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// Curacao ????
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// Marketing Names: Radeon HD 9xxx - HD 9xxx
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// Introduced: 2014?
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// Codename: Volcanic Islands
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// Process: 20 nm
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// Marketing Names: Radeon HD 9xxx - HD 9xxx
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// Introduced: 2015?
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// Codename: Pirate Islands
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// Process: ?? nm
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};
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@ -26,7 +26,7 @@ radeon_thermal_query(radeon_info &info)
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uint32 rawTemp = 0;
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int32 finalTemp = 0;
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if (info.chipsetID >= RADEON_LOMBOK) {
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if (info.chipsetID >= RADEON_CAPEVERDE) {
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rawTemp = (read32(info.registers + SI_CG_MULT_THERMAL_STATUS)
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& SI_CTF_TEMP_MASK) >> SI_CTF_TEMP_SHIFT;
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