found empiricaly that (at least on bcm5700s) the Rx coalesce and bd
counts cannot be updated on-the-fly; attempting to do so (even at
splhigh()) causes weird behaviour.
Instead, add a softc flag to record that the desired softc values for
Rx-interrupt thresholds have changed; check that boolean in the interrupt
routine. If set, apply the new values there and clear the flag.
BGE_MISC_TIMER register definition, and more bit definitions for
HCC-mode. (I would credit individuals, but the attributions are buried
deep in my own tree.)
* lpt device is defined in MI place (dev/ppbus/files.ppbus), dev/ic/lpt.c
is included there too; dev/ic/lpt.c is not included if ppbus is
configured or if there is alternative platform lpt (like for pc532)
* g/c MD lpt definitions and custom puc/upc attachments,
glue moved to conf/files and dev/pci/files.pci respectively; remove
device lpt definition from dev/isa/files.isa
* add ppbus parport attribute, atppc device attachments, adjust plip and lpt
glue
Tested on macppc by HATANO Hiromichi.
Note I guess this bug could be fixed only adding one htole32(),
but I'd rather clean up endianness handling:
- Use htole32() only to accesses against DMA descriptors.
- Don't use uint32_t union member with htole32()/le32toh()
to access uint8_t/uint16_t descriptors.
- Add le32toh() in some DPRINTF.
(XXX: strictly speaking, bus_dmamap_sync() is needed for these DPRINTF)
- wdc_xfer to ata_xfer
- channel_queue to ata_queue
and move them to <dev/ata/atavar.h> so they can be used by non-wdc ATA
controllers. Clean up the member names of these structures while at it.
clients, and a pseudo-device for userspace access.
The attribute is named `opencrypto'. The pseudo-device is renamed to
"crypto", which has a dependency on "opencrypto". The sys/conf/majors
entry and pseudo-device attach entrypoint are updated to match the
new pseudo-device name.
Fast IPsec (sys/netipsec/files.ipsec) now lists a dependency on the
"opencrypto" attribute. Drivers for crypto accelerators (ubsec,
hifn775x) also pull in opencrypto, as providers of opencrypto transforms.
wdc_drvprobe() function. wdc_drvprobe() is used if the controller
does not specify a custom one prior to calling wdcattach(). The
WDC_CAPABILITY_DRVPROBE bit is gone.
for modern PCI SATA controllers to have more. Define a new PCIIDE_MAX_CHANNELS
which to specify the maximum number of channels we support, and use it to
allocate channel resources.
register for proper operation. Add a prototype field in the pciide_channel
for this register and use it as necessary when writing the IDEDMA_CMD
register.
D-Link DGE-530T
Linksys EG1032v2
Linksys EG1064v2
The Linux driver treats all of these the same. Tested with a DGE-530T;
it works, though performance on at least one of my systems is atrocious.
Fix setting of ethernet capabilities into interface capabilites word in
attach routine.
Manual page: note that jumbo support doesn't work and checksum support
doesn't exist.
* add constants to enums
* HAL update: stops panics, fixes ad hoc-mode beacons, some API
changes
* get and use mac/phy/rf front-end revision codes
* add a custom ath(4) ic_node_getrssi callback which does RSSI
averaging
* do not immediately scan, but re-associate after missing beacons.
* bug fix: don't if_init after detach.
* HAL diagnostics ioctl, SIOCGATHDIAG
* send DS parameters element in beacons
* const-ify some pointers
* consolidate rx-filter settings into ath_calcrxfilter
* abstract FreeBSD `ticks', NetBSD `hardclock_ticks' with ATH_TICKS()
* misc. other changes
Fix some non-initialized variables
close the output files when done
Redo the printing for RCS strings so they don't expand in the awk script too
Do proper tests for variables existance before accessing
Verified output from all scripts is identical to original versions
including chips that matched only the asic-revision fallback table.
When dong DMA setup for 5703 and 5704, use the new BGE_ASICREV() macro
to extract the ASIC revision.
True IDE mode. Hinted at by Charles Hannum a while back. This lets
my PCI-Cardbus adapter read SanDisk CF cards much more reliably.
Also bring in a few defines from FreeBSD for some more TI registers and such.
APs to run at "full speed" where before they ran at just 1 or 2Mb/s.
The AP will adapt the data rate for each client based on packet
losses and the received signal strength.
I have also enabled rate adaptation for STA mode and for IBSS mode,
but the hardware gives us less control over the data rate in those
modes.
o Add support for the recent SiS96x chipsets that have a new revision.
That includes a new bit of code to access the EEPROM, since it is
shared with the ieee1394 controller on those chipsets.
Mostly taken from FreeBSD (rev. 1.62 and 1.64 of sys/pci/if_sip.c). I
tried to make the code look less ugly, but couldn't invent documentation.
Fix PR #23481. Thanks to Stephane ENGEL <sengel AT melshake DOT com> for
the report and the cheerful testing.
assert IDEDMA_CTL_INTR for non-DMA commands.
It would be nice to have a way to know if the interrupt was for us or not at
this point, but for now let wdcintr() deal with it.
Problem reported and patch tested by Martti Kuparinen.
in a different fashion. Individually, they have the same functionality,
but their layout is different. An example of such a chipset is
the Promise 203xx.
To be able to deal with this, transform the cmd and dma bus_space handles
into an array of handles, each seperately created with bus_space_subregion.
The code generated by using the extra indirection shouldn't change much,
since the extra indirection is negated by having the offset calculation
already done in bus_space_subregion. E.g.
bus_space_write_4(tag, handle, offset, value)
becomes
bus_space_write_4(tag, handles[offset], 0, value)
Reviewed by Manuel Bouyer. Tested on wdc_isa, wdc_pcmcia, viaide, piixide (i386)
and on cmdide (sparc64).
different meanings for read and write.
This fixes 48kHz playback to SPDIF.
- Fix the problem where the SPDIF output voltage setting (0.5V, 5V)
was swapped. The default value is changed from 0.5V to 5V, which
correctly selects 5V (so the default physical behavior is unchanged).
Should fix PRs kern/16047 and kern/16817
(but not tested since I don't have other SPDIF hardware to test with).
Approved by tshiozak.
- tweak some attach messages
- establish interrupt after all dma resouces are successfully allocated
- wrap an assertion with #ifdef DIAGNOSTIC
- assume NCRCFG2_FE bit is always enabled
- call bus_dmamap_sync for mdldmap at POSTWRITE for consistency
- pass proper dmamapsize for mdldmap
Not tested on 795[56], but compiles and matches FreeBSD-tested diffs.
Suggested by Sam Leffler <sam@errno.com>, as imported into FreeBSD by Sam.
Submitted to FreeBSD by Rajesh Vaidyanath <RVaidyanath@hifn.com>.
This reloads the entire EEPROM, not just the MAC address, which can
cause problems for the host PCI bus under certain circumstances. The
chip already loads the EEPROM at powerup/reset anyway.
XXX: This probably applies to the other Rhine variants too, but I don't
have a data sheet to confirm this behaviour.
copyin() or copyout().
uvm_useracc() tells us whether the mapping permissions allow access to
the desired part of an address space, and many callers assume that
this is the same as knowing whether an attempt to access that part of
the address space will succeed. however, access to user space can
fail for reasons other than insufficient permission, most notably that
paging in any non-resident data can fail due to i/o errors. most of
the callers of uvm_useracc() make the above incorrect assumption. the
rest are all misguided optimizations, which optimize for the case
where an operation will fail. we'd rather optimize for operations
succeeding, in which case we should just attempt the access and handle
failures due to insufficient permissions the same way we handle i/o
errors. since there appear to be no good uses of uvm_useracc(), we'll
just remove it.
* erratum: disable the nocrc RX bit, as it may cause problems on the 570{1-4}.
adjust the length of the incoming packet accordingly to trim it.
* the 5704 has a smaller MBUF_POOL, so set a smaller value
Local change:
* Pass the autoneg force flag to mii_attach. Some PHYs need to be kicked
out of their falsely autoneged 10baseT state with this.
initialized. Update the txp(4) to compensate.
- Statically initialize the TCP timer callout handles in the tcpcb
template. We still use callout_setfunc(), but that call is now much
less expensive. Add a comment that the compiler is likely to unroll
the loop (so don't sweat that it's there).
* don't set the NOCRC bit in the mode control register, it can cause
problems on some chips (from the broadcom errata via FreeBSD)
* implement a fallback quirktable that is searched only using the
major asic revision, so that the driver has a shot at supporting
newer versions properly without modification
* rename asicrev -> chipid, like the FreeBSD driver
According to the ICH datasheets, the flag is unchanged unless resetting
the codec.
The flag is useless after enabling bus mastering. This behavior is common
to all ICH chips. The quirk handling code is removed.
chips. Add the i82541 and i82547 product IDs to the table, #if 0'd
out, for now (there are still more changes to come for these new chips
to work properly).
max memory read byte count in the command register is <= the max designed
memory read byte count in the status register. If not, reset it to the
status register's value. This is necessary because some BIOSes configure
the wrong value, and the wrong value confused some versions of the PCI-X
capable chips.
command register bits offset and shifted appropriatly (PCI-X command
makes up the upper 16 bits of the register that holds the PCI-X cap ID
and next-cap-pointer).
- Define shift counts for max memory read byte count in the command
and status registers.
normal operation, it is required to implement a bug work-around on
some chips.
- When issuing a reset on the i82544, i82540, i82545, i82546,
and i82541, use I/O space, if available, to work around a problem
with the memory write cycle (problem only occurs when issuing
a reset).
