* match more cards (from FreeBSD)
* don't set the NOCRC bit in the mode control register, it can cause problems on some chips (from the broadcom errata via FreeBSD) * implement a fallback quirktable that is searched only using the major asic revision, so that the driver has a shot at supporting newer versions properly without modification * rename asicrev -> chipid, like the FreeBSD driver
This commit is contained in:
fvdl
parent
5286b24afb
commit
4df6c69646
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@ -1,4 +1,4 @@
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/* $NetBSD: if_bge.c,v 1.50 2003/09/05 08:53:23 tron Exp $ */
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/* $NetBSD: if_bge.c,v 1.51 2003/10/23 17:41:59 fvdl Exp $ */
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/*
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* Copyright (c) 2001 Wind River Systems
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@ -79,7 +79,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: if_bge.c,v 1.50 2003/09/05 08:53:23 tron Exp $");
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__KERNEL_RCSID(0, "$NetBSD: if_bge.c,v 1.51 2003/10/23 17:41:59 fvdl Exp $");
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#include "bpfilter.h"
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#include "vlan.h"
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@ -1167,18 +1167,18 @@ bge_chipinit(sc)
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* the low-order MINDMA bits. In addition, the 5704
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* uses a different encoding of read/write watermarks.
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*/
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if (sc->bge_asicrev == BGE_ASICREV_BCM5704_A0 ||
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sc->bge_asicrev == BGE_ASICREV_BCM5704_A1 ||
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sc->bge_asicrev == BGE_ASICREV_BCM5704_A2 ||
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sc->bge_asicrev == BGE_ASICREV_BCM5704_A3) {
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if (sc->bge_chipid == BGE_CHIPID_BCM5704_A0 ||
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sc->bge_chipid == BGE_CHIPID_BCM5704_A1 ||
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sc->bge_chipid == BGE_CHIPID_BCM5704_A2 ||
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sc->bge_chipid == BGE_CHIPID_BCM5704_A3) {
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dma_rw_ctl = BGE_PCI_READ_CMD|BGE_PCI_WRITE_CMD |
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/* should be 0x1f0000 */
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(0x7 << BGE_PCIDMARWCTL_RD_WAT_SHIFT) |
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(0x3 << BGE_PCIDMARWCTL_WR_WAT_SHIFT);
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dma_rw_ctl |= BGE_PCIDMARWCTL_ONEDMA_ATONCE;
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}
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else if ((sc->bge_asicrev >> 28) ==
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(BGE_ASICREV_BCM5703_A0 >> 28)) {
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else if ((sc->bge_chipid >> 28) ==
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(BGE_CHIPID_BCM5703_A0 >> 28)) {
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dma_rw_ctl &= 0xfffffff0;
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dma_rw_ctl |= BGE_PCIDMARWCTL_ONEDMA_ATONCE;
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}
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@ -1191,8 +1191,7 @@ bge_chipinit(sc)
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*/
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CSR_WRITE_4(sc, BGE_MODE_CTL, BGE_DMA_SWAP_OPTIONS|
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BGE_MODECTL_MAC_ATTN_INTR|BGE_MODECTL_HOST_SEND_BDS|
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BGE_MODECTL_NO_RX_CRC|BGE_MODECTL_TX_NO_PHDR_CSUM|
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BGE_MODECTL_RX_NO_PHDR_CSUM);
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BGE_MODECTL_TX_NO_PHDR_CSUM| BGE_MODECTL_RX_NO_PHDR_CSUM);
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/* Get cache line size. */
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cachesize = pci_conf_read(pa->pa_pc, pa->pa_tag, BGE_PCI_CACHESZ);
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@ -1601,7 +1600,7 @@ bge_blockinit(sc)
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#if defined(not_quite_yet)
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/* Linux driver enables enable gpio pin #1 on 5700s */
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if (sc->bge_asicrev == BGE_ASICREV_BCM5700) {
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if (sc->bge_chipid == BGE_CHIPID_BCM5700) {
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sc->bge_local_ctrl_reg |=
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(BGE_MLC_MISCIO_OUT1|BGE_MLC_MISCIO_OUTEN1);
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}
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@ -1676,97 +1675,145 @@ bge_blockinit(sc)
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}
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static const struct bge_revision {
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uint32_t br_asicrev;
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uint32_t br_chipid;
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uint32_t br_quirks;
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const char *br_name;
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} bge_revisions[] = {
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{ BGE_ASICREV_BCM5700_A0,
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{ BGE_CHIPID_BCM5700_A0,
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BGE_QUIRK_LINK_STATE_BROKEN,
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"BCM5700 A0" },
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{ BGE_ASICREV_BCM5700_A1,
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{ BGE_CHIPID_BCM5700_A1,
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BGE_QUIRK_LINK_STATE_BROKEN,
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"BCM5700 A1" },
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{ BGE_ASICREV_BCM5700_B0,
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{ BGE_CHIPID_BCM5700_B0,
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BGE_QUIRK_LINK_STATE_BROKEN|BGE_QUIRK_CSUM_BROKEN|BGE_QUIRK_5700_COMMON,
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"BCM5700 B0" },
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{ BGE_ASICREV_BCM5700_B1,
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{ BGE_CHIPID_BCM5700_B1,
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BGE_QUIRK_LINK_STATE_BROKEN|BGE_QUIRK_5700_COMMON,
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"BCM5700 B1" },
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{ BGE_ASICREV_BCM5700_B2,
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{ BGE_CHIPID_BCM5700_B2,
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BGE_QUIRK_LINK_STATE_BROKEN|BGE_QUIRK_5700_COMMON,
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"BCM5700 B2" },
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/* This is treated like a BCM5700 Bx */
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{ BGE_ASICREV_BCM5700_ALTIMA,
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{ BGE_CHIPID_BCM5700_ALTIMA,
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BGE_QUIRK_LINK_STATE_BROKEN|BGE_QUIRK_5700_COMMON,
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"BCM5700 Altima" },
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{ BGE_ASICREV_BCM5700_C0,
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{ BGE_CHIPID_BCM5700_C0,
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0,
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"BCM5700 C0" },
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{ BGE_ASICREV_BCM5701_A0,
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{ BGE_CHIPID_BCM5701_A0,
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0, /*XXX really, just not known */
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"BCM5701 A0" },
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{ BGE_ASICREV_BCM5701_B0,
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{ BGE_CHIPID_BCM5701_B0,
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BGE_QUIRK_PCIX_DMA_ALIGN_BUG,
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"BCM5701 B0" },
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{ BGE_ASICREV_BCM5701_B2,
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{ BGE_CHIPID_BCM5701_B2,
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BGE_QUIRK_PCIX_DMA_ALIGN_BUG,
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"BCM5701 B2" },
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{ BGE_ASICREV_BCM5701_B5,
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{ BGE_CHIPID_BCM5701_B5,
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BGE_QUIRK_ONLY_PHY_1|BGE_QUIRK_PCIX_DMA_ALIGN_BUG,
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"BCM5701 B5" },
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{ BGE_ASICREV_BCM5703_A0,
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{ BGE_CHIPID_BCM5703_A0,
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0,
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"BCM5703 A0" },
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{ BGE_ASICREV_BCM5703_A1,
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{ BGE_CHIPID_BCM5703_A1,
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0,
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"BCM5703 A1" },
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{ BGE_ASICREV_BCM5703_A2,
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{ BGE_CHIPID_BCM5703_A2,
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BGE_QUIRK_ONLY_PHY_1,
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"BCM5703 A2" },
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{ BGE_ASICREV_BCM5704_A0,
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{ BGE_CHIPID_BCM5704_A0,
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BGE_QUIRK_ONLY_PHY_1,
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"BCM5704 A0" },
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{ BGE_ASICREV_BCM5704_A1,
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{ BGE_CHIPID_BCM5704_A1,
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BGE_QUIRK_ONLY_PHY_1,
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"BCM5704 A1" },
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{ BGE_ASICREV_BCM5704_A2,
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{ BGE_CHIPID_BCM5704_A2,
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BGE_QUIRK_ONLY_PHY_1,
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"BCM5704 A2" },
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{ BGE_ASICREV_BCM5704_A3,
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{ BGE_CHIPID_BCM5704_A3,
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BGE_QUIRK_ONLY_PHY_1,
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"BCM5704 A3" },
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{ BGE_ASICREV_BCM5705_A1,
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{ BGE_CHIPID_BCM5705_A0,
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BGE_QUIRK_ONLY_PHY_1|BGE_QUIRK_5705_CORE,
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"BCM5705 A0" },
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{ BGE_CHIPID_BCM5705_A1,
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BGE_QUIRK_ONLY_PHY_1|BGE_QUIRK_5705_CORE,
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"BCM5705 A1" },
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{ BGE_CHIPID_BCM5705_A2,
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BGE_QUIRK_ONLY_PHY_1|BGE_QUIRK_5705_CORE,
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"BCM5705 A2" },
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{ BGE_CHIPID_BCM5705_A3,
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BGE_QUIRK_ONLY_PHY_1|BGE_QUIRK_5705_CORE,
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"BCM5705 A3" },
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{ 0, 0, NULL }
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};
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/*
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* Some defaults for major revisions, so that newer steppings
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* that we don't know about have a shot at working.
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*/
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static const struct bge_revision bge_majorrevs[] = {
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{ BGE_ASICREV_BCM5700,
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BGE_QUIRK_LINK_STATE_BROKEN,
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"unknown BCM5700" },
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{ BGE_ASICREV_BCM5701,
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BGE_QUIRK_PCIX_DMA_ALIGN_BUG,
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"unknown BCM5701" },
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{ BGE_ASICREV_BCM5703,
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0,
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"unknown BCM5703" },
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{ BGE_ASICREV_BCM5704,
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BGE_QUIRK_ONLY_PHY_1,
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"unknown BCM5704" },
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{ BGE_ASICREV_BCM5705,
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BGE_QUIRK_ONLY_PHY_1|BGE_QUIRK_5705_CORE,
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"unknown BCM5705" },
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{ 0,
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0,
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NULL }
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};
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static const struct bge_revision *
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bge_lookup_rev(uint32_t asicrev)
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bge_lookup_rev(uint32_t chipid)
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{
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const struct bge_revision *br;
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for (br = bge_revisions; br->br_name != NULL; br++) {
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if (br->br_asicrev == asicrev)
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if (br->br_chipid == chipid)
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return (br);
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}
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for (br = bge_majorrevs; br->br_name != NULL; br++) {
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if (br->br_chipid == BGE_ASICREV(chipid))
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return (br);
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}
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@ -1786,56 +1833,96 @@ static const struct bge_product {
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*/
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{ PCI_VENDOR_ALTEON,
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PCI_PRODUCT_ALTEON_BCM5700,
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"Broadcom BCM5700 Gigabit Ethernet" },
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"Broadcom BCM5700 Gigabit Ethernet",
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},
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{ PCI_VENDOR_ALTEON,
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PCI_PRODUCT_ALTEON_BCM5701,
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"Broadcom BCM5701 Gigabit Ethernet" },
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"Broadcom BCM5701 Gigabit Ethernet",
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},
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{ PCI_VENDOR_ALTIMA,
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PCI_PRODUCT_ALTIMA_AC1000,
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"Altima AC1000 Gigabit Ethernet" },
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"Altima AC1000 Gigabit Ethernet",
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},
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{ PCI_VENDOR_ALTIMA,
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PCI_PRODUCT_ALTIMA_AC1001,
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"Altima AC1001 Gigabit Ethernet" },
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"Altima AC1001 Gigabit Ethernet",
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},
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{ PCI_VENDOR_ALTIMA,
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PCI_PRODUCT_ALTIMA_AC9100,
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"Altima AC9100 Gigabit Ethernet" },
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"Altima AC9100 Gigabit Ethernet",
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},
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{ PCI_VENDOR_BROADCOM,
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PCI_PRODUCT_BROADCOM_BCM5700,
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"Broadcom BCM5700 Gigabit Ethernet" },
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"Broadcom BCM5700 Gigabit Ethernet",
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},
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{ PCI_VENDOR_BROADCOM,
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PCI_PRODUCT_BROADCOM_BCM5701,
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"Broadcom BCM5701 Gigabit Ethernet" },
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"Broadcom BCM5701 Gigabit Ethernet",
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},
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{ PCI_VENDOR_BROADCOM,
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PCI_PRODUCT_BROADCOM_BCM5702,
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"Broadcom BCM5702 Gigabit Ethernet" },
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"Broadcom BCM5702 Gigabit Ethernet",
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},
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{ PCI_VENDOR_BROADCOM,
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PCI_PRODUCT_BROADCOM_BCM5702X,
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"Broadcom BCM5702X Gigabit Ethernet" },
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{ PCI_VENDOR_BROADCOM,
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PCI_PRODUCT_BROADCOM_BCM5703,
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"Broadcom BCM5703 Gigabit Ethernet" },
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"Broadcom BCM5703 Gigabit Ethernet",
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},
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{ PCI_VENDOR_BROADCOM,
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PCI_PRODUCT_BROADCOM_BCM5703X,
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"Broadcom BCM5703X Gigabit Ethernet" },
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"Broadcom BCM5703X Gigabit Ethernet",
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},
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{ PCI_VENDOR_BROADCOM,
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PCI_PRODUCT_BROADCOM_BCM5704C,
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"Broadcom BCM5704C Dual Gigabit Ethernet" },
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"Broadcom BCM5704C Dual Gigabit Ethernet",
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},
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{ PCI_VENDOR_BROADCOM,
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PCI_PRODUCT_BROADCOM_BCM5704S,
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"Broadcom BCM5704S Dual Gigabit Ethernet" },
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"Broadcom BCM5704S Dual Gigabit Ethernet",
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},
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{ PCI_VENDOR_BROADCOM,
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PCI_PRODUCT_BROADCOM_BCM5705,
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"Broadcom BCM5705 Gigabit Ethernet",
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},
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{ PCI_VENDOR_BROADCOM,
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PCI_PRODUCT_BROADCOM_BCM5705_ALT,
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"Broadcom BCM5705 Gigabit Ethernet",
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},
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{ PCI_VENDOR_BROADCOM,
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PCI_PRODUCT_BROADCOM_BCM5705M,
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"Broadcom BCM5705M Gigabit Ethernet" },
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"Broadcom BCM5705M Gigabit Ethernet",
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},
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{ PCI_VENDOR_BROADCOM,
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PCI_PRODUCT_BROADCOM_BCM5901,
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"Broadcom BCM5901 Fast Ethernet",
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},
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{ PCI_VENDOR_BROADCOM,
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PCI_PRODUCT_BROADCOM_BCM5901A2,
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"Broadcom BCM5901A2 Fast Ethernet",
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},
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{ PCI_VENDOR_BROADCOM,
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PCI_PRODUCT_BROADCOM_BCM5782,
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"Broadcom BCM5782 Gigabit Ethernet",
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},
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{ PCI_VENDOR_SCHNEIDERKOCH,
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PCI_PRODUCT_SCHNEIDERKOCH_SK_9DX1,
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"SysKonnect SK-9Dx1 Gigabit Ethernet" },
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"SysKonnect SK-9Dx1 Gigabit Ethernet",
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},
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{ PCI_VENDOR_3COM,
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PCI_PRODUCT_3COM_3C996,
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"3Com 3c996 Gigabit Ethernet" },
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"3Com 3c996 Gigabit Ethernet",
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},
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{ 0,
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0,
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|
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@ -2062,18 +2149,18 @@ bge_attach(parent, self, aux)
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* Save ASIC rev. Look up any quirks associated with this
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* ASIC.
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*/
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sc->bge_asicrev =
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sc->bge_chipid =
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pci_conf_read(pa->pa_pc, pa->pa_tag, BGE_PCI_MISC_CTL) &
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BGE_PCIMISCCTL_ASICREV;
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br = bge_lookup_rev(sc->bge_asicrev);
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br = bge_lookup_rev(sc->bge_chipid);
|
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|
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aprint_normal("%s: ", sc->bge_dev.dv_xname);
|
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if (br == NULL) {
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aprint_normal("unknown ASIC 0x%08x", sc->bge_asicrev);
|
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sc->bge_quirks = 0;
|
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aprint_normal("unknown ASIC 0x%08x", sc->bge_chipid);
|
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} else {
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aprint_normal("ASIC %s", br->br_name);
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sc->bge_quirks = br->br_quirks;
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sc->bge_quirks |= br->br_quirks;
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}
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aprint_normal(", Ethernet address %s\n", ether_sprintf(eaddr));
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|
||||
|
|
|
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|
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@ -1,4 +1,4 @@
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/* $NetBSD: if_bgereg.h,v 1.12 2003/08/27 23:13:51 fvdl Exp $ */
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/* $NetBSD: if_bgereg.h,v 1.13 2003/10/23 17:41:59 fvdl Exp $ */
|
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/*
|
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* Copyright (c) 2001 Wind River Systems
|
||||
* Copyright (c) 1997, 1998, 1999, 2001
|
||||
|
|
@ -219,30 +219,45 @@
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|||
(BGE_HIF_SWAP_OPTIONS|BGE_PCIMISCCTL_CLEAR_INTA| \
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BGE_PCIMISCCTL_MASK_PCI_INTR|BGE_PCIMISCCTL_INDIRECT_ACCESS)
|
||||
|
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#define BGE_ASICREV_TIGON_I 0x40000000
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#define BGE_ASICREV_TIGON_II 0x60000000
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#define BGE_ASICREV_BCM5700_A0 0x70000000
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#define BGE_ASICREV_BCM5700_A1 0x70010000
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#define BGE_ASICREV_BCM5700_B0 0x71000000
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#define BGE_ASICREV_BCM5700_B1 0x71020000
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#define BGE_ASICREV_BCM5700_B2 0x71030000
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#define BGE_ASICREV_BCM5700_ALTIMA 0x71040000
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#define BGE_ASICREV_BCM5700_C0 0x72000000
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#define BGE_ASICREV_BCM5701_A0 0x00000000 /* grrrr */
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#define BGE_ASICREV_BCM5701_B0 0x01000000
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#define BGE_ASICREV_BCM5701_B2 0x01020000
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#define BGE_ASICREV_BCM5701_B5 0x01050000
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#define BGE_ASICREV_BCM5703_A0 0x10000000
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#define BGE_ASICREV_BCM5703_A1 0x10010000
|
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#define BGE_ASICREV_BCM5703_A2 0x10020000
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||||
#define BGE_ASICREV_BCM5704_A0 0x20000000
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#define BGE_ASICREV_BCM5704_A1 0x20010000
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#define BGE_ASICREV_BCM5704_A2 0x20020000
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#define BGE_ASICREV_BCM5704_A3 0x20030000
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#define BGE_ASICREV_BCM5705_A0 0x30000000
|
||||
#define BGE_ASICREV_BCM5705_A1 0x30010000
|
||||
#define BGE_ASICREV_BCM5705_A2 0x30020000
|
||||
#define BGE_ASICREV_BCM5705_A3 0x30030000
|
||||
#define BGE_CHIPID_TIGON_I 0x40000000
|
||||
#define BGE_CHIPID_TIGON_II 0x60000000
|
||||
#define BGE_CHIPID_BCM5700_A0 0x70000000
|
||||
#define BGE_CHIPID_BCM5700_A1 0x70010000
|
||||
#define BGE_CHIPID_BCM5700_B0 0x71000000
|
||||
#define BGE_CHIPID_BCM5700_B1 0x71020000
|
||||
#define BGE_CHIPID_BCM5700_B2 0x71030000
|
||||
#define BGE_CHIPID_BCM5700_ALTIMA 0x71040000
|
||||
#define BGE_CHIPID_BCM5700_C0 0x72000000
|
||||
#define BGE_CHIPID_BCM5701_A0 0x00000000 /* grrrr */
|
||||
#define BGE_CHIPID_BCM5701_B0 0x01000000
|
||||
#define BGE_CHIPID_BCM5701_B2 0x01020000
|
||||
#define BGE_CHIPID_BCM5701_B5 0x01050000
|
||||
#define BGE_CHIPID_BCM5703_A0 0x10000000
|
||||
#define BGE_CHIPID_BCM5703_A1 0x10010000
|
||||
#define BGE_CHIPID_BCM5703_A2 0x10020000
|
||||
#define BGE_CHIPID_BCM5704_A0 0x20000000
|
||||
#define BGE_CHIPID_BCM5704_A1 0x20010000
|
||||
#define BGE_CHIPID_BCM5704_A2 0x20020000
|
||||
#define BGE_CHIPID_BCM5704_A3 0x20030000
|
||||
#define BGE_CHIPID_BCM5705_A0 0x30000000
|
||||
#define BGE_CHIPID_BCM5705_A1 0x30010000
|
||||
#define BGE_CHIPID_BCM5705_A2 0x30020000
|
||||
#define BGE_CHIPID_BCM5705_A3 0x30030000
|
||||
|
||||
/* shorthand one */
|
||||
#define BGE_ASICREV(x) ((x) >> 28)
|
||||
#define BGE_ASICREV_BCM5700 0x07
|
||||
#define BGE_ASICREV_BCM5701 0x00
|
||||
#define BGE_ASICREV_BCM5703 0x01
|
||||
#define BGE_ASICREV_BCM5704 0x02
|
||||
#define BGE_ASICREV_BCM5705 0x03
|
||||
|
||||
/* chip revisions */
|
||||
#define BGE_CHIPREV(x) ((x) >> 24)
|
||||
#define BGE_CHIPREV_5700_AX 0x70
|
||||
#define BGE_CHIPREV_5700_BX 0x71
|
||||
#define BGE_CHIPREV_5700_CX 0x72
|
||||
#define BGE_CHIPREV_5701_AX 0x00
|
||||
|
||||
/* PCI DMA Read/Write Control register */
|
||||
#define BGE_PCIDMARWCTL_MINDMA 0x000000FF
|
||||
|
|
@ -2281,7 +2296,7 @@ struct bge_softc {
|
|||
u_int8_t bge_rx_alignment_bug;
|
||||
u_int32_t bge_return_ring_cnt;
|
||||
bus_dma_tag_t bge_dmatag;
|
||||
u_int32_t bge_asicrev;
|
||||
u_int32_t bge_chipid;
|
||||
u_int32_t bge_quirks;
|
||||
u_int32_t bge_local_ctrl_reg;
|
||||
struct bge_ring_data *bge_rdata; /* rings */
|
||||
|
|
|
|||
Loading…
Reference in New Issue