- Correctly handle bit 24 of miscellaneous control register, which has
different meanings for read and write. This fixes 48kHz playback to SPDIF. - Fix the problem where the SPDIF output voltage setting (0.5V, 5V) was swapped. The default value is changed from 0.5V to 5V, which correctly selects 5V (so the default physical behavior is unchanged). Should fix PRs kern/16047 and kern/16817 (but not tested since I don't have other SPDIF hardware to test with). Approved by tshiozak.
This commit is contained in:
itohy
parent
20d207b125
commit
1b7b873248
@ -1,4 +1,4 @@
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/* $NetBSD: cmpci.c,v 1.20 2003/10/25 21:31:43 christos Exp $ */
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/* $NetBSD: cmpci.c,v 1.21 2003/11/22 16:48:14 itohy Exp $ */
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/*
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* Copyright (c) 2000, 2001 The NetBSD Foundation, Inc.
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@ -43,7 +43,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: cmpci.c,v 1.20 2003/10/25 21:31:43 christos Exp $");
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__KERNEL_RCSID(0, "$NetBSD: cmpci.c,v 1.21 2003/11/22 16:48:14 itohy Exp $");
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#if defined(AUDIO_DEBUG) || defined(DEBUG)
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#define DPRINTF(x) if (cmpcidebug) printf x
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@ -98,6 +98,10 @@ static __inline void cmpci_reg_set_4 __P((struct cmpci_softc *,
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int, uint32_t));
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static __inline void cmpci_reg_clear_4 __P((struct cmpci_softc *,
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int, uint32_t));
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static __inline void cmpci_reg_set_reg_misc __P((struct cmpci_softc *,
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uint32_t));
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static __inline void cmpci_reg_clear_reg_misc __P((struct cmpci_softc *,
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uint32_t));
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static int cmpci_rate_to_index __P((int));
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static __inline int cmpci_index_to_rate __P((int));
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static __inline int cmpci_index_to_divider __P((int));
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@ -278,6 +282,9 @@ cmpci_reg_set_4(sc, no, mask)
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int no;
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uint32_t mask;
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{
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/* use cmpci_reg_set_reg_misc() for CMPCI_REG_MISC */
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KDASSERT(no != CMPCI_REG_MISC);
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bus_space_write_4(sc->sc_iot, sc->sc_ioh, no,
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(bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) | mask));
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delay(10);
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@ -289,12 +296,42 @@ cmpci_reg_clear_4(sc, no, mask)
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int no;
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uint32_t mask;
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{
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/* use cmpci_reg_clear_reg_misc() for CMPCI_REG_MISC */
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KDASSERT(no != CMPCI_REG_MISC);
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bus_space_write_4(sc->sc_iot, sc->sc_ioh, no,
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(bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) & ~mask));
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delay(10);
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}
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/*
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* The CMPCI_REG_MISC register needs special handling, since one of
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* its bits has different read/write values.
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*/
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static __inline void
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cmpci_reg_set_reg_misc(sc, mask)
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struct cmpci_softc *sc;
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uint32_t mask;
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{
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sc->sc_reg_misc |= mask;
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bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MISC,
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sc->sc_reg_misc);
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delay(10);
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}
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static __inline void
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cmpci_reg_clear_reg_misc(sc, mask)
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struct cmpci_softc *sc;
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uint32_t mask;
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{
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sc->sc_reg_misc &= ~mask;
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bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MISC,
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sc->sc_reg_misc);
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delay(10);
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}
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/* rate */
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static const struct {
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int rate;
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@ -439,6 +476,10 @@ cmpci_attach(parent, self, aux)
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CMPCI_REG_MPU_BASE, CMPCI_REG_MPU_SIZE, &sc->sc_mpu_ioh) == 0)
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sc->sc_mpudev = config_found(&sc->sc_dev, &aa, audioprint);
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/* get initial value (this is 0 and may be omitted but just in case) */
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sc->sc_reg_misc = bus_space_read_4(sc->sc_iot, sc->sc_ioh,
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CMPCI_REG_MISC) & ~CMPCI_REG_SPDIF48K;
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cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_RESET, 0);
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cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_L, 0);
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cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_R, 0);
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@ -1050,10 +1091,10 @@ cmpci_query_devinfo(handle, dip)
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strcpy(dip->label.name, CmpciNvoltage);
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dip->type = AUDIO_MIXER_ENUM;
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dip->un.e.num_mem = 2;
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strcpy(dip->un.e.member[0].label.name, CmpciNlow_v);
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dip->un.e.member[0].ord = CMPCI_SPDIF_OUT_VOLTAGE_LOW;
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strcpy(dip->un.e.member[1].label.name, CmpciNhigh_v);
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dip->un.e.member[1].ord = CMPCI_SPDIF_OUT_VOLTAGE_HIGH;
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strcpy(dip->un.e.member[0].label.name, CmpciNhigh_v);
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dip->un.e.member[0].ord = CMPCI_SPDIF_OUT_VOLTAGE_HIGH;
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strcpy(dip->un.e.member[1].label.name, CmpciNlow_v);
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dip->un.e.member[1].ord = CMPCI_SPDIF_OUT_VOLTAGE_LOW;
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return 0;
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case CMPCI_MONITOR_DAC:
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dip->mixer_class = CMPCI_SPDIF_CLASS;
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@ -1350,12 +1391,10 @@ cmpci_set_mixer_gain(sc, port)
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case CMPCI_SPDIF_OUT_VOLTAGE:
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if (CMPCI_ISCAP(sc, SPDOUT_VOLTAGE)) {
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if (sc->sc_gain[CMPCI_SPDIF_OUT_VOLTAGE][CMPCI_LR]
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== CMPCI_SPDIF_OUT_VOLTAGE_LOW)
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cmpci_reg_clear_4(sc, CMPCI_REG_MISC,
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CMPCI_REG_5V);
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== CMPCI_SPDIF_OUT_VOLTAGE_HIGH)
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cmpci_reg_clear_reg_misc(sc, CMPCI_REG_5V);
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else
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cmpci_reg_set_4(sc, CMPCI_REG_MISC,
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CMPCI_REG_5V);
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cmpci_reg_set_reg_misc(sc, CMPCI_REG_5V);
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}
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return;
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case CMPCI_SURROUND:
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@ -1371,11 +1410,9 @@ cmpci_set_mixer_gain(sc, port)
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case CMPCI_REAR:
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if (CMPCI_ISCAP(sc, REAR)) {
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if (sc->sc_gain[CMPCI_REAR][CMPCI_LR])
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cmpci_reg_set_4(sc, CMPCI_REG_MISC,
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CMPCI_REG_N4SPK3D);
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cmpci_reg_set_reg_misc(sc, CMPCI_REG_N4SPK3D);
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else
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cmpci_reg_clear_4(sc, CMPCI_REG_MISC,
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CMPCI_REG_N4SPK3D);
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cmpci_reg_clear_reg_misc(sc, CMPCI_REG_N4SPK3D);
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}
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return;
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case CMPCI_INDIVIDUAL:
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@ -1441,13 +1478,13 @@ cmpci_set_out_ports(sc)
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/* SPDIF in select */
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v = sc->sc_gain[CMPCI_SPDIF_IN_SELECT][CMPCI_LR];
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if (v & CMPCI_SPDIFIN_SPDIFIN2)
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cmpci_reg_set_4(sc, CMPCI_REG_MISC, CMPCI_REG_2ND_SPDIFIN);
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cmpci_reg_set_reg_misc(sc, CMPCI_REG_2ND_SPDIFIN);
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else
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cmpci_reg_clear_4(sc, CMPCI_REG_MISC, CMPCI_REG_2ND_SPDIFIN);
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cmpci_reg_clear_reg_misc(sc, CMPCI_REG_2ND_SPDIFIN);
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if (v & CMPCI_SPDIFIN_SPDIFOUT)
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cmpci_reg_set_4(sc, CMPCI_REG_MISC, CMPCI_REG_SPDFLOOPI);
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cmpci_reg_set_reg_misc(sc, CMPCI_REG_SPDFLOOPI);
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else
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cmpci_reg_clear_4(sc, CMPCI_REG_MISC, CMPCI_REG_SPDFLOOPI);
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cmpci_reg_clear_reg_misc(sc, CMPCI_REG_SPDFLOOPI);
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/* playback to ... */
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if (CMPCI_ISCAP(sc, SPDOUT) &&
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@ -1460,18 +1497,18 @@ cmpci_set_out_ports(sc)
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cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF0_ENABLE);
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enspdout = 1;
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if (sc->sc_play.md_divide==CMPCI_REG_RATE_48000)
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cmpci_reg_set_4(sc, CMPCI_REG_MISC,
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CMPCI_REG_SPDIF_48K);
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cmpci_reg_set_reg_misc(sc,
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CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K);
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else
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cmpci_reg_clear_4(sc, CMPCI_REG_MISC,
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CMPCI_REG_SPDIF_48K);
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cmpci_reg_clear_reg_misc(sc,
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CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K);
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} else {
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/* playback to DAC */
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cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1,
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CMPCI_REG_SPDIF0_ENABLE);
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if (CMPCI_ISCAP(sc, SPDOUT_48K))
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cmpci_reg_clear_4(sc, CMPCI_REG_MISC,
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CMPCI_REG_SPDIF_48K);
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cmpci_reg_clear_reg_misc(sc,
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CMPCI_REG_SPDIFOUT_48K | CMPCI_REG_SPDIF48K);
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}
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/* legacy to SPDIF/out or not */
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@ -1,4 +1,4 @@
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/* $NetBSD: cmpcireg.h,v 1.4 2001/11/04 06:57:40 itohy Exp $ */
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/* $NetBSD: cmpcireg.h,v 1.5 2003/11/22 16:48:14 itohy Exp $ */
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/*
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* Copyright (c) 2000, 2001 The NetBSD Foundation, Inc.
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@ -119,9 +119,10 @@
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#define CMPCI_REG_MISC 0x18
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# define CMPCI_REG_2ND_SPDIFIN 0x00000100
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# define CMPCI_REG_SPDIF_48K 0x00008000
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# define CMPCI_REG_SPDIFOUT_48K 0x00008000
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# define CMPCI_REG_FM_ENABLE 0x00080000
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# define CMPCI_REG_SPDFLOOPI 0x00100000
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# define CMPCI_REG_SPDIF48K 0x01000000
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# define CMPCI_REG_5V 0x02000000
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# define CMPCI_REG_N4SPK3D 0x04000000
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@ -1,4 +1,4 @@
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/* $NetBSD: cmpcivar.h,v 1.4 2001/11/04 06:57:40 itohy Exp $ */
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/* $NetBSD: cmpcivar.h,v 1.5 2003/11/22 16:48:14 itohy Exp $ */
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/*
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* Copyright (c) 2000, 2001 The NetBSD Foundation, Inc.
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@ -121,8 +121,8 @@ typedef struct cmpci_dmanode *cmpci_dmapool_t;
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#define CmpciNrear "rear"
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#define CmpciNindividual "individual"
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#define CmpciNreverse "reverse"
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#define CmpciNlow_v "0.5V"
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#define CmpciNhigh_v "5V"
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#define CmpciNlow_v "0.5V"
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#define CmpciNsurround "surround"
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/* record.sorce bitmap (see cmpci_set_in_ports()) */
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@ -158,8 +158,8 @@ typedef struct cmpci_dmanode *cmpci_dmapool_t;
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#define CMPCI_SPDIF_OUT_PLAYBACK_LEGACY 1 /* legacy */
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/* spdif.output.voltage */
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#define CMPCI_SPDIF_OUT_VOLTAGE_LOW 0 /* 0.5V */
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#define CMPCI_SPDIF_OUT_VOLTAGE_HIGH 1 /* 5V */
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#define CMPCI_SPDIF_OUT_VOLTAGE_HIGH 0 /* 5V */
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#define CMPCI_SPDIF_OUT_VOLTAGE_LOW 1 /* 0.5V */
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/* spdif.monitor */
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#define CMPCI_MONDAC_ENABLE 0x01
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@ -230,6 +230,9 @@ struct cmpci_softc {
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int md_divide;
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} sc_play, sc_rec;
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/* value of CMPCI_REG_MISC register */
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uint32_t sc_reg_misc;
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/* mixer */
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uint8_t sc_gain[CMPCI_NDEVS][2];
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#define CMPCI_LEFT 0
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