For ICH4/ICH5, set IOSE flag to make them compatible to old ICHs.
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@ -1,4 +1,4 @@
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/* $NetBSD: auich.c,v 1.51 2003/10/28 22:56:19 mycroft Exp $ */
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/* $NetBSD: auich.c,v 1.52 2003/10/30 19:30:26 kent Exp $ */
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/*-
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* Copyright (c) 2000 The NetBSD Foundation, Inc.
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@ -104,6 +104,9 @@
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* ICH3:http://www.intel.com/design/chipsets/datashts/290716.htm
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* ICH4:http://www.intel.com/design/chipsets/datashts/290744.htm
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* ICH5:http://www.intel.com/design/chipsets/datashts/252516.htm
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* AMD8111:
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* http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/24674.pdf
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* http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/25720.pdf
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*
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* TODO:
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* - Add support for the dedicated microphone input.
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@ -115,7 +118,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: auich.c,v 1.51 2003/10/28 22:56:19 mycroft Exp $");
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__KERNEL_RCSID(0, "$NetBSD: auich.c,v 1.52 2003/10/30 19:30:26 kent Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -389,7 +392,7 @@ auich_attach(struct device *parent, struct device *self, void *aux)
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struct pci_attach_args *pa = aux;
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pci_intr_handle_t ih;
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bus_size_t mix_size, aud_size;
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pcireg_t csr;
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pcireg_t v;
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const char *intrstr;
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const struct auich_devtype *d;
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@ -406,6 +409,18 @@ auich_attach(struct device *parent, struct device *self, void *aux)
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aprint_normal(": %s\n", d->name);
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/*
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* For ICH4/ICH5, make sure the compatible BARs are writable.
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* We can not access all registers of ICH4/ICH5 with NAMBAR
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* and NABMBAR. But they are sufficient for the current driver.
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*/
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if ((d->vendor == PCI_VENDOR_INTEL
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&& d->product == PCI_PRODUCT_INTEL_82801DB_AC)
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|| (d->vendor == PCI_VENDOR_INTEL
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&& d->product == PCI_PRODUCT_INTEL_82801EB_AC)) {
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v = pci_conf_read(pa->pa_pc, pa->pa_tag, ICH_CFG);
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pci_conf_write(pa->pa_pc, pa->pa_tag, ICH_CFG, v | ICH_CFG_IOSE);
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}
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if (pci_mapreg_map(pa, ICH_NAMBAR, PCI_MAPREG_TYPE_IO, 0,
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&sc->iot, &sc->mix_ioh, NULL, &mix_size)) {
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aprint_error("%s: can't map codec i/o space\n",
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@ -421,9 +436,9 @@ auich_attach(struct device *parent, struct device *self, void *aux)
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sc->dmat = pa->pa_dmat;
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/* enable bus mastering */
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csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
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v = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
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pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
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csr | PCI_COMMAND_MASTER_ENABLE);
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v | PCI_COMMAND_MASTER_ENABLE);
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/* Map and establish the interrupt. */
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if (pci_intr_map(pa, &ih)) {
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