asm code which can be built easily in old-ABI and new-ABI environemnts.
In old-ABI, they map to t4-t7, and in new-ABI, they map to a4-a7. This
means that t0-t3,ta0-ta3,t8,t9 are available in both ABIs.
Because ta0-ta3 overlap with arg regs (albeit arg slots which are usually
unused), they should be used only if t0-t3,t8,t9 isn't enough.
- 0x55 for NEC Vr5500. ISA might be MIPS64.
- 0x38 for Toshiba TX79. This has thirty-two 128bit GPRs while
maintaining 32bit only virtual address space. Any of pointer related
registers have 32bit.
kqueue provides a stateful and efficient event notification framework
currently supported events include socket, file, directory, fifo,
pipe, tty and device changes, and monitoring of processes and signals
kqueue is supported by all writable filesystems in NetBSD tree
(with exception of Coda) and all device drivers supporting poll(2)
based on work done by Jonathan Lemon for FreeBSD
initial NetBSD port done by Luke Mewburn and Jason Thorpe
memory fault handler. IRIX uses irix_vm_fault, and all other emulation
use NULL, which means to use uvm_fault.
- While we are there, explicitely set to NULL the uninitialized fields in
struct emul: e_fault and e_sysctl on most ports
- e_fault is used by the trap handler, for now only on mips. In order to avoid
intrusive modifications in UVM, the function pointed by e_fault does not
has exactly the same protoype as uvm_fault:
int uvm_fault __P((struct vm_map *, vaddr_t, vm_fault_t, vm_prot_t));
int e_fault __P((struct proc *, vaddr_t, vm_fault_t, vm_prot_t));
- In IRIX share groups, all the VM space is shared, except one page.
This bounds us to have different VM spaces and synchronize modifications
to the VM space accross share group members. We need an IRIX specific hook
to the page fault handler in order to propagate VM space modifications
caused by page faults.
This merge changes the device switch tables from static array to
dynamically generated by config(8).
- All device switches is defined as a constant structure in device drivers.
- The new grammer ``device-major'' is introduced to ``files''.
device-major <prefix> char <num> [block <num>] [<rules>]
- All device major numbers must be listed up in port dependent majors.<arch>
by using this grammer.
- Added the new naming convention.
The name of the device switch must be <prefix>_[bc]devsw for auto-generation
of device switch tables.
- The backward compatibility of loading block/character device
switch by LKM framework is broken. This is necessary to convert
from block/character device major to device name in runtime and vice versa.
- The restriction to assign device major by LKM is completely removed.
We don't need to reserve LKM entries for dynamic loading of device switch.
- In compile time, device major numbers list is packed into the kernel and
the LKM framework will refer it to assign device major number dynamically.
counters. These counters do not exist on all CPUs, but where they
do exist, can be used for counting events such as dcache misses that
would otherwise be difficult or impossible to instrument by code
inspection or hardware simulation.
pmc(9) is meant to be a general interface. Initially, the Intel XScale
counters are the only ones supported.
Semiconductor Au1x00 series on-chip UARTs. Will be merged with
the original com.c driver once a few issues are tidied up. Main
differences from a standard 16550 UART are:
- separate rxdata and txdata registers
- single 16-bit register for the clock divisor
- "enable uart" register
devices. Currently the serial ports and ethernet MAC have working
drivers, and this has only been physically tested on the Au1000 CPU,
but these devices should work on the Au1100 and Au1500 CPUs too.
processor ID field to donote the CPU core revision and the company
options field do donate the SOC chip type, so we need to add an extra
field to the "pridtab" structure to identify these CPUs.
- accumulating all emulation code (including floating-point) in one place
- steal MachFPInterrupt() back from SOFTFLOAT for use only with interrupts
and traps from *real* FPUs
- introducing MachEmulateInst() as a common dispatch point for all
emulated instructions
- cleaning up emulation dispatch in trap()
Also, while we're here, implement MIPS2 LL/SC/SYNC emulation for MIPS1.
Tested on r3k with and without SOFTFLOAT enabled.
* struct sigacts gets a new sigact_sigdesc structure, which has the
sigaction and the trampoline/version. Version 0 means "legacy kernel
provided trampoline". Other versions are coordinated with machine-
dependent code in libc.
* sigaction1() grows two more arguments -- the trampoline pointer and
the trampoline version.
* A new __sigaction_sigtramp() system call is provided to register a
trampoline along with a signal handler.
* The handler is no longer passed to sensig() functions. Instead,
sendsig() looks up the handler by peeking in the sigacts for the
process getting the signal (since it has to look in there for the
trampoline anyway).
* Native sendsig() functions now select the appropriate trampoline and
its arguments based on the trampoline version in the sigacts.
Changes to libc to use the new facility will be checked in later. Kernel
version not bumped; we will ride the 1.6C bump made recently.
performing the accesses, regardless of the size of the data type
requested. Useful for chips which require fixed-width accesses to all
registers.
Cast arguments printed using %lx to u_long all the time, not just
sometimes.
Include a few extra files here so they don't need to be included by the
files that include this one.
and rename TLB_SHUTDOWN and SOFT_RESET to TS and SR (the abbreviations
in the MIPS documentation).
XXX: this file really needs to be cleaned up one day...
when SA_SIGINFO is used. The IRIX process will hence find the expected
information using the third argument of the signal handler.
We do not provide code and siginfo yet.
ticks over at half the CPU clock speed, and set this flag for the known
CPUs with this behaviour. Better names for this flag gratefully accepted!
Also adjust comment about known R4000/R4400 revisions.
deal with shortages of the VM maps where the backing pages are mapped
(usually kmem_map). Try to deal with this:
* Group all information about the backend allocator for a pool in a
separate structure. The pool references this structure, rather than
the individual fields.
* Change the pool_init() API accordingly, and adjust all callers.
* Link all pools using the same backend allocator on a list.
* The backend allocator is responsible for waiting for physical memory
to become available, but will still fail if it cannot callocate KVA
space for the pages. If this happens, carefully drain all pools using
the same backend allocator, so that some KVA space can be freed.
* Change pool_reclaim() to indicate if it actually succeeded in freeing
some pages, and use that information to make draining easier and more
efficient.
* Get rid of PR_URGENT. There was only one use of it, and it could be
dealt with by the caller.
From art@openbsd.org.
sequence using the reciprocal of the delay divisor to perform the
division.
Set the cp0 compare register so that it doesn't trigger interrupts and
reset the cp0 count register in the hardclock interrupt handler.
and support routines for the Broadcom CFE (Common Firmware Environment).
This code is provided by the Broadband Processor Business Unit at
Broadcom Corp with minor updates by me.
thorpej