Copy the algor bus_dma.c for use as a generic bus_dma implementation for
other MIPS ports.
This commit is contained in:
parent
9690c2293e
commit
7e2ca5e1a8
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@ -0,0 +1,742 @@
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/* $NetBSD: bus_dma.c,v 1.1 2002/03/18 02:32:54 simonb Exp $ */
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/*-
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* Copyright (c) 1997, 1998, 2001 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
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* NASA Ames Research Center.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
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__KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.1 2002/03/18 02:32:54 simonb Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/device.h>
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#include <sys/malloc.h>
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#include <sys/proc.h>
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#include <sys/mbuf.h>
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#include <uvm/uvm_extern.h>
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#include <mips/cache.h>
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#define _MIPS_BUS_DMA_PRIVATE
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#include <machine/bus.h>
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#include <machine/cpu.h>
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#include <machine/locore.h>
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/*
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* Common function for DMA map creation. May be called by bus-specific
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* DMA map creation functions.
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*/
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int
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_bus_dmamap_create(bus_dma_tag_t t, bus_size_t size, int nsegments,
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bus_size_t maxsegsz, bus_size_t boundary, int flags, bus_dmamap_t *dmamp)
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{
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struct mips_bus_dmamap *map;
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void *mapstore;
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size_t mapsize;
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/*
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* Allocate and initialize the DMA map. The end of the map
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* is a variable-sized array of segments, so we allocate enough
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* room for them in one shot.
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*
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* Note we don't preserve the WAITOK or NOWAIT flags. Preservation
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* of ALLOCNOW notifes others that we've reserved these resources,
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* and they are not to be freed.
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*
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* The bus_dmamap_t includes one bus_dma_segment_t, hence
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* the (nsegments - 1).
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*/
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mapsize = sizeof(struct mips_bus_dmamap) +
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(sizeof(bus_dma_segment_t) * (nsegments - 1));
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if ((mapstore = malloc(mapsize, M_DMAMAP,
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(flags & BUS_DMA_NOWAIT) ? M_NOWAIT : M_WAITOK)) == NULL)
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return (ENOMEM);
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memset(mapstore, 0, mapsize);
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map = mapstore;
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map->_dm_size = size;
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map->_dm_segcnt = nsegments;
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map->_dm_maxsegsz = maxsegsz;
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map->_dm_boundary = boundary;
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map->_dm_flags = flags & ~(BUS_DMA_WAITOK|BUS_DMA_NOWAIT);
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map->_dm_proc = NULL;
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map->dm_mapsize = 0; /* no valid mappings */
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map->dm_nsegs = 0;
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*dmamp = map;
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return (0);
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}
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/*
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* Common function for DMA map destruction. May be called by bus-specific
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* DMA map destruction functions.
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*/
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void
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_bus_dmamap_destroy(bus_dma_tag_t t, bus_dmamap_t map)
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{
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free(map, M_DMAMAP);
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}
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extern paddr_t kvtophys(vaddr_t); /* XXX */
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/*
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* Utility function to load a linear buffer. lastaddrp holds state
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* between invocations (for multiple-buffer loads). segp contains
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* the starting segment on entrance, and the ending segment on exit.
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* first indicates if this is the first invocation of this function.
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*/
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static int
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_bus_dmamap_load_buffer(bus_dma_tag_t t, bus_dmamap_t map,
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void *buf, bus_size_t buflen, struct proc *p, int flags, paddr_t *lastaddrp,
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int *segp, int first)
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{
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bus_size_t sgsize;
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bus_addr_t curaddr, lastaddr, baddr, bmask;
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vaddr_t vaddr = (vaddr_t)buf;
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int seg;
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lastaddr = *lastaddrp;
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bmask = ~(map->_dm_boundary - 1);
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for (seg = *segp; buflen > 0 ; ) {
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/*
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* Get the physical address for this segment.
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*/
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if (p != NULL)
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(void) pmap_extract(p->p_vmspace->vm_map.pmap,
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vaddr, &curaddr);
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else
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curaddr = kvtophys(vaddr);
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/*
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* If we're beyond the current DMA window, indicate
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* that and try to fall back onto something else.
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*/
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if (curaddr < t->_physbase ||
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curaddr >= (t->_physbase + t->_wsize))
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return (EINVAL);
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#if 0
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printf("dma: addr 0x%08lx -> 0x%08lx\n", curaddr,
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(curaddr - t->_physbase) + t->_wbase);
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#endif
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curaddr = (curaddr - t->_physbase) + t->_wbase;
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/*
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* Compute the segment size, and adjust counts.
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*/
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sgsize = NBPG - ((u_long)vaddr & PGOFSET);
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if (buflen < sgsize)
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sgsize = buflen;
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if (map->_dm_maxsegsz < sgsize)
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sgsize = map->_dm_maxsegsz;
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/*
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* Make sure we don't cross any boundaries.
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*/
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if (map->_dm_boundary > 0) {
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baddr = (curaddr + map->_dm_boundary) & bmask;
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if (sgsize > (baddr - curaddr))
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sgsize = (baddr - curaddr);
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}
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/*
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* Insert chunk into a segment, coalescing with
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* the previous segment if possible.
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*/
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if (first) {
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map->dm_segs[seg].ds_addr = curaddr;
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map->dm_segs[seg].ds_len = sgsize;
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map->dm_segs[seg]._ds_vaddr = vaddr;
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first = 0;
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} else {
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if (curaddr == lastaddr &&
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(map->dm_segs[seg].ds_len + sgsize) <=
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map->_dm_maxsegsz &&
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(map->_dm_boundary == 0 ||
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(map->dm_segs[seg].ds_addr & bmask) ==
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(curaddr & bmask)))
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map->dm_segs[seg].ds_len += sgsize;
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else {
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if (++seg >= map->_dm_segcnt)
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break;
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map->dm_segs[seg].ds_addr = curaddr;
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map->dm_segs[seg].ds_len = sgsize;
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map->dm_segs[seg]._ds_vaddr = vaddr;
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}
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}
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lastaddr = curaddr + sgsize;
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vaddr += sgsize;
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buflen -= sgsize;
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}
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*segp = seg;
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*lastaddrp = lastaddr;
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/*
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* Did we fit?
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*/
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if (buflen != 0) {
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/*
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* If there is a chained window, we will automatically
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* fall back to it.
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*/
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return (EFBIG); /* XXX better return value here? */
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}
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return (0);
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}
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/*
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* Common function for loading a direct-mapped DMA map with a linear
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* buffer. Called by bus-specific DMA map load functions with the
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* OR value appropriate for indicating "direct-mapped" for that
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* chipset.
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*/
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int
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_bus_dmamap_load(bus_dma_tag_t t, bus_dmamap_t map, void *buf,
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bus_size_t buflen, struct proc *p, int flags)
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{
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paddr_t lastaddr;
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int seg, error;
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/*
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* Make sure that on error condition we return "no valid mappings".
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*/
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map->dm_mapsize = 0;
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map->dm_nsegs = 0;
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if (buflen > map->_dm_size)
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return (EINVAL);
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seg = 0;
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error = _bus_dmamap_load_buffer(t, map, buf, buflen,
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p, flags, &lastaddr, &seg, 1);
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if (error == 0) {
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map->dm_mapsize = buflen;
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map->dm_nsegs = seg + 1;
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map->_dm_proc = p;
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/*
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* For linear buffers, we support marking the mapping
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* as COHERENT.
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*
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* XXX Check TLB entries for cache-inhibit bits?
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*/
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if (buf >= (void *)MIPS_KSEG1_START &&
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buf < (void *)MIPS_KSEG2_START)
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map->_dm_flags |= MIPS_DMAMAP_COHERENT;
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}
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return (error);
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}
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/*
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* Like _bus_dmamap_load(), but for mbufs.
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*/
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int
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_bus_dmamap_load_mbuf(bus_dma_tag_t t, bus_dmamap_t map,
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struct mbuf *m0, int flags)
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{
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paddr_t lastaddr;
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int seg, error, first;
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struct mbuf *m;
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/*
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* Make sure that on error condition we return "no valid mappings."
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*/
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map->dm_mapsize = 0;
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map->dm_nsegs = 0;
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#ifdef DIAGNOSTIC
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if ((m0->m_flags & M_PKTHDR) == 0)
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panic("_bus_dmamap_load_mbuf: no packet header");
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#endif
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if (m0->m_pkthdr.len > map->_dm_size)
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return (EINVAL);
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first = 1;
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seg = 0;
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error = 0;
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for (m = m0; m != NULL && error == 0; m = m->m_next) {
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error = _bus_dmamap_load_buffer(t, map,
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m->m_data, m->m_len, NULL, flags, &lastaddr, &seg, first);
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first = 0;
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}
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if (error == 0) {
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map->dm_mapsize = m0->m_pkthdr.len;
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map->dm_nsegs = seg + 1;
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map->_dm_proc = NULL; /* always kernel */
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}
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return (error);
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}
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/*
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* Like _bus_dmamap_load(), but for uios.
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*/
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int
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_bus_dmamap_load_uio(bus_dma_tag_t t, bus_dmamap_t map,
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struct uio *uio, int flags)
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{
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paddr_t lastaddr;
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int seg, i, error, first;
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bus_size_t minlen, resid;
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struct proc *p = NULL;
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struct iovec *iov;
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caddr_t addr;
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/*
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* Make sure that on error condition we return "no valid mappings."
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*/
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map->dm_mapsize = 0;
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map->dm_nsegs = 0;
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resid = uio->uio_resid;
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iov = uio->uio_iov;
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if (uio->uio_segflg == UIO_USERSPACE) {
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p = uio->uio_procp;
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#ifdef DIAGNOSTIC
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if (p == NULL)
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panic("_bus_dmamap_load_uio: "
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"USERSPACE but no proc");
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#endif
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}
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first = 1;
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seg = 0;
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error = 0;
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for (i = 0; i < uio->uio_iovcnt && resid != 0 && error == 0; i++) {
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/*
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* Now at the first iovec to load. Load each iovec
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* until we have exhausted the residual count.
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*/
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minlen = resid < iov[i].iov_len ? resid : iov[i].iov_len;
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addr = (caddr_t)iov[i].iov_base;
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error = _bus_dmamap_load_buffer(t, map,
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addr, minlen, p, flags, &lastaddr, &seg, first);
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first = 0;
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resid -= minlen;
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}
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if (error == 0) {
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map->dm_mapsize = uio->uio_resid;
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map->dm_nsegs = seg + 1;
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map->_dm_proc = p;
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}
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return (error);
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}
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/*
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* Like _bus_dmamap_load(), but for raw memory.
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*/
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int
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_bus_dmamap_load_raw(bus_dma_tag_t t, bus_dmamap_t map,
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bus_dma_segment_t *segs, int nsegs, bus_size_t size, int flags)
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{
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panic("_bus_dmamap_load_raw: not implemented");
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}
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/*
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* Common function for unloading a DMA map. May be called by
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* chipset-specific DMA map unload functions.
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*/
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void
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_bus_dmamap_unload(bus_dma_tag_t t, bus_dmamap_t map)
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{
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/*
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* No resources to free; just mark the mappings as
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* invalid.
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*/
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map->dm_mapsize = 0;
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map->dm_nsegs = 0;
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map->_dm_flags &= ~MIPS_DMAMAP_COHERENT;
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}
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/*
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* Common function for DMA map synchronization. May be called
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* by chipset-specific DMA map synchronization functions.
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*
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* This version works with the virtually-indexed, write-back cache
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* found in the MIPS-3/MIPS-4 CPUs available for the Algorithmics.
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*/
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void
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_bus_dmamap_sync(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset,
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bus_size_t len, int ops)
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{
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bus_size_t minlen;
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bus_addr_t addr;
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int i, useindex;
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/*
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* Mixing PRE and POST operations is not allowed.
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*/
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if ((ops & (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE)) != 0 &&
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(ops & (BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE)) != 0)
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panic("_bus_dmamap_sync: mix PRE and POST");
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#ifdef DIAGNOSTIC
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if (offset >= map->dm_mapsize)
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panic("_bus_dmamap_sync: bad offset %lu (map size is %lu)",
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offset, map->dm_mapsize);
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if (len == 0 || (offset + len) > map->dm_mapsize)
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panic("_bus_dmamap_sync: bad length");
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#endif
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/*
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* Since we're dealing with a virtually-indexed, write-back
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* cache, we need to do the following things:
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*
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* PREREAD -- Invalidate D-cache. Note we might have
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* to also write-back here if we have to use an Index
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* op, or if the buffer start/end is not cache-line aligned.
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*
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* PREWRITE -- Write-back the D-cache. If we have to use
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* an Index op, we also have to invalidate. Note that if
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* we are doing PREREAD|PREWRITE, we can collapse everyhing
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* into a single op.
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*
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* POSTREAD -- Nothing.
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*
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* POSTWRITE -- Nothing.
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*/
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/*
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* Flush the write buffer.
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* XXX Is this always necessary?
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*/
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wbflush();
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ops &= (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
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if (ops == 0)
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return;
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/*
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* If the mapping is of COHERENT DMA-safe memory, no cache
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* flush is necessary.
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*/
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if (map->_dm_flags & MIPS_DMAMAP_COHERENT)
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return;
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/*
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* If the mapping belongs to the kernel, or it belongs
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* to the currently-running process (XXX actually, vmspace),
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* then we can use Hit ops. Otherwise, Index ops.
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*
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* This should be true the vast majority of the time.
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*/
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if (__predict_true(map->_dm_proc == NULL || map->_dm_proc == curproc))
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useindex = 0;
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else
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useindex = 1;
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for (i = 0; i < map->dm_nsegs && len != 0; i++) {
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/* Find the beginning segment. */
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if (offset >= map->dm_segs[i].ds_len) {
|
||||
offset -= map->dm_segs[i].ds_len;
|
||||
continue;
|
||||
}
|
||||
|
||||
/*
|
||||
* Now at the first segment to sync; nail
|
||||
* each segment until we have exhausted the
|
||||
* length.
|
||||
*/
|
||||
minlen = len < map->dm_segs[i].ds_len - offset ?
|
||||
len : map->dm_segs[i].ds_len - offset;
|
||||
|
||||
addr = map->dm_segs[i]._ds_vaddr;
|
||||
|
||||
#ifdef BUS_DMA_DEBUG
|
||||
printf("bus_dmamap_sync: flushing segment %d "
|
||||
"(0x%lx+%lx, 0x%lx+0x%lx) (olen = %ld)...", i,
|
||||
addr, offset, addr, offset + minlen - 1, len);
|
||||
#endif
|
||||
|
||||
/*
|
||||
* If we are forced to use Index ops, it's always a
|
||||
* Write-back,Invalidate, so just do one test.
|
||||
*/
|
||||
if (__predict_false(useindex)) {
|
||||
mips_dcache_wbinv_range_index(addr + offset, minlen);
|
||||
#ifdef BUS_DMA_DEBUG
|
||||
printf("\n");
|
||||
#endif
|
||||
offset = 0;
|
||||
len -= minlen;
|
||||
continue;
|
||||
}
|
||||
|
||||
switch (ops) {
|
||||
case BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE:
|
||||
mips_dcache_wbinv_range(addr + offset, minlen);
|
||||
break;
|
||||
|
||||
case BUS_DMASYNC_PREREAD:
|
||||
#if 1
|
||||
mips_dcache_wbinv_range(addr + offset, minlen);
|
||||
#else
|
||||
mips_dcache_inv_range(addr + offset, minlen);
|
||||
#endif
|
||||
break;
|
||||
|
||||
case BUS_DMASYNC_PREWRITE:
|
||||
mips_dcache_wb_range(addr + offset, minlen);
|
||||
break;
|
||||
}
|
||||
#ifdef BUS_DMA_DEBUG
|
||||
printf("\n");
|
||||
#endif
|
||||
offset = 0;
|
||||
len -= minlen;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Common function for DMA-safe memory allocation. May be called
|
||||
* by bus-specific DMA memory allocation functions.
|
||||
*/
|
||||
int
|
||||
_bus_dmamem_alloc(bus_dma_tag_t t, bus_size_t size, bus_size_t alignment,
|
||||
bus_size_t boundary, bus_dma_segment_t *segs, int nsegs, int *rsegs,
|
||||
int flags)
|
||||
{
|
||||
|
||||
return (_bus_dmamem_alloc_range(t, size, alignment, boundary,
|
||||
segs, nsegs, rsegs, flags, t->_physbase,
|
||||
t->_physbase + t->_wsize));
|
||||
}
|
||||
|
||||
/*
|
||||
* Allocate physical memory from the given physical address range.
|
||||
* Called by DMA-safe memory allocation methods.
|
||||
*/
|
||||
int
|
||||
_bus_dmamem_alloc_range(bus_dma_tag_t t, bus_size_t size, bus_size_t alignment,
|
||||
bus_size_t boundary, bus_dma_segment_t *segs, int nsegs, int *rsegs,
|
||||
int flags, paddr_t low, paddr_t high)
|
||||
{
|
||||
paddr_t curaddr, lastaddr;
|
||||
struct vm_page *m;
|
||||
struct pglist mlist;
|
||||
int curseg, error;
|
||||
|
||||
/* Always round the size. */
|
||||
size = round_page(size);
|
||||
|
||||
/*
|
||||
* Allocate pages from the VM system.
|
||||
*/
|
||||
TAILQ_INIT(&mlist);
|
||||
error = uvm_pglistalloc(size, low, high, alignment, boundary,
|
||||
&mlist, nsegs, (flags & BUS_DMA_NOWAIT) == 0);
|
||||
if (error)
|
||||
return (error);
|
||||
|
||||
/*
|
||||
* Compute the location, size, and number of segments actually
|
||||
* returned by the VM code.
|
||||
*/
|
||||
m = mlist.tqh_first;
|
||||
curseg = 0;
|
||||
lastaddr = segs[curseg].ds_addr = VM_PAGE_TO_PHYS(m);
|
||||
segs[curseg].ds_len = PAGE_SIZE;
|
||||
m = m->pageq.tqe_next;
|
||||
|
||||
for (; m != NULL; m = m->pageq.tqe_next) {
|
||||
curaddr = VM_PAGE_TO_PHYS(m);
|
||||
#ifdef DIAGNOSTIC
|
||||
if (curaddr < low || curaddr >= high) {
|
||||
printf("uvm_pglistalloc returned non-sensical"
|
||||
" address 0x%lx\n", curaddr);
|
||||
panic("_bus_dmamem_alloc");
|
||||
}
|
||||
#endif
|
||||
if (curaddr == (lastaddr + PAGE_SIZE))
|
||||
segs[curseg].ds_len += PAGE_SIZE;
|
||||
else {
|
||||
curseg++;
|
||||
segs[curseg].ds_addr = curaddr;
|
||||
segs[curseg].ds_len = PAGE_SIZE;
|
||||
}
|
||||
lastaddr = curaddr;
|
||||
}
|
||||
|
||||
*rsegs = curseg + 1;
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
/*
|
||||
* Common function for freeing DMA-safe memory. May be called by
|
||||
* bus-specific DMA memory free functions.
|
||||
*/
|
||||
void
|
||||
_bus_dmamem_free(bus_dma_tag_t t, bus_dma_segment_t *segs, int nsegs)
|
||||
{
|
||||
struct vm_page *m;
|
||||
bus_addr_t addr;
|
||||
struct pglist mlist;
|
||||
int curseg;
|
||||
|
||||
/*
|
||||
* Build a list of pages to free back to the VM system.
|
||||
*/
|
||||
TAILQ_INIT(&mlist);
|
||||
for (curseg = 0; curseg < nsegs; curseg++) {
|
||||
for (addr = segs[curseg].ds_addr;
|
||||
addr < (segs[curseg].ds_addr + segs[curseg].ds_len);
|
||||
addr += PAGE_SIZE) {
|
||||
m = PHYS_TO_VM_PAGE(addr);
|
||||
TAILQ_INSERT_TAIL(&mlist, m, pageq);
|
||||
}
|
||||
}
|
||||
|
||||
uvm_pglistfree(&mlist);
|
||||
}
|
||||
|
||||
/*
|
||||
* Common function for mapping DMA-safe memory. May be called by
|
||||
* bus-specific DMA memory map functions.
|
||||
*/
|
||||
int
|
||||
_bus_dmamem_map(bus_dma_tag_t t, bus_dma_segment_t *segs, int nsegs,
|
||||
size_t size, caddr_t *kvap, int flags)
|
||||
{
|
||||
vaddr_t va;
|
||||
bus_addr_t addr;
|
||||
int curseg;
|
||||
|
||||
/*
|
||||
* If we're only mapping 1 segment, use K0SEG, to avoid
|
||||
* TLB thrashing.
|
||||
*/
|
||||
if (nsegs == 1) {
|
||||
if (flags & BUS_DMA_COHERENT)
|
||||
*kvap = (caddr_t)MIPS_PHYS_TO_KSEG1(segs[0].ds_addr);
|
||||
else
|
||||
*kvap = (caddr_t)MIPS_PHYS_TO_KSEG0(segs[0].ds_addr);
|
||||
return (0);
|
||||
}
|
||||
|
||||
size = round_page(size);
|
||||
|
||||
va = uvm_km_valloc(kernel_map, size);
|
||||
|
||||
if (va == 0)
|
||||
return (ENOMEM);
|
||||
|
||||
*kvap = (caddr_t)va;
|
||||
|
||||
for (curseg = 0; curseg < nsegs; curseg++) {
|
||||
for (addr = segs[curseg].ds_addr;
|
||||
addr < (segs[curseg].ds_addr + segs[curseg].ds_len);
|
||||
addr += NBPG, va += NBPG, size -= NBPG) {
|
||||
if (size == 0)
|
||||
panic("_bus_dmamem_map: size botch");
|
||||
pmap_enter(pmap_kernel(), va, addr,
|
||||
VM_PROT_READ | VM_PROT_WRITE,
|
||||
PMAP_WIRED | VM_PROT_READ | VM_PROT_WRITE);
|
||||
}
|
||||
}
|
||||
pmap_update(pmap_kernel());
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
/*
|
||||
* Common function for unmapping DMA-safe memory. May be called by
|
||||
* bus-specific DMA memory unmapping functions.
|
||||
*/
|
||||
void
|
||||
_bus_dmamem_unmap(bus_dma_tag_t t, caddr_t kva, size_t size)
|
||||
{
|
||||
|
||||
#ifdef DIAGNOSTIC
|
||||
if ((u_long)kva & PGOFSET)
|
||||
panic("_bus_dmamem_unmap");
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Nothing to do if we mapped it with KSEG0 or KSEG1 (i.e.
|
||||
* not in KSEG2).
|
||||
*/
|
||||
if (kva >= (caddr_t)MIPS_KSEG0_START &&
|
||||
kva < (caddr_t)MIPS_KSEG2_START)
|
||||
return;
|
||||
|
||||
size = round_page(size);
|
||||
uvm_km_free(kernel_map, (vaddr_t)kva, size);
|
||||
}
|
||||
|
||||
/*
|
||||
* Common functin for mmap(2)'ing DMA-safe memory. May be called by
|
||||
* bus-specific DMA mmap(2)'ing functions.
|
||||
*/
|
||||
paddr_t
|
||||
_bus_dmamem_mmap(bus_dma_tag_t t, bus_dma_segment_t *segs, int nsegs,
|
||||
off_t off, int prot, int flags)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < nsegs; i++) {
|
||||
#ifdef DIAGNOSTIC
|
||||
if (off & PGOFSET)
|
||||
panic("_bus_dmamem_mmap: offset unaligned");
|
||||
if (segs[i].ds_addr & PGOFSET)
|
||||
panic("_bus_dmamem_mmap: segment unaligned");
|
||||
if (segs[i].ds_len & PGOFSET)
|
||||
panic("_bus_dmamem_mmap: segment size not multiple"
|
||||
" of page size");
|
||||
#endif
|
||||
if (off >= segs[i].ds_len) {
|
||||
off -= segs[i].ds_len;
|
||||
continue;
|
||||
}
|
||||
|
||||
return (mips_btop((caddr_t)segs[i].ds_addr + off));
|
||||
}
|
||||
|
||||
/* Page not found. */
|
||||
return (-1);
|
||||
}
|
Loading…
Reference in New Issue