make this compile and work with MIPS3_5900.
This commit is contained in:
uch
parent
7e8becd64d
commit
552fdb7e1b
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@ -1,4 +1,4 @@
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/* $NetBSD: locore.h,v 1.59 2002/03/05 15:36:51 simonb Exp $ */
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/* $NetBSD: locore.h,v 1.60 2002/03/11 16:39:39 uch Exp $ */
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/*
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* Copyright 1996 The Board of Trustees of The Leland Stanford
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@ -219,7 +219,7 @@ extern long *mips_locoresw[];
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#define MachTLBUpdate mips1_TLBUpdate
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#define wbflush() mips1_wbflush()
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#define proc_trampoline mips1_proc_trampoline
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#elif !defined(MIPS1) && defined(MIPS3) && !defined(MIPS32) && !defined(MIPS64)
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#elif !defined(MIPS1) && defined(MIPS3) && !defined(MIPS32) && !defined(MIPS64) && !defined(MIPS3_5900)
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#define MachSetPID mips3_SetPID
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#define MIPS_TBIAP() mips3_TBIAP(mips_num_tlb_entries)
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#define MIPS_TBIS mips3_TBIS
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@ -241,6 +241,13 @@ extern long *mips_locoresw[];
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#define MachTLBUpdate mips64_TLBUpdate
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#define proc_trampoline mips64_proc_trampoline
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#define wbflush() mips64_wbflush()
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#elif !defined(MIPS1) && defined(MIPS3) && !defined(MIPS32) && !defined(MIPS64) && defined(MIPS3_5900)
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#define MachSetPID mips5900_SetPID
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#define MIPS_TBIAP() mips5900_TBIAP(mips_num_tlb_entries)
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#define MIPS_TBIS mips5900_TBIS
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#define MachTLBUpdate mips5900_TLBUpdate
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#define proc_trampoline mips5900_proc_trampoline
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#define wbflush() mips5900_wbflush()
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#else
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#define MachSetPID (*(mips_locore_jumpvec.setTLBpid))
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#define MIPS_TBIAP() (*(mips_locore_jumpvec.TBIAP))(mips_num_tlb_entries)
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@ -1,4 +1,4 @@
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/* $NetBSD: db_interface.c,v 1.41 2002/03/05 15:43:25 simonb Exp $ */
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/* $NetBSD: db_interface.c,v 1.42 2002/03/11 16:39:40 uch Exp $ */
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/*
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* Mach Operating System
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@ -350,7 +350,11 @@ db_tlbdump_cmd(db_expr_t addr, int have_addr, db_expr_t count, char *modif)
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for (i = 0; i < mips_num_tlb_entries; i++) {
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#if defined(MIPS3)
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#if defined(MIPS3_5900)
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mips5900_TLBRead(i, &tlb);
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#else
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mips3_TLBRead(i, &tlb);
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#endif
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#elif defined(MIPS32)
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mips32_TLBRead(i, &tlb);
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#elif defined(MIPS64)
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@ -1,4 +1,4 @@
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/* $NetBSD: locore_mips3.S,v 1.76 2002/03/05 15:50:59 simonb Exp $ */
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/* $NetBSD: locore_mips3.S,v 1.77 2002/03/11 16:39:40 uch Exp $ */
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/*
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* Copyright (c) 1997 Jonathan Stone (hereinafter referred to as the author)
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@ -150,6 +150,7 @@
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*----------------------------------------------------------------------------
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*/
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LEAF(mips3_wbflush)
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XLEAF(mips5900_wbflush)
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XLEAF(mips32_wbflush)
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XLEAF(mips64_wbflush)
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nop
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@ -1,4 +1,4 @@
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/* $NetBSD: mipsX_subr.S,v 1.1 2002/03/05 15:51:00 simonb Exp $ */
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/* $NetBSD: mipsX_subr.S,v 1.2 2002/03/11 16:39:40 uch Exp $ */
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/*
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* Copyright 2002 Wasabi Systems, Inc.
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@ -242,6 +242,11 @@
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#define MIPSX(name) mips3_/**/name
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#endif
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#if defined(MIPS3_5900)
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#undef MIPSX
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#define MIPSX(name) mips5900_/**/name
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#endif
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#if defined(MIPS32)
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#define MIPSX(name) mips32_/**/name
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#endif
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@ -1,4 +1,4 @@
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/* $NetBSD: mips_machdep.c,v 1.123 2002/03/06 13:10:22 tsutsui Exp $ */
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/* $NetBSD: mips_machdep.c,v 1.124 2002/03/11 16:39:40 uch Exp $ */
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/*
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* Copyright 2002 Wasabi Systems, Inc.
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@ -120,7 +120,7 @@
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#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
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__KERNEL_RCSID(0, "$NetBSD: mips_machdep.c,v 1.123 2002/03/06 13:10:22 tsutsui Exp $");
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__KERNEL_RCSID(0, "$NetBSD: mips_machdep.c,v 1.124 2002/03/11 16:39:40 uch Exp $");
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#include "opt_cputype.h"
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#include "opt_compat_netbsd.h"
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@ -170,11 +170,12 @@ extern long *mips1_locoresw[];
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#if defined(MIPS3)
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#if defined(MIPS3_5900)
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static void r5900_vector_init(void);
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extern long *mips5900_locoresw[];
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#else
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static void mips3_vector_init(void);
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#endif
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extern long *mips3_locoresw[];
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#endif
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#endif
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#if defined(MIPS32)
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static void mips32_vector_init(void);
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@ -436,6 +437,7 @@ mips1_vector_init(void)
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#endif /* MIPS1 */
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#if defined(MIPS3)
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#ifndef MIPS3_5900 /* XXX */
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/*
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* MIPS III locore function vector
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*/
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@ -448,7 +450,6 @@ static const mips_locore_jumpvec_t mips3_locore_vec =
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mips3_wbflush,
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};
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#ifndef MIPS3_5900 /* XXX */
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static void
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mips3_vector_init(void)
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{
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@ -827,15 +828,19 @@ mips_vector_init(void)
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#if defined(MIPS3)
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case CPU_ARCH_MIPS3:
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case CPU_ARCH_MIPS4:
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#ifdef MIPS3_5900 /* XXX */
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mips3_cp0_wired_write(0);
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mips5900_TBIA(mips_num_tlb_entries);
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mips3_cp0_wired_write(MIPS3_TLB_WIRED_UPAGES);
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r5900_vector_init();
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memcpy(mips_locoresw, mips5900_locoresw, sizeof(mips_locoresw));
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#else /* MIPS3_5900 */
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mips3_cp0_wired_write(0);
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mips3_TBIA(mips_num_tlb_entries);
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mips3_cp0_wired_write(MIPS3_TLB_WIRED_UPAGES);
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#ifdef MIPS3_5900 /* XXX */
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r5900_vector_init();
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#else
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mips3_vector_init();
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#endif /* MIPS3_5900 */
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memcpy(mips_locoresw, mips3_locoresw, sizeof(mips_locoresw));
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#endif /* MIPS3_5900 */
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break;
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#endif
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#ifdef MIPS32
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@ -1,4 +1,4 @@
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/* $NetBSD: trap.c,v 1.168 2002/03/05 15:55:41 simonb Exp $ */
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/* $NetBSD: trap.c,v 1.169 2002/03/11 16:39:40 uch Exp $ */
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/*
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* Copyright (c) 1988 University of Utah.
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@ -44,7 +44,7 @@
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#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
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__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.168 2002/03/05 15:55:41 simonb Exp $");
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__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.169 2002/03/11 16:39:40 uch Exp $");
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#include "opt_cputype.h" /* which mips CPU levels do we support? */
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#include "opt_ktrace.h"
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@ -1036,13 +1036,13 @@ static struct { void *addr; char *name;} names[] = {
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#endif /* MIPS1 */
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/* XXX simonb: need mips32 and mips64 checks here too */
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#ifdef MIPS3 /* r4000 family (mips-III cpu) */
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#if defined(MIPS3) && !defined(MIPS3_5900) /* r4000 family (mips-III cpu) */
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Name(mips3_KernGenException),
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Name(mips3_UserGenException),
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Name(mips3_SystemCall),
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Name(mips3_KernIntr),
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Name(mips3_UserIntr),
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#endif /* MIPS3 */
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#endif /* MIPS3 && !MIPS3_5900 */
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Name(mips_idle),
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Name(cpu_switch),
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