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30828 Commits

Author SHA1 Message Date
bjh21 9bb7807c7b Remove fpu_model from struct _cpu. Instead, have initialise_arm_fpe() 
printf() the FPE version number itself.
 2002-03-10 11:32:00 +00:00
bjh21 63231772e8 Add a ci_dev element to struct cpu_info, pointing to the device that 
corresponds to the CPU.
 2002-03-10 11:06:01 +00:00
takemura 41e10f2ddf Attached vrpiu at vrc4173bcu. 2002-03-10 10:13:31 +00:00
uch 9a0d81c6cc use IOM_RAM_BEGIN macro instead of ram_start. 2002-03-10 07:46:51 +00:00
uch 672baca18b proc0 and page table intialize routines are moved to sh3_machdep.c 2002-03-10 07:46:12 +00:00
uch f9201a1606 common part are moved to sh3/include/param.h 2002-03-10 07:45:31 +00:00
takemura 794600ce92 Attached vrkiu at vrc4173bcu. 2002-03-10 07:24:52 +00:00
augustss 1d7626cdd5 Make icu_intr_disestablish() actually work. 2002-03-10 03:15:24 +00:00
reinoud 6d18a99125 Fix port-acorn32/15850: machdep.booted_kernel on acorn32 is incorrect. 
This has been on my TODO list for some time and i found it time to fix it
since its pretty simple to do.

The patch checks if the kernel is booted from the `UnixFS' RISC OS filing
system (case unimportant) and if so interprets its name to get the unix
file name the kernel has. If it doesn't see this prefix it will asume its
just called `netbsd'
 2002-03-10 01:28:19 +00:00
bjh21 60219ba2a6 Kill the fpu_flags element from struct _cpu. It was only ever set to 0 
anyway.
 2002-03-10 00:44:09 +00:00
bjh21 01b68bd7de Clean up inline assembler. Rather than saving R0, copying FPSR to R0, 
copying it to the output register and then restoring R0, just copy the
FPSR straight to the output.
 2002-03-10 00:09:24 +00:00
bjh21 aeece3b5bd Remove the cpu_model member from struct _cpu, and just use the cpu_model 
variable directly.  While we're at it, make cpu_model rather larger.
 2002-03-09 23:49:15 +00:00
chs bd2a5f591d switch all mpc6xx powerpc ports to NEWPMAP by default. 
the old pmap is still available with the OLDPMAP option.
 2002-03-09 23:35:56 +00:00
bjh21 09dd49a342 Remove the cpu_class element from struct _cpu, and make it a local variable 
in identify_arm_cpu(), since it's almost unused elsewhere.

Change the detection of bugged StrongARMs to use the cpu ID rather than the
class.  This turns "almost" into "entirely".
 2002-03-09 23:24:11 +00:00
scw 3d958e8959 Add CACHELINESIZE for the benefit of lib/libkern/arch/powerpc/bzero.S. 2002-03-09 23:02:57 +00:00
bjh21 1c1e3f8439 Replace cpu_id and cpu_ctrl in struct _cpu with ci_cpuid and ci_ctrl in 
struct cpu_info.  Also kill the cpuctrl global while we're here, and make
identify_arm_cpu() take a struct cpu_info * as an argument alongside the CPU
number.
 2002-03-09 21:30:57 +00:00
bjh21 20917f120c Move arm700bugcount into stuct cpu_info, and attach it in 
identify_master_cpu().
 2002-03-09 19:11:20 +00:00
matt e8db553326 Change LABELOFFSET to 0 to be more compatible with other MBR style ports. 2002-03-09 01:15:22 +00:00
thorpej a180cee23b Pool deals fairly well with physical memory shortage, but it doesn't 
deal with shortages of the VM maps where the backing pages are mapped
(usually kmem_map).  Try to deal with this:

* Group all information about the backend allocator for a pool in a
  separate structure.  The pool references this structure, rather than
  the individual fields.
* Change the pool_init() API accordingly, and adjust all callers.
* Link all pools using the same backend allocator on a list.
* The backend allocator is responsible for waiting for physical memory
  to become available, but will still fail if it cannot callocate KVA
  space for the pages.  If this happens, carefully drain all pools using
  the same backend allocator, so that some KVA space can be freed.
* Change pool_reclaim() to indicate if it actually succeeded in freeing
  some pages, and use that information to make draining easier and more
  efficient.
* Get rid of PR_URGENT.  There was only one use of it, and it could be
  dealt with by the caller.

From art@openbsd.org.
 2002-03-08 20:48:27 +00:00
uch dc55dc2c73 remove unneeded code and files. 2002-03-08 13:22:11 +00:00
uch babf2e5892 cpu_swapout() moved to cpu.h 2002-03-08 13:12:10 +00:00
chs 759dc33636 make this compile without DDB. 2002-03-08 06:03:50 +00:00
simonb abf4139889 Include libkern.h for strcmp() prototype. 2002-03-08 01:36:34 +00:00
bjh21 dcdd6be3c3 Correct definitions of various control register bits. 2002-03-07 23:16:44 +00:00
bjh21 08f3639e04 Add a comment explaining why I use -ffixed-r14 (though actually I'm not sure 
it's necessary).
Add -mshort-load-words, since that's safe on all arm26 systems.
 2002-03-07 23:15:23 +00:00
thorpej 069a559c65 Remove some files that no longer exist. 2002-03-07 19:34:37 +00:00
matt 7053887d27 Change LABELOFFSET to 0 to be compatible most other MBR using ports. 2002-03-07 19:15:46 +00:00
simonb 4fecd5ec85 Add an entry for evbmips. 
Add an RCSid to the top of the file.
 2002-03-07 14:48:23 +00:00
simonb 31e40c8ce1 A port to the MIPS Malta evaluation board. Currently supports the 
MIPS32 4Kc CPU board, with support for the MIPS64 5Kc and the QED RM5261
CPU boards to follow.

The cs4281 audio hasn't been tested, there are some interrupt problems
with onboard the pciide, but all other on-board peripherals work.

The evbmips port will support more MIPS evaluation boards in the future.
 2002-03-07 14:43:56 +00:00
wiz 0f2823f594 Add commented out option OFB_ENABLE_CACHE (speeds up text display on 
the console).
 2002-03-07 13:10:12 +00:00
simonb ee374e2f14 Remove the -O0 workaround for nfs_bio.c - the in-tree toolchain builds 
this properly.
 2002-03-06 23:50:42 +00:00
mhitch d65798ca1d Add media support (such as it is), manual is all you get. 2002-03-06 22:07:39 +00:00
tsutsui 98c71d1fdd Fix calculation of dma segment length 
when the DVMA range is crossing the boundary.
Approved by eeh, and fixes port-sparc64/15200.
 2002-03-06 17:12:51 +00:00
tsutsui 3fdc4d2b1d Set correct count in spifi_read_count(). 2002-03-06 16:50:34 +00:00
uch 39425a7420 fix bug of TMU0 interrupt priority level setting. (my previous commit broke it.) 2002-03-06 15:03:21 +00:00
uch a752b69bfa make this compile with DIAGNOSTIC 2002-03-06 15:02:04 +00:00
uch f35aa9c904 don't attach bivideo. 2002-03-06 15:01:05 +00:00
uch 3d0f70f7fc remove ite8181video's bivideo dependency. 2002-03-06 15:00:04 +00:00
tsutsui 3c8b0446fe Change type of dumpmag to u_int32_t since it is actually 
a 32bit unsigned magic number.
As per discussion on tech-kern, and fixes port-sparc64/11949.
 2002-03-06 13:10:18 +00:00
chris 09b5f7b740 Mostly style changes to stop us directly referencing tqh_first, and use TAILQ_FIRST instead. Based on rev 1.130 of the i386 pmap.c. 2002-03-06 10:55:21 +00:00
simonb 1c904f9d33 Use MIPS_PHYS_TO_KSEG1 instead of cfe's PHYS_TO_K1 macro. 2002-03-06 09:32:04 +00:00
simonb 4025359daa cgd notes that we shouldn't use the CPU xtal for calculating wall-clock 
time - but as yet we don't attach the RTC becuase it's on an SMbus.
One for later...
 2002-03-06 08:02:12 +00:00
simonb 52bf6c669b Neaten slightly. 2002-03-06 07:51:02 +00:00
simonb 2bf916e97d Implement a clkread() function for microtime() using a multu/mfhi 
sequence using the reciprocal of the delay divisor to perform the
division.
Set the cp0 compare register so that it doesn't trigger interrupts and
reset the cp0 count register in the hardclock interrupt handler.
 2002-03-06 07:47:57 +00:00
simonb 86cb239e4f Add a "clkread" function to the systemsw. 2002-03-06 07:35:13 +00:00
simonb 465e846051 Calculate the reciprocal of the divisor delay. From the comments: 
To implement a more accurate microtime using the CP0 COUNT
	register we need to divide that register by the number of
	cycles per MHz.  But...

	DIV and DIVU are expensive on MIPS (eg 75 clocks on the
	R4000).  MULT and MULTU are only 12 clocks on the same CPU.
	On the SB1 these appear to be 40-72 clocks for DIV/DIVU and 3
	clocks for MUL/MULTU.

	The strategy we use to to calculate the reciprical of cycles
	per MHz, scaled by 1<<32.  Then we can simply issue a MULTU
	and pluck of the HI register and have the results of the
	division.
 2002-03-06 07:34:36 +00:00
simonb feb24029e7 Add the offset of ci_divisor_delay in struct cpu_info. 2002-03-06 07:32:15 +00:00
simonb 78c9211fca Add a field for the reciprocal of the divisor delay for use by microtime. 2002-03-06 07:31:38 +00:00
nathanw 3be9fbe42e Move #include <dev/sysmon/sysmonvar.h> inside #ifdef _KERNEL. 2002-03-06 06:37:17 +00:00
simonb be6459cce6 Use the divisor delay from curcpu() in the implementation of delay(). 2002-03-06 03:29:16 +00:00
simonb 8eb960909e Determine and display the CPU clock frequency from the "System 
Identification and Revision Register", and set the frequency
related variables in curcpu info structure.
 2002-03-06 03:27:34 +00:00
simonb 3fe666190f Wrap long line and remove a bogus XXX comment. 2002-03-06 03:25:09 +00:00
simonb f3e2fe6731 Add entry for sbmips. 2002-03-06 02:42:30 +00:00
simonb 4b7a128684 A basic port to the Broadcom/SiByte SB1250 evaluation board (the 
"swarm").  Other SB-cpu boards will be supported by this port in
the future.

Includes support for on-chip ethernet and serial.  Many features
still missing - notably SMP, PCI/LDT and IDE.

This code is provided by the Broadband Processor Business Unit at
Broadcom Corp with minor updates by me.
 2002-03-06 02:13:37 +00:00
simonb 2c68c156c5 Only include <sys/exec_ecoff.h> if EXEC_ECOFF is defined. 
Note that ELF is mandatory.
 2002-03-06 00:22:09 +00:00
simonb 3ab34324e9 Remove a few unneeded include files. 2002-03-06 00:05:06 +00:00
simonb 1b5ddfe411 Add support for the on-chip peripherals on the Broadcom SiByte SB1250 CPU 
and support routines for the Broadcom CFE (Common Firmware Environment).

This code is provided by the Broadband Processor Business Unit at
Broadcom Corp with minor updates by me.
 2002-03-05 23:46:40 +00:00
eeh 2f0ba3e1a2 More walnut-isms. 2002-03-05 22:02:25 +00:00
thorpej 84be4d4719 Fix size/padding of .data. From Nick. 2002-03-05 21:26:11 +00:00
briggs 257f8fe26f Add BAT_G for EUMB (incl. I/O) space. Per matt@netbsd.org's macppc change. 2002-03-05 19:06:38 +00:00
shiba 081fae3ddb Fix up a bug which PB150 shuts down when one boots up in progress. 
PB150 will work with SCSI disk. But we cannot use an internal IDE
disk yet.

Reviewed by briggs
 2002-03-05 17:39:25 +00:00
simonb 8b5599e7ce Remove HPCMIPS_FLUSHCACHE_XXX debug code. 2002-03-05 16:16:45 +00:00
simonb 0d0a449d80 mips/mips/fp.S is in mips/conf/files.mips now. 2002-03-05 16:16:03 +00:00
simonb 4c27f5f8f7 mips/mips/fp.S is in mips/conf/files.mips now. 2002-03-05 16:14:57 +00:00
simonb fd77e40b6b Provide a L2 cache configuration function. 2002-03-05 16:12:35 +00:00
simonb 713adcd0e8 Use new cache coherency attribute macro. 2002-03-05 16:11:57 +00:00
simonb f1dbc97679 Not used anymore. 2002-03-05 16:08:55 +00:00
simonb 811ee92532 Add support for MIPS32 and MIPS64 architectures: 
- Build mips3/5900/32/64 support subroutines.
 - Move arch/mips/mips/fp.S to central location.
 - Move NOFPU to opt_cputype.h.
 2002-03-05 16:08:00 +00:00
simonb f340c57568 Values related to the MIPS32/MIPS64 Privileged Resource Architecture 
(from Broadcom Corp).
 2002-03-05 16:07:10 +00:00
simonb 9ac7c86a0f Adjust for 5900 include file changes. 2002-03-05 16:06:04 +00:00
simonb 3f2f4c9bf6 r5900_vector_init() is in mips_machdep.c now. 2002-03-05 16:05:26 +00:00
simonb dd756c0ca5 Rename <mips/r5900/cpuregs.h> to <mips/r5900regs.h> and remove some 
content no longer needed.
 2002-03-05 16:04:57 +00:00
simonb fcdc111c1a Cosmestic changes (more like the mips3+ code). 2002-03-05 16:03:22 +00:00
simonb c5d34b4371 Remove the number of TLB entries for different rx39 CPUs - this info 
is in the table in mips_machdep.c now.
 2002-03-05 16:02:48 +00:00
simonb c6bcfb2589 Add support for MIPS32 and MIPS64 architectures: 
- Move away from using CPUISMIPS3; use MIPS_HAS_R4K_MMU instead.
 - Bump the Sysmap size a little for large-memory machines.
XXX: still need work, especially in pmap_procwr().
 2002-03-05 16:01:25 +00:00
simonb 0f9c00fc2e Add support for MIPS32 and MIPS64 architectures: 
- Move away from using CPUISMIPS3; use MIPS_HAS_R4K_MMU instead.
 - ANSIfy.
 2002-03-05 15:57:20 +00:00
simonb fa9c08ab16 Remove HPCMIPS_FLUSHCACHE_XXX debug code. 
Remove old unused exception frame unwind code.
Change a MIPS3 check to a MIPS3_PLUS check.
ANSIfy.
 2002-03-05 15:55:41 +00:00
simonb 278bfc1c02 Add support for MIPS32 and MIPS64 architectures: 
- move away from using CPUISMIPS3; use MIPS_HAS_CLOCK instead.
 2002-03-05 15:54:33 +00:00
simonb 351c1c16a6 Add support for MIPS32 and MIPS64 architectures: 
- Use a table-driven CPU detection algorithm instead of multiple
   case statements.
 - Add MIPS32/64 feature detection using the architected CP0 registers
   (from Broadcom Corp).
 - Call MD mips_machdep_cache_config() function if
   __HAVE_MIPS_MACHDEP_CACHE_CONFIG is defined - used to set up the
   L2 cache on some ports.
 2002-03-05 15:53:00 +00:00
simonb ba8e2e82e4 Add support for MIPS32 and MIPS64 architectures: 
- Remove all mmu-related code that may use 32 register on mips32-style
   implementatios and move them to mipsX_subr.S - which is then included
   from mips{3,32,64,5900}_subr.S with various control defines enabled.
 - Remove local cache instruction flags
 - Add badaddr64 (from Broadcom Corp).
 2002-03-05 15:50:59 +00:00
simonb 9ed4fd257f Change a MIPS3 check to a MIPS3_PLUS check. 
XXX: I'm not 100% sure of the intent of this code - it would seem that
 it needs a run-time check of CPU ISA to be completely correct...
 2002-03-05 15:48:31 +00:00
simonb d62813603c Check userland address and address alignent as two separate checks. 
Fix for when mips_reg_t is 64-bits.
ANSIfy.
 2002-03-05 15:46:51 +00:00
simonb fe86ad150e Change MIPS3 checks to MIPS3_PLUS checks (XXX - still bogus!). 2002-03-05 15:44:40 +00:00
simonb c9a3bd8900 Add support for MIPS32 and MIPS64 architectures: 
- Move away from using CPUISMIPS3; use MIPS_HAS_R4K_MMU instead.
 - Add a command to dump cp0 state.
 2002-03-05 15:43:25 +00:00
simonb 9b785c48f3 Cache ops for MIPS32/64 cpus. 2002-03-05 15:42:50 +00:00
simonb 0446046fde Add MIPS32/64 cache setup code (from Broadcom Corp). 2002-03-05 15:42:21 +00:00
simonb cae6e0e516 Prototypes for MIPS32/64 cache ops. 2002-03-05 15:41:48 +00:00
simonb 0ff59237ca Change a MIPS3 check to a MIPS3_PLUS check (XXX - still bogus!). 2002-03-05 15:41:14 +00:00
simonb 01422aae5c Add support for MIPS32 and MIPS64 architectures: 
- move away from using CPUISMIPS3; use MIPS_HAS_CLOCK instead.
 2002-03-05 15:40:10 +00:00
simonb 1d05db445d Add support for MIPS32 and MIPS64 architectures: 
- Move away from using CPUISMIPS3; use MIPS_HAS_R4K_MMU instead.
 2002-03-05 15:39:31 +00:00
simonb 934c4ba555 Add support for MIPS32 and MIPS64 architectures: 
Remove the unused PSL_USERCLR and BASEPRI macros.
 2002-03-05 15:38:33 +00:00
simonb b255c47737 Add support for MIPS32 and MIPS64 architectures: 
Better cache coherency attribute macros (from Broadcom Corp).
 2002-03-05 15:37:32 +00:00
simonb f38d391749 Add support for MIPS32 and MIPS64 architectures: 
- Add mips32 and mips64 locore function prototypes.
 - Add mips3_lw_a64() and mips3_sw_a64() for access data at any
   64bit address (from Broadcom Corp).
 - Add Broadcom and Sandcraft CPU company ids.
 2002-03-05 15:36:51 +00:00
simonb 2fab526863 Add support for MIPS32 and MIPS64 architectures: 
- Add XKPHYS macros (from Broadcom Corp).
 - Add some r5900 register bit definitions.
 - Add extra exception vector addresses for mips32/mips64 and r5900.
 - Make the mips cp0 register definitions available from both asm and C.
 - Add some Alchemy and Sandcraft CPU ids.
 - Add r3000, tx39xx and r4x00 CPU revision ids.
 - Remove defines for the number of TLBs on some CPUs.
 2002-03-05 15:35:22 +00:00
simonb 60fe625bd0 Add support for MIPS32 and MIPS64 architectures: 
- Clean up (somewhat) mips1 vs mips3+ configuration.
   XXX:  this is still quite messy.
 - Add cpu frequency info to struct cpu_info.
 - ANSIfy.
 2002-03-05 15:34:04 +00:00
simonb ef0fcacb94 ANSIfy. 2002-03-05 15:12:58 +00:00
simonb 8070cbd848 Add 4way 16/32-byte-line cache op primitives. 2002-03-05 14:32:26 +00:00
simonb e8e49d677b Don't explicitly depend locore_*.S and fp.S on assym.h - this is done 
for all .S files in /sys/conf/Makefile.kern.inc.
 2002-03-05 14:28:31 +00:00
simonb 7bd5992f7a Fix for when we have 64 bit registers enabled for userland (but still 
using the o32 API).
 2002-03-05 14:23:50 +00:00
simonb 4a931bedb8 KNF whitespace. 2002-03-05 14:21:32 +00:00
simonb 59f53aab95 The 64-bit safe, ILP32 o32 model is safe with the current stdarg 
implementation.
 2002-03-05 14:18:12 +00:00
simonb 836b7ec262 Include <machine/cdefs.h> to select 32/64bit APIs. 2002-03-05 14:17:16 +00:00
simonb b2fb45331b ANSIfy. 2002-03-05 14:08:43 +00:00
simonb 58faa5f0ca Clean up #ifdef checks a little. 2002-03-05 14:08:07 +00:00
wiz 92a8da0e0d 'securyty' looks nice. Sadly, it's wrong. 2002-03-05 13:59:13 +00:00
simonb 9bcc70fa1d Don't cast argument to ffs() to long. 
Per discussion on port-alpha, noticed by Robert Elz.
 2002-03-05 09:40:38 +00:00
thorpej 5658662324 * Make pmap_is_{modified,referenced}() macros in pmap.h that just 
test the attributes in the vm_page_md directly.
* Clean up pmap_clear_{modified,referenced}().
* Delete now-unused pmap_testbit().
 2002-03-05 04:48:03 +00:00
thorpej a92da3d4a5 Switch back to using vm_page_md (thanks chuq for finding the bug 
in the code that made it unstable before!)
 2002-03-05 04:19:59 +00:00
itojun ac36f7cb2c bring in latest ALTQ from kjc. ALTQify some of the drivers. 2002-03-05 04:12:57 +00:00
simonb d224e9dcc0 Indent by tab and not two spaces. 2002-03-05 00:38:41 +00:00
simonb de2043f47e Sort function declarations. 
Fix some KNF whitespace nits.
 2002-03-05 00:34:14 +00:00
simonb 07a0ec1fd1 Split the (commented out) complete list of archs into separate lines 
split alphabetically.  This makes it easier to add new archs without
having to do extensive reformatting.
 2002-03-05 00:07:04 +00:00
thorpej f0963ab552 Add ofromioctl(), needed since Christos added ioctl to the memory device's 
cdev decl.
 2002-03-04 23:43:01 +00:00
shiba db5d1f5f34 Add the machine id of PowerBook 190CS. 2002-03-04 16:58:37 +00:00
wiz 634dabecb0 possible has two s. 2002-03-04 15:35:56 +00:00
uch 2f603eaa17 CTL_MACHDEP definitions are integrated into sh3/include/cpu.h again. 2002-03-04 14:36:13 +00:00
wiz 0995897f47 Remove ipip reference. 2002-03-04 14:12:56 +00:00
kleink 8a79f029ad VRSAVE is SPR 256, not 238. 2002-03-04 13:37:42 +00:00
sommerfeld 3406f0a3dd The "gif*" tunnelling interface does everything ipip does. 
Move usage example from ipip.4 to gif.4
Excise ipip and stitch up the scars.
 2002-03-04 13:24:06 +00:00
dbj b5fde890d0 add cnpollc() calls around cngetc for TRAP_PANICWAIT 2002-03-04 04:07:35 +00:00
dbj ed04b7ecb3 add a few missing keys, including f1-f12,home,end,next,prior 2002-03-04 04:03:36 +00:00
simonb 6f0fb25121 Don't need to declare phys_map - it is declared in <uvm/uvm_extern.h>. 2002-03-04 02:43:22 +00:00
simonb 9a942a34e0 Don't use local extern declarations for the mountroot variable or 
declare local prototypes for nfs_mountroot() or md_root_setconf().
 2002-03-04 02:25:21 +00:00
simonb 64c7743a05 Don't "extern int cold;" - this is in <sys/kernel.h>. 2002-03-04 02:19:07 +00:00
wiz 1b7f309f0a Correct misspellings of "failed". 2002-03-04 01:38:31 +00:00
kleink 995081f947 Make this link again in the absence of envsys/sysmon. 2002-03-04 00:55:04 +00:00
thorpej e0ea696615 * Add support for running the IQ80310 kernel where KERNEL_BASE != 
physical memory start.  Garbage-collect some cruft while here.
* Move the kernel up to 0xc0000000, giving a 1G/3G kernel/user split.
* Adjust the Integrator startup code accordingly.
 2002-03-03 21:22:15 +00:00
thorpej e23381908a inittodr(): Actually initialize time from the file system time. 2002-03-03 21:10:40 +00:00
mhitch d616d3990b Enable transmit error and EPH interrupt, and reset NIC on EPH interrupt. 
Fixes a source of lost interrupts.
 2002-03-03 18:21:37 +00:00
uch bf5bf0be48 remove obsolete headers. 2002-03-03 14:59:55 +00:00
uch 0894ee8f62 use GENERIC. 2002-03-03 14:45:21 +00:00
uch 0d29f32a67 clean up config files. 2002-03-03 14:36:48 +00:00
uch 3c9bf76936 make it work correctly when both hd64461uart and hd64465uart are enabled. 2002-03-03 14:35:08 +00:00
uch 7592c6aa95 don't initialize twice 2002-03-03 14:34:36 +00:00
uch 7166e5033d platform dependent HD64461 PCMCIA module (power supply). 2002-03-03 14:34:00 +00:00
uch 08aefbe07d remove temporal debug code. 2002-03-03 14:32:21 +00:00
uch 90baa8b206 SR related parts moved to psl.h. cpufunc.h segments.h are removed. 
kernel mode checking is only SR.MD. no check stack pointer.
 2002-03-03 14:31:24 +00:00
uch 17fbf85dc3 machine dependent sysctl are moved to machine/cpu.h 
dreamcast, hpcsh ... CPU_CONSDEV
	mmeye, evbsh3	 ... CPU_CONSDEV, CPU_LOADANDRESET
 2002-03-03 14:28:48 +00:00
uch 24ebe31f30 remove unneeded configuration. 2002-03-03 14:27:24 +00:00
chris 1181e367e0 Implement pmap_growkernel for arm32 based ports. 
Note that this has been compiled on some systems, cats, IQ80310, IPAQ, netwinder and shark (note that shark's build is currently broken due to other reasons), but only actually run on cats.
Shark doesn't make use of the functionality as I believe there has to be a correlation between OFW and the kernel tables so that calls into OFW work.
 2002-03-03 11:22:58 +00:00
scw 293681cdc3 Rename the bootstrap from netboot to just boot as eventually it will 
support both network and scsi devices in one binary.
(There are no absolute size restrictions for a PReP-style one-stage
bootloader).
 2002-03-03 11:03:43 +00:00
scw 087d3361fc Define NEWPMAP here if it is not already defined, for the benefit 
of lkms.
 2002-03-03 10:55:35 +00:00
scw 44c52d4714 No longer need to define CACHELINESIZE here, and move NEWPMAP option 
to std.mvmeppc since the old pmap module is not supported on mvmeppc.
 2002-03-03 10:53:10 +00:00
nathanw b50fb54af2 Calculate and print the speed of G3 and G4 processors. 
Add code to read the on-chip temperature sensor on the G3 and hook it in
to the envsys/sysmon subsystem. "envstat" now prints the CPU temperature.
 2002-03-03 07:31:33 +00:00
nathanw 1eeb28024d Add sysmon data structures to struct cpu_info. 2002-03-03 07:09:09 +00:00
matt d26c78e764 All Moto PPC revisions should be printed as maj.min (0x0200 -> 2.0). 2002-03-03 07:09:01 +00:00
nathanw 780a2774c6 The cpu device now requires sysmon_envsys. 2002-03-03 07:04:34 +00:00
nathanw de0fe89086 Add sysmon device (62). 2002-03-03 07:02:54 +00:00
matt e0ba5cf38d Add initial MPC7455 support. 2002-03-03 06:56:09 +00:00
matt 997374a8dd Add MPC7455 2002-03-03 06:47:25 +00:00
nathanw 5d5aeaa547 Add bit definitions for the MMCR's, and event numbers for the events 
that are common to the G3 and G4.
 2002-03-03 06:38:31 +00:00
nathanw 7a92615001 Correct the SPR numbers of PMC3 and PMC4. 
SIA wasn't retconned, but the SPR number was wrong. Re-add it, and add
USIA.
 2002-03-03 05:32:37 +00:00
nathanw c2b8ec655a Delete the retconned SIAR SPR. 2002-03-03 05:17:48 +00:00
nathanw ee2cbbfe4a Add MPC7xx/7xxx performance monitor control registers (MMCR0-2, UMMCR0-2). 2002-03-03 05:15:44 +00:00
nathanw 28b2a20fb9 Add bit definitions for the MPC750 thermal management registers. 2002-03-03 04:31:53 +00:00
jmc 8c3c52f61d Provide a definition for DEV_EEPROM so mem.c will compile if SUN4 is defined. 2002-03-03 03:11:06 +00:00
thorpej 20dd585980 Add RCS ID. 2002-03-02 22:29:40 +00:00
uch 6042c0a3fc Initial support for KGDB on the sh3. 2002-03-02 22:26:25 +00:00
uch 65af267aeb Add SH7709A INTEVT2 register define. 2002-03-02 22:25:19 +00:00
thorpej ebcb5cdd36 Move the DBSYM bits up in the file. 2002-03-02 22:23:10 +00:00
uch 36c7edfda4 recompile 2002-03-02 22:03:51 +00:00
uch 795a7cf404 WCE210 support. 2002-03-02 22:01:57 +00:00
uch 2a2cc9f493 always open COM1 for the sake of KGDB. 2002-03-02 22:01:34 +00:00
uch ddf9130f5c add run-time detection of Windows CE version. 2002-03-02 22:01:05 +00:00
kleink 4a513728e8 Add end-of-comment missing in previous. 2002-03-02 21:36:27 +00:00
mhitch 9de3e943c6 Make reset actually do something and enable the use of the watchdog timer. 
Losing interrupts no longer will hang the network.
 2002-03-02 21:08:04 +00:00
chris a973797a7a Remove ref to VM_MAXKERN_ADDRESS, it's not used in this file 2002-03-02 15:35:05 +00:00
chris 4fa8495ff4 Update the types, pt_entry and pd_entry should be unsigned, and fixed at 32 bits. 2002-03-02 15:30:49 +00:00
kleink a34187bca3 Also reset segment register 0 on kernel entry: there may not always be 
a fixed BAT entry covering segment 0, or not completely covering it,
and we do restore it on return to user level already.
 2002-03-02 15:19:56 +00:00
kleink dc0a08feaa Note that Guarded bit is not implemented on the 601. 2002-03-02 15:07:35 +00:00
kleink 98eeb8198f Give block translations to I/O memory the Guarded attribute; from Matt Thomas. 2002-03-02 14:25:02 +00:00
mrg ccc760f047 check _KERNEL_OPT for opt_ddb.h 2002-03-02 12:28:16 +00:00
scw 6cf459ffb5 Add BAT_G to the I/O bats, as per matt@netbsd.org's change for macppc. 2002-03-02 11:01:50 +00:00
matt b7a4d57a9e Now all MBR_* definitions come from <sys/disklabel_mbr.h> 2002-03-02 07:05:30 +00:00
jmc 68b038f787 Wrap the generation of machine and powerpc links so they don't happen during 
make obj, clean or cleandir as the proper objdir may not be around yet.
 2002-03-02 06:32:28 +00:00
matt 4b948be2fc Disable BTIC on rev 2.0 or earlier MPC7450s as Motorola Errata #31 for the 
MPC7450.
 2002-03-02 02:18:38 +00:00
matt 102f6b0e48 Make sure I/O bats are set to BAT_I|BAT_G (guarded, cache-inhibited) as to 
not allow speculative loads to occur within them.  This is the cause of the
random MCHKs on 7450 based Mac's.
 2002-03-02 00:44:08 +00:00
ragge 16cd24dea4 usrptsize was not correct calculated, fixed. 
Add space to system page table for the UVM kernel area.
This fixes the KVM usage problem that Manuel Bouyer reported a while ago.
 2002-03-01 23:55:10 +00:00
thorpej 35abec3c31 Add -Os and -mcpu=i486 to COPTS. Add VNODE_OP_NOINLINE. 2002-03-01 23:42:20 +00:00
martin f801cd463b Rename EBUS_PADDR_FROM_REG uses to EBUS_ADDR_FROM_REG. 2002-03-01 11:51:00 +00:00
martin 7d9d648a64 For aesthetical reasons use bus_addr_t instead of paddr_t in the BUS_ADDR 
makro. Requested by uwe.
 2002-03-01 11:34:36 +00:00
martin feaf0ddd87 Cast the "io" parameter of BUS_ADDR to paddr_t before it gets shifted. 
This makes this makro work with smaller values passed for io. No functional
change.
 2002-03-01 07:19:29 +00:00
scw fc673fcd59 Missed this file when adding mvmeppc port. 2002-02-28 21:54:42 +00:00
thorpej 1addb1955a Default to telling the MI PCI code that rd/line, rd/mult, and wr/inv 
commands are OK.
 2002-02-28 21:48:05 +00:00
leo 18dfb594ff These were created by accident (typo), hope this removal does what I 
expect from the man-page...
 2002-02-28 20:08:18 +00:00
uch f21c737967 Catch up with the latest vrip changes. 2002-02-28 18:26:05 +00:00
uch b94c8137ab cpu_reset: 
Set EXPEVT to 0x20(manual reset) before jump to reset vector.
 2002-02-28 18:18:51 +00:00
uch bbcdfc2583 Use sh3/intcreg.h macro instead of immediate. 2002-02-28 18:17:29 +00:00
thorpej f711992b7f Add options GATEWAY. 2002-02-28 17:54:56 +00:00
uch 9c21656766 cpu_dumpconf, reserve_dumppages, dumpsys, cpu_reset are moved to sh3/sh3_machdep.c 2002-02-28 16:54:28 +00:00
uch f52cc0a5e4 Fix comment to reflect reality. 2002-02-28 16:52:46 +00:00
simonb 4324f37586 Use "#define<tab>". 2002-02-28 03:17:23 +00:00
uch 74680cb1cd change define _ -> PRINT 2002-02-28 01:59:51 +00:00
uch 6ece4e10f0 Remove #if 0 #endif 2002-02-28 01:58:53 +00:00
uch 2e904b2d1e s/MMEYE_NO_CACHE/CACHE_DISABLE/ 2002-02-28 01:58:18 +00:00
uch bbc655c4fb Cleanup register definition 2002-02-28 01:56:57 +00:00
uch 40382c6556 Change foo_r0_r1 macro in sh3/locore.h to foo(Rn, Rm) 2002-02-28 01:53:42 +00:00
uch 06fbd079f5 Remove unneeded header. 2002-02-28 01:52:28 +00:00
scw bd9412df1c Oops, replace this with a (very) slightly modified version of prep's 
intr.h instead of a remnant of my original hacking where it was based
on sandpoint's.
 2002-02-28 00:27:38 +00:00
scw eb06a2e443 Nuke a file which should not have been commited. 2002-02-28 00:02:26 +00:00