Delete the retconned SIAR SPR.
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@ -120,7 +120,6 @@
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#define SPR_DCWR 0x3ba /* 4.. Data Cache Write-through Register */
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#define SPR_PMC2 0x3ba /* .6. Performance Counter Register 2 */
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#define SPR_SLER 0x3bb /* 4.. Storage Little Endian Register */
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#define SPR_SIAR 0x3bc /* .6. Sample Instruction Address Register */
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#define SPR_MMCR1 0x3bc /* .6. Monitor Mode Control Register 2 */
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#define SPR_SU0R 0x3bc /* 4.. Storage User-defined 0 Register */
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#define SPR_DBCR1 0x3bd /* 4.. Debug Control Register 1 */
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