* Add support for running the IQ80310 kernel where KERNEL_BASE !=
physical memory start. Garbage-collect some cruft while here. * Move the kernel up to 0xc0000000, giving a 1G/3G kernel/user split. * Adjust the Integrator startup code accordingly.
This commit is contained in:
thorpej
parent
e23381908a
commit
e0ea696615
@ -1,4 +1,4 @@
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# $NetBSD: Makefile.evbarm.inc,v 1.9 2002/03/02 22:23:10 thorpej Exp $
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# $NetBSD: Makefile.evbarm.inc,v 1.10 2002/03/03 21:22:15 thorpej Exp $
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SYSTEM_LD_TAIL_EXTRA=; \
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echo "${DBSYM} $@ || true"; \
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@ -11,11 +11,17 @@ SYSTEM_FIRST_SFILE= ${THISARM}/integrator/intmmu.S
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.endif
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.if (${BOARDTYPE} == "iq80310")
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SYSTEM_FIRST_OBJ= iq80310_start.o
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SYSTEM_FIRST_SFILE= ${THISARM}/iq80310/iq80310_start.S
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LINKFLAGS= -T ${THISARM}/conf/ldscript.iq80310
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SYSTEM_LD_TAIL_EXTRA+=; \
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echo ${OBJCOPY} -S -O srec $@ $@.srec; \
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${OBJCOPY} -S -O srec $@ $@.srec; \
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echo ${OBJCOPY} -S -O binary $@ $@.bin; \
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${OBJCOPY} -S -O binary $@ $@.bin
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EXTRA_KERNELS+= ${KERNELS:@.KERNEL.@${.KERNEL.}.srec@}
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EXTRA_KERNELS+= ${KERNELS:@.KERNEL.@${.KERNEL.}.bin@}
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.endif
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77
sys/arch/evbarm/conf/ldscript.iq80310
Normal file
77
sys/arch/evbarm/conf/ldscript.iq80310
Normal file
@ -0,0 +1,77 @@
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/* $NetBSD: ldscript.iq80310,v 1.1 2002/03/03 21:22:15 thorpej Exp $ */
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OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm",
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"elf32-littlearm")
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OUTPUT_ARCH(arm)
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ENTRY(KERNEL_BASE_phys)
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SECTIONS
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{
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KERNEL_BASE_phys = 0xa0200000;
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KERNEL_BASE_virt = 0xc0200000;
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/* Kernel start: */
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.start (KERNEL_BASE_phys) :
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{
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*(.start)
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} =0
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/* Read-only sections, merged into text segment: */
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.text (KERNEL_BASE_virt + SIZEOF(.start)) :
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AT (LOADADDR(.start) + SIZEOF(.start))
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{
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*(.text)
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*(.text.*)
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*(.stub)
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*(.glue_7t) *(.glue_7)
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*(.rodata) *(.rodata.*)
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} =0
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PROVIDE (__etext = .);
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PROVIDE (_etext = .);
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PROVIDE (etext = .);
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/* Adjust the address for the data segment to start on the next page
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boundary. */
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. = ALIGN(0x8000);
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.data :
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AT ((LOADADDR(.text) + SIZEOF(.text) + (0x8000 - 1)) & ~(0x8000 - 1))
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{
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__data_start = . ;
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*(.data)
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*(.data.*)
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}
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.sdata :
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AT (LOADADDR(.data) + SIZEOF(.data))
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{
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*(.sdata)
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*(.sdata.*)
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}
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_edata = .;
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PROVIDE (edata = .);
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__bss_start = .;
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__bss_start__ = .;
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.sbss :
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{
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PROVIDE (__sbss_start = .);
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PROVIDE (___sbss_start = .);
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*(.dynsbss)
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*(.sbss)
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*(.sbss.*)
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*(.scommon)
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PROVIDE (__sbss_end = .);
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PROVIDE (___sbss_end = .);
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}
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.bss :
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{
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*(.dynbss)
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*(.bss)
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*(.bss.*)
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*(COMMON)
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/* Align here to ensure that the .bss section occupies space up to
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_end. Align after .bss to ensure correct alignment even if the
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.bss section disappears because there are no input sections. */
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. = ALIGN(32 / 8);
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}
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. = ALIGN(32 / 8);
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_end = .;
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_bss_end__ = . ; __bss_end__ = . ; __end__ = . ;
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PROVIDE (end = .);
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: vmparam.h,v 1.8 2002/03/03 11:23:00 chris Exp $ */
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/* $NetBSD: vmparam.h,v 1.9 2002/03/03 21:22:16 thorpej Exp $ */
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/*
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* Copyright (c) 1988 The Regents of the University of California.
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@ -48,10 +48,10 @@
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* The line between user space and kernel space
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* Mappings >= KERNEL_SPACE_START are constant across all processes
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*/
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#define KERNEL_SPACE_START 0xa0000000
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#define KERNEL_SPACE_START 0xc0000000
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/* Various constants used by the MD code*/
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#define KERNEL_BASE 0xa0000000
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#define KERNEL_BASE 0xc0000000
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#define KERNEL_TEXT_BASE (KERNEL_BASE + 0x00200000)
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#define ALT_PAGE_TBLS_BASE (KERNEL_BASE + 0x00c00000)
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#define KERNEL_VM_BASE (KERNEL_BASE + 0x01000000)
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@ -65,7 +65,7 @@
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* buffers is being limited due to lack of VA space.
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*/
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/*
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* The range 0xf1000000 - 0xfcffffff is available for kernel VM space
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* The range 0xc1000000 - 0xccffffff is available for kernel VM space
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* Core-logic registers and I/O mappings occupy 0xfd000000 - 0xffffffff
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*/
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#define KERNEL_VM_SIZE 0x0C000000
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@ -1,4 +1,4 @@
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/* $NetBSD: intmmu.S,v 1.2 2001/11/23 17:39:05 thorpej Exp $ */
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/* $NetBSD: intmmu.S,v 1.3 2002/03/03 21:22:16 thorpej Exp $ */
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/*
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* Copyright (c) 2001 ARM Ltd
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@ -64,13 +64,13 @@ Lflat:
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bgt Lflat
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/*
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* Map VA 0xa0100000->0xa03fffff to PA 0x00000000->0x002fffff
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* Map VA 0xc0100000->0xc03fffff to PA 0x00000000->0x002fffff
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*/
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mov r3, #(AP_KRW << AP_SECTION_SHIFT)
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add r3, r3, #(L1_SECTION)
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mov r1, #0x8000 /* page table start */
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add r1, r1, #(0xa00 * 4) /* offset to 0xa00xxxxx */
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add r1, r1, #(0x001 * 4) /* offset to 0xa01xxxxx */
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add r1, r1, #(0xc00 * 4) /* offset to 0xc00xxxxx */
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add r1, r1, #(0x001 * 4) /* offset to 0xc01xxxxx */
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mov r0, #47
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Lkern:
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str r3, [r1], #0x0004 /* 0xa010000-0xa03fffff */
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@ -1,4 +1,4 @@
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/* $NetBSD: iq80310_machdep.c,v 1.32 2002/03/03 11:23:00 chris Exp $ */
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/* $NetBSD: iq80310_machdep.c,v 1.33 2002/03/03 21:22:15 thorpej Exp $ */
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/*
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* Copyright (c) 2001, 2002 Wasabi Systems, Inc.
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@ -389,58 +389,12 @@ initarm(void *arg)
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}
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/*
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* Okay, RedBoot has provided us with the following memory map:
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*
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* Physical Address Range Description
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* ----------------------- ----------------------------------
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* 0x00000000 - 0x00000fff flash Memory
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* 0x00001000 - 0x00001fff 80312 Internal Registers
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* 0x00002000 - 0x007fffff flash Memory
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* 0x00800000 - 0x7fffffff PCI ATU Outbound Direct Window
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* 0x80000000 - 0x83ffffff Primary PCI 32-bit Memory
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* 0x84000000 - 0x87ffffff Primary PCI 64-bit Memory
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* 0x88000000 - 0x8bffffff Secondary PCI 32-bit Memory
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* 0x8c000000 - 0x8fffffff Secondary PCI 64-bit Memory
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* 0x90000000 - 0x9000ffff Primary PCI IO Space
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* 0x90010000 - 0x9001ffff Secondary PCI IO Space
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* 0x90020000 - 0x9fffffff Unused
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* 0xa0000000 - 0xbfffffff SDRAM
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* 0xc0000000 - 0xefffffff Unused
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* 0xf0000000 - 0xffffffff 80200 Internal Registers
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*
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*
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* Virtual Address Range C B Description
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* ----------------------- - - ----------------------------------
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* 0x00000000 - 0x00000fff Y Y SDRAM
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* 0x00001000 - 0x00001fff N N 80312 Internal Registers
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* 0x00002000 - 0x007fffff Y N flash Memory
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* 0x00800000 - 0x7fffffff N N PCI ATU Outbound Direct Window
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* 0x80000000 - 0x83ffffff N N Primary PCI 32-bit Memory
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* 0x84000000 - 0x87ffffff N N Primary PCI 64-bit Memory
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* 0x88000000 - 0x8bffffff N N Secondary PCI 32-bit Memory
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* 0x8c000000 - 0x8fffffff N N Secondary PCI 64-bit Memory
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* 0x90000000 - 0x9000ffff N N Primary PCI IO Space
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* 0x90010000 - 0x9001ffff N N Secondary PCI IO Space
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* 0xa0000000 - 0xa0000fff Y N flash
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* 0xa0001000 - 0xbfffffff Y Y SDRAM
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* 0xc0000000 - 0xcfffffff Y Y Cache Flush Region
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* 0xf0000000 - 0xffffffff N N 80200 Internal Registers
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*
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* The first level page table is at 0xa0004000. There are also
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* 2 second-level tables at 0xa0008000 and 0xa0008400.
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*
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* This corresponds roughly to the physical memory map, i.e.
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* we are quite nearly running VA==PA.
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* We are currently running with the MMU enabled and the
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* entire address space mapped VA==PA, except for the
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* first 64M of RAM is also double-mapped at 0xc0000000.
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* There is an L1 page table at 0xa0004000.
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*/
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/*
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* Examine the boot args string for options we need to know about
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* now.
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*/
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#if 0
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process_kernel_args((char *)nwbootinfo.bt_args);
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#endif
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/*
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* Fetch the SDRAM start/size from the i80312 SDRAM configration
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* registers.
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@ -461,9 +415,9 @@ initarm(void *arg)
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* physical memory. For now, we're going to set
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* physical_freestart to 0xa0200000 (where the kernel
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* was loaded), and allocate the memory we need downwards.
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* If we get too close to the page tables that RedBoot
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* set up, we will panic. We will update physical_freestart
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* and physical_freeend later to reflect what pmap_bootstrap()
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* If we get too close to the L1 table that we set up, we
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* will panic. We will update physical_freestart and
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* physical_freeend later to reflect what pmap_bootstrap()
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* wants to see.
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*
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* XXX pmap_bootstrap() needs an enema.
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@ -610,14 +564,14 @@ initarm(void *arg)
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pmap_link_l2pt(l1pagetable, PROCESS_PAGE_TBLS_BASE, &kernel_ptpt);
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/* update the top of the kernel VM */
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pmap_curmaxkvaddr = KERNEL_VM_BASE + ((KERNEL_PT_VMDATA_NUM) * 0x00400000) - 1;
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pmap_curmaxkvaddr =
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KERNEL_VM_BASE + ((KERNEL_PT_VMDATA_NUM) * 0x00400000) - 1;
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#ifdef VERBOSE_INIT_ARM
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printf("Mapping kernel\n");
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#endif
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/* Now we fill in the L2 pagetable for the kernel static code/data */
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{
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extern char etext[], _end[];
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size_t textsize = (uintptr_t) etext - KERNEL_TEXT_BASE;
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@ -629,22 +583,12 @@ initarm(void *arg)
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logical = 0x00200000; /* offset of kernel in RAM */
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||||
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/*
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||||
* This maps the kernel text/data/bss VA==PA.
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||||
*/
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logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
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physical_start + logical, textsize,
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VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
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logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
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||||
physical_start + logical, totalsize - textsize,
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||||
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
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||||
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||||
#if 0 /* XXX No symbols yet. */
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||||
logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
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||||
physical_start + logical, kernexec->a_syms + sizeof(int)
|
||||
+ *(u_int *)((int)end + kernexec->a_syms + sizeof(int)),
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||||
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
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||||
#endif
|
||||
}
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||||
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||||
#ifdef VERBOSE_INIT_ARM
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||||
@ -780,7 +724,9 @@ initarm(void *arg)
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||||
{
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||||
extern char _end[];
|
||||
|
||||
physical_freestart = (((uintptr_t) _end) + PGOFSET) & ~PGOFSET;
|
||||
physical_freestart = physical_start +
|
||||
(((((uintptr_t) _end) + PGOFSET) & ~PGOFSET) -
|
||||
KERNEL_BASE);
|
||||
physical_freeend = physical_end;
|
||||
free_pages = (physical_freeend - physical_freestart) / NBPG;
|
||||
}
|
||||
@ -793,14 +739,6 @@ initarm(void *arg)
|
||||
#endif
|
||||
setttb(kernel_l1pt.pv_pa);
|
||||
cpu_tlb_flushID();
|
||||
{ u_int tmp;
|
||||
__asm __volatile("mrc p15, 0, %0, c1, c0, 0"
|
||||
: "=r" (tmp));
|
||||
tmp |= CPU_CONTROL_MMU_ENABLE;
|
||||
__asm __volatile("mcr p15, 0, %0, c1, c0, 0; nop; nop; nop"
|
||||
:
|
||||
: "r" (tmp));
|
||||
}
|
||||
|
||||
#ifdef VERBOSE_INIT_ARM
|
||||
printf("done!\n");
|
||||
@ -844,14 +782,6 @@ initarm(void *arg)
|
||||
prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
|
||||
undefined_handler_address = (u_int)undefinedinstruction_bounce;
|
||||
|
||||
/* At last !
|
||||
* We now have the kernel in physical memory from the bottom upwards.
|
||||
* Kernel page tables are physically above this.
|
||||
* The kernel is mapped to KERNEL_TEXT_BASE
|
||||
* The kernel data PTs will handle the mapping of 0xf1000000-0xf3ffffff
|
||||
* The page tables are mapped to 0xefc00000
|
||||
*/
|
||||
|
||||
/* Initialise the undefined instruction handlers */
|
||||
printf("undefined ");
|
||||
undefined_init();
|
||||
@ -886,39 +816,6 @@ initarm(void *arg)
|
||||
return(kernelstack.pv_va + USPACE_SVC_STACK_TOP);
|
||||
}
|
||||
|
||||
#if 0
|
||||
void
|
||||
process_kernel_args(char *args)
|
||||
{
|
||||
static char bootargs[MAX_BOOT_STRING + 1];
|
||||
|
||||
boothowto = 0;
|
||||
|
||||
/* Make a local copy of the bootargs */
|
||||
strncpy(bootargs, args, MAX_BOOT_STRING);
|
||||
|
||||
args = bootargs;
|
||||
boot_file = bootargs;
|
||||
|
||||
/* Skip the kernel image filename */
|
||||
while (*args != ' ' && *args != 0)
|
||||
++args;
|
||||
|
||||
if (*args != 0)
|
||||
*args++ = 0;
|
||||
|
||||
while (*args == ' ')
|
||||
++args;
|
||||
|
||||
boot_args = args;
|
||||
|
||||
printf("bootfile: %s\n", boot_file);
|
||||
printf("bootargs: %s\n", boot_args);
|
||||
|
||||
parse_mi_bootargs(boot_args);
|
||||
}
|
||||
#endif
|
||||
|
||||
void
|
||||
consinit(void)
|
||||
{
|
||||
|
||||
137
sys/arch/evbarm/iq80310/iq80310_start.S
Normal file
137
sys/arch/evbarm/iq80310/iq80310_start.S
Normal file
@ -0,0 +1,137 @@
|
||||
/* $NetBSD: iq80310_start.S,v 1.1 2002/03/03 21:22:15 thorpej Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2002 Wasabi Systems, Inc.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Written by Jason R. Thorpe for Wasabi Systems, Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. All advertising materials mentioning features or use of this software
|
||||
* must display the following acknowledgement:
|
||||
* This product includes software developed for the NetBSD Project by
|
||||
* Wasabi Systems, Inc.
|
||||
* 4. The name of Wasabi Systems, Inc. may not be used to endorse
|
||||
* or promote products derived from this software without specific prior
|
||||
* written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
|
||||
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
|
||||
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <machine/asm.h>
|
||||
#include <arm/armreg.h>
|
||||
#include <arm/arm32/pte.h>
|
||||
|
||||
.section .start,"ax",%progbits
|
||||
|
||||
.global _C_LABEL(iq80310_start)
|
||||
_C_LABEL(iq80310_start):
|
||||
/*
|
||||
* We assume we've been loaded VA==PA, or that the MMU is
|
||||
* disabled. We will go ahead and disable the MMU here
|
||||
* so that we don't have to worry about flushing caches, etc.
|
||||
*/
|
||||
mrc p15, 0, r2, c1, c0, 0
|
||||
bic r2, r2, #CPU_CONTROL_MMU_ENABLE
|
||||
mcr p15, 0, r2, c1, c0, 0
|
||||
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
|
||||
/*
|
||||
* We want to construct a memory map that maps us
|
||||
* VA==PA (SDRAM at 0xa0000000) and also double-maps
|
||||
* that space at 0xc0000000 (where the kernel address
|
||||
* space starts). We create these mappings uncached
|
||||
* and unbuffered to be safe.
|
||||
*
|
||||
* We also want to map the various devices we want to
|
||||
* talk to VA==PA during bootstrap.
|
||||
*
|
||||
* We just use section mappings for all of this to make it easy.
|
||||
*
|
||||
* We will put the L1 table to do all this at 0xa0004000, which
|
||||
* is also where RedBoot puts it.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Step 1: Map the entire address space VA==PA.
|
||||
*/
|
||||
add r0, pc, #(Ltable - . - 8)
|
||||
ldr r0, [r0] /* r0 = &l1table */
|
||||
|
||||
mov r3, #(AP_KRW << AP_SECTION_SHIFT)
|
||||
orr r3, r3, #(L1_SECTION)
|
||||
mov r2, #0x100000 /* advance by 1MB */
|
||||
mov r1, #0x1000 /* 4096MB */
|
||||
1:
|
||||
str r3, [r0], #0x04
|
||||
add r3, r3, r2
|
||||
subs r1, r1, #1
|
||||
bgt 1b
|
||||
|
||||
/*
|
||||
* Step 2: Map VA 0xc0000000->0xc3ffffff to PA 0xa0000000->0xa3ffffff.
|
||||
*/
|
||||
add r0, pc, #(Ltable - . - 8) /* r0 = &l1table */
|
||||
ldr r0, [r0]
|
||||
|
||||
mov r3, #(AP_KRW << AP_SECTION_SHIFT)
|
||||
orr r3, r3, #(L1_SECTION)
|
||||
orr r3, r3, #0xa0000000
|
||||
add r0, r0, #(0xc00 * 4) /* offset to 0xc00xxxxx */
|
||||
mov r1, #0x40 /* 64MB */
|
||||
1:
|
||||
str r3, [r0], #0x04
|
||||
add r3, r3, r2
|
||||
subs r1, r1, #1
|
||||
bgt 1b
|
||||
|
||||
/* OK! Page table is set up. Give it to the CPU. */
|
||||
add r0, pc, #(Ltable - . - 8)
|
||||
ldr r0, [r0]
|
||||
mcr p15, 0, r0, c2, c0, 0
|
||||
|
||||
/* Flush the old TLBs, just in case. */
|
||||
mcr p15, 0, r0, c8, c7, 0
|
||||
|
||||
/* Set the Domain Access register. Very important! */
|
||||
mov r0, #1
|
||||
mcr p15, 0, r0, c3, c0, 0
|
||||
|
||||
/* OK, let's enable the MMU. */
|
||||
mrc p15, 0, r2, c1, c0, 0
|
||||
orr r2, r2, #CPU_CONTROL_MMU_ENABLE
|
||||
mcr p15, 0, r2, c1, c0, 0
|
||||
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
|
||||
/* ...and now we jump to the "real" kernel entry point! */
|
||||
add r0, pc, #(Lstart - . - 8)
|
||||
ldr pc, [r0]
|
||||
|
||||
Ltable:
|
||||
.word 0xa0004000
|
||||
|
||||
Lstart:
|
||||
.word start
|
||||
Loading…
Reference in New Issue
Block a user