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401 Commits

Author SHA1 Message Date
ths
e189e74868 Per-CPU instruction decoding implementation, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3228 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-24 12:48:00 +00:00
j_mayer
c068688b03 Extend TB flags to 64 bits (Alexander Graf). 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3198 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-20 22:47:42 +00:00
ths
3b46e62427 find -type f | xargs sed -i 's/[\t ]*$//g' # Yes, again. Note the star in the regex. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3177 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-17 08:09:54 +00:00
ths
5fafdf24ef find -type f | xargs sed -i 's/[\t ]$//g' # on most files 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-16 21:08:06 +00:00
ths
ce62e5ba09 Fix tb->size mishandling, by Daniel Jacobowitz. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3160 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-11 10:04:58 +00:00
ths
ead9360e2f Partial support for 34K multithreading, not functional yet. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3156 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-06 00:18:15 +00:00
ths
3ddf0b5cde Disable 64-bit instructions on 32-bit CPU, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3146 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-08-26 17:37:23 +00:00
ths
8dfdb87c8d Implement recip1/recip2/rsqrt1/rsqrt2. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3026 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-26 20:26:03 +00:00
ths
3a95e3a7d9 Check for R2 instructions, and throw RI if we don't emulate R2. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2921 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-02 00:25:12 +00:00
ths
8487327a1d Make sure hflags are updated for CP0_Status changes. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2918 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-01 17:47:07 +00:00
ths
278d070272 Simplify code. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2904 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-31 23:42:46 +00:00
ths
5e755519ac Don't check the FPU state for each FPU instruction, use hflags to 
handle this per-tb.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2896 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-29 16:52:57 +00:00
ths
6e473128b6 Handle PX/UX status flags correctly, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2892 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-28 20:36:48 +00:00
ths
9b9e4393dd MIPS64 addressing fixes, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2888 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-28 17:03:28 +00:00
ths
fd88b6abab The 24k wants more watch and srsmap registers. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2849 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-23 08:24:25 +00:00
ths
df1561e22d The previous patch to make breakpoints work was a performance 
disaster, use a similiar hack as ARM does instead.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2848 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-23 08:18:27 +00:00
ths
3a5b360dac Catch more MIPS FPU cornercases, fix addr.ps and mulr.ps instructions. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2841 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-20 13:27:58 +00:00
ths
93b12ccc62 Fix indexed FP load/store instructions. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2837 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-20 01:36:29 +00:00
ths
57fa1fb31c More MIPS 64-bit FPU support. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2834 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-19 20:29:41 +00:00
ths
f469b9db01 Fix slti/sltiu for MIPS64, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2833 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-19 17:45:43 +00:00
ths
5d46d55d4b Fix ldl/ldr implementation, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2832 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-19 17:44:33 +00:00
ths
fd4a04ebb2 - Move FPU exception handling into helper functions, since they are big. 
- Fix FP-conditional branches.
- Check FPU register mode at runtime, not translation time, as the F64
  status bit can change.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2828 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-18 11:55:54 +00:00
ths
34ae7b51f5 Work around the lack of proper handling for self-modifying code. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2827 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-18 01:13:09 +00:00
ths
f1b0aa5de7 Fix mfc0 and dmtc0 instructions on MIPS64, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2819 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-13 18:39:10 +00:00
ths
703eaf379e Don't decode CP0 XContext on 32bit MIPS. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2812 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-13 14:42:18 +00:00
ths
29929e3490 MIPS TLB style selection at runtime, by Herve Poussineau. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2809 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-13 13:49:44 +00:00
ths
5a1e8ffbe7 Implemented cabs FP instructions, and improve exception handling for 
trunc/floor/ceil/round.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2804 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-11 17:08:26 +00:00
ths
287c4b84f4 Another bit of nicer debug output. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2803 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-11 10:43:55 +00:00
ths
fbcc68286a Implement FP madd/msub, wire up bc1any[24][ft]. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2802 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-11 09:59:10 +00:00
ths
923617a396 Improved debug output for the MIPS opcode decoder. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2801 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-11 00:16:06 +00:00
ths
beebb570f4 Fix for the scd instruction, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2799 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-10 00:51:01 +00:00
ths
a6763a5881 Fix MIPS64 address computation specialcase, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2793 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-09 09:33:33 +00:00
ths
5a5012ecbd MIPS 64-bit FPU support, plus some collateral bugfixes in the 
conditional branch handling.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2779 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-07 13:55:33 +00:00
ths
d6929309b6 Next attempt to get the lui sign extension right. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2727 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-25 16:41:11 +00:00
ths
7bc45061ee Fix lui sign extension. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2726 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-25 13:58:52 +00:00
ths
fcb4a419f5 Choose number of TLBs at runtime, by Herve Poussineau. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2693 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-17 15:26:47 +00:00
ths
9898128f55 Simplify branch likely handling. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2676 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-16 01:35:29 +00:00
ths
171b31e7c7 Don't use T2 for INS, it conflicts with branch delay slot handling. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2674 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-15 21:26:37 +00:00
ths
a85427b147 Small code generation optimization. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2672 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-15 19:52:12 +00:00
ths
16c00cb2c2 Restart interrupts after an exception. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2664 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-14 12:56:46 +00:00
ths
2f6445458e Make SYNCI_Step and CCRes CPU-specific. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2651 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-11 20:34:23 +00:00
ths
b48cfdffd9 Throw RI for invalid MFMC0-class instructions. Introduce optional 
MIPS_STRICT_STANDARD define to adhere more to the spec than it makes
sense in normal operation.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2650 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-11 02:24:14 +00:00
ths
2423f6601a Code formatting fix. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2649 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-11 02:15:08 +00:00
ths
534ce69ff0 More Context/Xcontext fixes. Ifdef some 64bit-only ops, they may 
end up empty for 32bit mips, which dyngen trips over.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2648 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-11 02:13:00 +00:00
ths
c090a8f440 Fix CP0_IntCtl handling. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2645 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-09 14:17:31 +00:00
ths
4e7a4a4e84 Mark watchpoint features as unimplemented. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2643 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-09 14:15:41 +00:00
ths
62c5609aa5 Catch unaligned sc/scd. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2642 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-09 14:14:21 +00:00
ths
97428a4d84 Fix exception handling cornercase for rdhwr. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2641 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-09 14:13:40 +00:00
ths
dac9321024 Remove bogus mtc0 handling. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2640 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-09 12:31:31 +00:00
ths
e0c84da78c Implement prefx. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2630 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-07 01:11:39 +00:00
ths
cbeb0857da Set proper BadVAddress value for unaligned instruction fetch. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2629 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-07 01:11:15 +00:00
ths
e04bcc691b Actually skip over delay slot for a non-taken branch likely. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2628 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-07 01:10:22 +00:00
ths
f41c52f170 Save state for all CP0 instructions, they may throw a CPU exception. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2622 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-06 18:46:01 +00:00
ths
c53f4a62e3 fix branch delay slot cornercases. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2615 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-05 23:21:37 +00:00
ths
5a63bcb2d2 Fix rotr immediate ops, mask shift/rotate arguments to their allowed 
size.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2614 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-05 23:20:05 +00:00
ths
1579a72ec5 Fix RDHWR handling. Code formatting. Don't use *_direct versions to raise 
exceptions.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2611 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-05 23:16:25 +00:00
ths
876d4b0783 Fix code formatting. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2595 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-04 21:07:17 +00:00
ths
38121543c7 MIPS32R2 needs RDPGPR/WRPGPR instructions even when no shadow registers 
are implemented.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2589 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-02 17:28:07 +00:00
ths
60aa19abef Actually enable 64bit configuration. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2565 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-01 12:36:18 +00:00
ths
24c7b0e330 Sanitize mips exception handling. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2546 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-30 16:44:54 +00:00
ths
e397ee3382 Fix enough FPU/R2 support to get 24Kf going. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2528 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-23 00:43:28 +00:00
ths
3953d78687 Move mips CPU specific initialization to translate_init.c. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2522 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-21 11:04:42 +00:00
ths
3ad4bb2d3d Barf on branches/jumps in branch delay slots. Spotted by Stefan Weil. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2513 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-19 22:15:30 +00:00
ths
820e00f252 Define gen_intermediate_code_internal as "static inline". 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2512 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-19 21:46:06 +00:00
ths
33d68b5f00 MIPS -cpu selection support, by Herve Poussineau. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2491 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-18 00:30:29 +00:00
ths
6f5b89a07c MIPS Userland TLS register emulation, by Daniel Jacobowitz. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2465 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-02 20:48:00 +00:00
ths
36d2395873 MIPS FPU dynamic activation, part 1, by Herve Poussineau. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2463 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-02-28 22:37:42 +00:00
ths
00a709c7b9 Fix mips FPU emulation, 32 bit data types are allowed to use odd registers. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2454 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-02-27 19:27:51 +00:00
ths
3594c77487 Replace TLSZ with TARGET_FMT_lx. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2444 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-02-20 23:37:21 +00:00
ths
b29a0341d7 EBase is limited to KSEG0/KSEG1 even on 64bit CPUs. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2351 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-01-24 18:01:23 +00:00
ths
9c2149c8e0 Implementing dmfc/dmtc. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2348 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-01-23 22:45:22 +00:00
ths
5dc4b74480 Scrap SIGN_EXTEND32. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2251 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-12-21 13:48:28 +00:00
ths
c570fd169c Preliminiary MIPS64 support, disabled by default due to performance impact. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2250 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-12-21 01:19:56 +00:00
ths
179e32bbcc Fix erraneous fallthrough in MIPS trap implementation, thanks Atsushi Nemoto. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2247 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-12-16 16:45:18 +00:00
ths
ca7c2b1b9f Handle invalid accesses as SIGILL for mips/mipsel userland emulation. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2235 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-12-10 22:08:10 +00:00
ths
71fb7241c6 Fix build of MIPS target without FPU support. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2233 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-12-07 20:07:37 +00:00
ths
aa328addc0 Fix reset handling, CP0 isn't enabled by default (a fact which doesn't 
matter when running in kernel space).


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2228 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-12-07 16:22:15 +00:00
ths
e144966416 Simplify mask construction. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2227 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-12-07 00:30:19 +00:00
ths
bb8a53ad91 Update copyright notice. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2226 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-12-06 23:12:49 +00:00
ths
7a387fffce Add MIPS32R2 instructions, and generally straighten out the instruction 
decoding. This is also the first percent towards MIPS64 support.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2224 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-12-06 20:17:30 +00:00
ths
8c0fdd856c Dynamically translate MIPS mtc0 instructions. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2223 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-12-06 18:19:33 +00:00
ths
873eb01234 Dynamically translate MIPS mfc0 instructions. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2222 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-12-06 17:59:07 +00:00
ths
6ae817752b Halt/reboot support for Linux, by Daniel Jacobowitz. This is a band-aid 
until we emulate real MIPS hardware with real firmware.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2221 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-12-06 17:48:52 +00:00
ths
814b9a4749 MIPS TLB performance improvements, by Daniel Jacobowitz. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2220 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-12-06 17:42:40 +00:00
pbrook
417f38f066 MIPS FPU fixes (Daniel Jacobowitz). 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2213 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-11-12 23:54:39 +00:00
bellard
dd016883fb add support for cvt.s.d and cvt.d.s (Aurelien Jarno) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2198 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-10-23 21:25:11 +00:00
bellard
d796321b6b lwu support - generate exception if unaligned pc (Marius Groeger) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2025 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-06-26 20:02:45 +00:00
bellard
6ea83fedc8 MIPS FPU support (Marius Goeger) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1964 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-06-14 12:56:19 +00:00
bellard
3d9fb9fefe cosmetics (Thiemo Seufer) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1936 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-05-22 22:13:29 +00:00
bellard
cd7dd10f09 MIPS CP0 not usable in kernel mode (Stefan Weil) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1829 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-04-23 15:21:24 +00:00
bellard
4ad40f366f MIPS fixes (Daniel Jacobowitz) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1690 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-12-05 19:59:36 +00:00
bellard
eeef26cd42 fixed BLTZAL and BLTZALL insns - fixed regressions from jmp opts 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1667 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-11-26 18:47:06 +00:00
bellard
173d6cfe51 cpu_exec_init() change 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1643 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-11-21 23:32:20 +00:00
bellard
6e256c935c use direct jump only for jumps in the same page 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1629 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-11-20 10:32:05 +00:00
bellard
c53be33474 suppressed JUMP_TB (Paul Brook) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1594 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-10-30 21:39:19 +00:00
bellard
e37e863f5e correct split between helper.c and op_helper.c - cosmetics 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1505 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-07-04 22:17:33 +00:00
bellard
568b600d85 report C0 status correctly (Ralf Baechle) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1477 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-07-02 15:28:16 +00:00
bellard
bc2c390907 fixed priviledgees for CP0 use (Ralf Baechle) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1476 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-07-02 15:27:11 +00:00
bellard
9d1d106a3d unaligned load fix (Ralf Baechle) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1471 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-07-02 15:20:06 +00:00
bellard
bc9ed47b12 fixed jump mask (Ralf Baechle) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1466 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-07-02 15:10:44 +00:00
bellard
6af0bf9c7c MIPS target (Jocelyn Mayer) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1464 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-07-02 14:58:51 +00:00