Set proper BadVAddress value for unaligned instruction fetch.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2629 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -1486,7 +1486,7 @@ static void gen_compute_branch (DisasContext *ctx, uint32_t opc,
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/* Jump to register */
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if (offset != 0 && offset != 16) {
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/* Hint = 0 is JR/JALR, hint 16 is JR.HB/JALR.HB, the
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others are reserved. */
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others are reserved. */
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generate_exception(ctx, EXCP_RI);
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return;
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}
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@ -4629,6 +4629,7 @@ static void decode_opc (CPUState *env, DisasContext *ctx)
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/* make sure instructions are on a word boundary */
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if (ctx->pc & 0x3) {
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env->CP0_BadVAddr = ctx->pc;
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generate_exception(ctx, EXCP_AdEL);
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return;
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}
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