Handle invalid accesses as SIGILL for mips/mipsel userland emulation.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2235 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -1352,6 +1352,8 @@ void cpu_loop(CPUMIPSState *env)
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}
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}
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break;
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case EXCP_TLBL:
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case EXCP_TLBS:
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case EXCP_CpU:
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case EXCP_RI:
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info.si_signo = TARGET_SIGILL;
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@ -243,6 +243,12 @@ int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
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return ret;
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}
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#if defined(CONFIG_USER_ONLY)
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void do_interrupt (CPUState *env)
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{
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env->exception_index = EXCP_NONE;
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}
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#else
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void do_interrupt (CPUState *env)
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{
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target_ulong offset;
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@ -409,3 +415,4 @@ void do_interrupt (CPUState *env)
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}
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env->exception_index = EXCP_NONE;
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}
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#endif /* !defined(CONFIG_USER_ONLY) */
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@ -4072,6 +4072,7 @@ void cpu_reset (CPUMIPSState *env)
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tlb_flush(env, 1);
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/* Minimal init */
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#if !defined(CONFIG_USER_ONLY)
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if (env->hflags & MIPS_HFLAG_BMASK) {
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/* If the exception was raised from a delay slot,
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* come back to the jump. */
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@ -4098,9 +4099,11 @@ void cpu_reset (CPUMIPSState *env)
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/* Count register increments in debug mode, EJTAG version 1 */
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env->CP0_Debug = (1 << CP0DB_CNT) | (0x1 << CP0DB_VER);
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env->CP0_PRid = MIPS_CPU;
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#endif
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env->exception_index = EXCP_NONE;
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#if defined(CONFIG_USER_ONLY)
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env->hflags |= MIPS_HFLAG_UM;
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env->user_mode_only = 1;
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#endif
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#ifdef MIPS_USES_FPU
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env->fcr0 = MIPS_FCR0;
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