Commit Graph

160 Commits

Author SHA1 Message Date
Tom Musta
fb3ea83aa5 softfloat: Fix float64_to_uint64
The comment preceding the float64_to_uint64 routine suggests that
the implementation is broken.  And this is, indeed, the case.

This patch properly implements the conversion of a 64-bit floating
point number to an unsigned, 64 bit integer.

This contribution can be licensed under either the softfloat-2a or -2b
license.

Signed-off-by: Tom Musta <tommusta@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-01-08 19:07:22 +00:00
Peter Maydell
c4850f9e1b softfloat: Make the int-to-float functions take exact-width types
Currently the int-to-float functions take types which are specified
as "at least X bits wide", rather than "exactly X bits wide". This is
confusing and unhelpful since it means that the callers have to include
an explicit cast to [u]intXX_t to ensure the correct behaviour. Fix
them all to take the exactly-X-bits-wide types instead.

Note that this doesn't change behaviour at all since at the moment
we happen to define the 'int32' and 'uint32' types as exactly 32 bits
wide, and the 'int64' and 'uint64' types as exactly 64 bits wide.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-01-08 19:07:22 +00:00
Will Newton
f581bf5474 softfloat: Add float to 16bit integer conversions.
ARMv8 requires support for converting 32 and 64bit floating point
values to signed and unsigned 16bit integers.

Signed-off-by: Will Newton <will.newton@linaro.org>
[PMM: updated not to incorrectly set Inexact for Invalid inputs]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-01-08 19:07:22 +00:00
Peter Maydell
38970efafd softfloat: Fix exception flag handling for float32_to_float16()
Our float32 to float16 conversion routine was generating the correct
numerical answers, but not always setting the right set of exception
flags. Fix this, mostly by rearranging the code to more closely
resemble RoundAndPackFloat*, and in particular:
 * non-IEEE halfprec always raises Invalid for input NaNs
 * we need to check for the overflow case before underflow
 * we weren't getting the tininess-detected-after-rounding
   case correct (somewhat academic since only ARM uses halfprec
   and it is always tininess-detected-before-rounding)
 * non-IEEE halfprec overflow raises only Invalid, not
   Invalid + Inexact
 * we weren't setting Inexact when we should

Also add some clarifying comments about what the code is doing.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-01-08 19:07:22 +00:00
Will Newton
e17ab310e9 softfloat: Add minNum() and maxNum() functions to softfloat.
Add floatnn_minnum() and floatnn_maxnum() functions which are equivalent
to the minNum() and maxNum() functions from IEEE 754-2008. They are
similar to min() and max() but differ in the handling of QNaN arguments.

Signed-off-by: Will Newton <will.newton@linaro.org>
Message-id: 1386158099-9239-5-git-send-email-will.newton@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-10 13:28:50 +00:00
Will Newton
e70614eaa0 softfloat: Remove unused argument from MINMAX macro.
The nan_exp argument is not used, so remove it.

Signed-off-by: Will Newton <will.newton@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1386158099-9239-4-git-send-email-will.newton@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-10 13:28:50 +00:00
Peter Maydell
e3d142d073 fpu: Correct edgecase in float64_muladd
In handling float64_muladd, if we end up doing a subtraction of the
product and c, and the 128 bit result of this subtraction happens to
have its most significant bit in bit 63, we weren't handling this
correctly when attempting to normalize to put the most significant
bit into bit 126.  We would end up doing a right shift by a negative
number (undefined behaviour in C) so at best we would return an
incorrect result to the guest.  MSB in bit 63 has to be handled as a
special case separately from MSB in 0..62 and MSB in 63..126.  (MSB
in 127 is not possible.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-04-15 16:06:15 +02:00
Richard Sandiford
a6e7c18476 softfloat: Handle float_muladd_negate_c when product is zero
Honour float_muladd_negate_c in the case where the product is zero and
c is nonzero.  Previously we would fail to negate c.

Seen in (and tested against) the gfortran testsuite on MIPS.

Signed-off-by: Richard Sandiford <rdsandiford@googlemail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-01-26 13:22:09 +00:00
Richard Henderson
1e397eadf1 softfloat: Implement uint64_to_float128
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-01-05 10:12:50 +00:00
Richard Henderson
17ed229379 softfloat: Fix uint64_to_float64
The interface to normalizeRoundAndPackFloat64 requires that the
high bit be clear.  Perform one shift-right-and-jam if needed.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-01-05 10:12:49 +00:00
Paolo Bonzini
6b4c305cbd fpu: move public header file to include/fpu
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-12-19 08:32:46 +01:00
Peter Maydell
e744c06fca fpu/softfloat.c: Return correctly signed values from uint64_to_float32
The uint64_to_float32() conversion function was incorrectly always
returning numbers with the sign bit set (ie negative numbers). Correct
this so we return positive numbers instead.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-01 22:06:39 +02:00
Peter Maydell
4be8eeacb9 fpu/softfloat.c: Remove pointless shift of always-zero value
In float16_to_float32, when returning an infinity, just pass zero
as the mantissa argument to packFloat32(), rather than shifting
a value which we know must be zero.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-01 22:06:39 +02:00
Andreas Färber
94a49d86c5 softfloat: Replace int16 type with int_fast16_t
Based on the following Coccinelle patch:

@@
typedef int16, int_fast16_t;
@@
-int16
+int_fast16_t

Avoids a workaround for AIX.

Add typedef for pre-10 Solaris.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Cc: malc <av1474@comtv.ru>
Cc: Ben Taylor <bentaylor.solx86@gmail.com>
Tested-by: Bernhard Walle <bernhard@bwalle.de>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-04-28 09:13:26 +00:00
Andreas Färber
5aea4c589a softfloat: Replace uint16 type with uint_fast16_t
Based on the following Coccinelle patch:

@@
typedef uint16, uint_fast16_t;
@@
-uint16
+uint_fast16_t

Fixes the build of the Cocoa frontend on Mac OS X and avoids a
workaround for AIX.

For pre-10 Solaris include osdep.h.

Reported-by: Pavel Borzenkov <pavel.borzenkov@gmail.com>
Reported-by: Rui Carmo <rui.carmo@gmail.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Cc: Juan Pineda <juan@logician.com>
Cc: malc <av1474@comtv.ru>
Cc: Ben Taylor <bentaylor.solx86@gmail.com>
Tested-by: Bernhard Walle <bernhard@bwalle.de>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-04-28 09:13:09 +00:00
Andreas Färber
c9696547d4 softfloat: Fix mixups of int and int16
normalizeFloat{32,64}Subnormal() expect the exponent as int16, not int.
This went unnoticed since int16 and uint16 were both typedef'ed to int.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Tested-by: Bernhard Walle <bernhard@bwalle.de>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-04-28 09:12:24 +00:00
Juan Quintela
0eb4fc817f softfloat: make USE_SOFTFLOAT_STRUCT_TYPES compile
This change makes it compile and return the same value than the #undef one.

Signed-off-by: Juan Quintela <quintela@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-04-21 13:26:47 +00:00
Peter Maydell
760e141613 softfloat: roundAndPackInt{32, 64}: Don't assume int32 is 32 bits
Fix code in roundAndPackInt32 that assumed that int32 was only
32 bits, by simply using int32_t instead. Fix the parallel bug
in roundAndPackInt64 as well, although that one is only theoretical
since it's unlikely that int64 will ever be more than 64 bits.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-04-07 11:15:55 +00:00
Peter Maydell
b3a6a2e041 softfloat: float*_to_int32_round_to_zero: don't assume int32 is 32 bits
Code in the float64_to_int32_round_to_zero() function was assuming
that int32 would not be wider than 32 bits; this meant it might
not correctly detect the overflow case. We take the simple approach
of using int32_t. Also fix equivalent issues in the functions
for other float sizes.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-04-07 11:15:44 +00:00
Peter Maydell
369be8f618 softfloat: Implement fused multiply-add
Implement fused multiply-add as a softfloat primitive. This implements
"a+b*c" as a single step without any intermediate rounding; it is
specified in IEEE 754-2008 and implemented in a number of CPUs.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2011-10-19 16:14:06 +00:00
Peter Maydell
2ac8bd03c5 softfloat: Reinstate accidentally disabled target-specific NaN handling
Include config.h in softfloat.c, so that the target specific ifdefs in
softfloat-specialize.h are evaluated correctly. This was accidentally
broken in commit 789ec7ce2 when config-target.h was removed from
softfloat.h, and means that most targets will have been returning the
wrong results for calculations involving NaNs.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-01 06:19:07 +00:00
Andreas Färber
9f8d2a093f softfloat: Use uint32 consistently
Prepares for uint32 replacement.

Signed-off-by: Andreas Färber <andreas.faerber@web.de>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-09-03 17:47:14 +00:00
Andreas Färber
38641f8f54 softfloat: Use uint16 consistently
Prepares for uint16 replacement.

Signed-off-by: Andreas Färber <andreas.faerber@web.de>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-09-03 17:46:43 +00:00
Aurelien Jarno
be22a9abc0 softfloat: always enable floatx80 and float128 support
Now that softfloat-native is gone, there is no real point on not always
enabling floatx80 and float128 support.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-06-03 16:07:51 +02:00
Peter Maydell
e6afc87f80 softfloat: Add new flag for when denormal result is flushed to zero
Add a new float_flag_output_denormal which is set when the result
of a floating point operation would be denormal but is flushed to
zero because we are in flush_to_zero mode. This is necessary because
some architectures signal this condition as an underflow and others
signal it as an inexact result.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-05-23 22:39:35 +02:00
Aurelien Jarno
326b9e98a3 softfloat: fix float*_scalnb() corner cases
float*_scalnb() were not taking into account all cases. This patch fixes
some corner cases:
- NaN values in input were not properly propagated and the invalid flag
  not correctly raised. Use propagateFloat*NaN() for that.
- NaN or infinite values in input of floatx80_scalnb() were not correctly
  detected due to a typo.
- The sum of exponent and n could overflow, leading to strange results.
  Additionally having int16 defined to int make that happening for a very
  small range of values. Fix that by saturating n to the maximum exponent
  range, and using an explicit wider type if needed.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-25 11:18:33 +02:00
Aurelien Jarno
f6714d365d softfloat: add floatx80_compare*() functions
Add floatx80_compare() and floatx80_compare_quiet() functions to match
the softfloat-native ones.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-25 11:18:32 +02:00
Aurelien Jarno
f5a64251f2 softfloat: improve description of comparison functions
Make clear for all comparison functions which ones trigger an exception
for all NaNs, and which one only for sNaNs.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-17 20:32:15 +02:00
Aurelien Jarno
b689362d14 softfloat: move float*_eq and float*_eq_quiet
I am not a big fan of code moving, but having the signaling version in
the middle of quiet versions and vice versa doesn't make the code easy
to read.

This patch is a simple code move, basically swapping locations of
float*_eq and float*_eq_quiet.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-17 20:32:15 +02:00
Aurelien Jarno
2657d0ff8f softfloat: rename float*_eq_signaling() into float*_eq()
float*_eq_signaling functions have a different semantics than other
comparison functions. Fix that by renaming float*_quiet_signaling() into
float*_eq().

Note that it is purely mechanical, and the behaviour should be unchanged.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-17 20:32:14 +02:00
Aurelien Jarno
211315fb5e softfloat: rename float*_eq() into float*_eq_quiet()
float*_eq functions have a different semantics than other comparison
functions. Fix that by first renaming float*_quiet() into float*_eq_quiet().

Note that it is purely mechanical, and the behaviour should be unchanged.
That said it clearly highlight problems due to this different semantics,
they are fixed later in this patch series.

Cc: Alexander Graf <agraf@suse.de>
Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-17 20:32:14 +02:00
Aurelien Jarno
67b7861d63 softfloat: add float*_unordered_{,quiet}() functions
Add float*_unordered() functions to softfloat, matching the softfloat-native
ones. Also add float*_unordered_quiet() functions to match the others
comparison functions.

This allow target-i386/ops_sse.h to be compiled with softfloat.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-17 20:32:14 +02:00
Peter Maydell
274f1b041e softfloat: Add float*_min() and float*_max() functions
Add min and max operations to softfloat. This allows us to implement
propagation of NaNs and handling of negative zero correctly (unlike
the approach of having target helper routines return one of the operands
based on the result of a comparison op).

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-03 17:19:38 +02:00
Andreas Färber
bb98fe42c5 softfloat: Drop [s]bits{8, 16, 32, 64} types in favor of [u]int{8, 16, 32, 64}_t
They are defined with the same semantics as the POSIX types,
so prefer those for consistency. Suggested by Peter Maydell.

Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Andreas Färber <andreas.faerber@web.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-21 21:46:14 +01:00
Andreas Färber
8d725fac63 softfloat: Prepend QEMU-style header with derivation notice
The SoftFloat license requires "prominent notice that the work
is derivative". Having added features like improved 16-bit support
for arm already, add such a notice to the sources.

softfloat-native.[ch] are not under the SoftFloat license
and thus are not changed.

Cc: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Andreas Färber <andreas.faerber@web.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-21 21:46:05 +01:00
Peter Maydell
d5138cf4a8 softfloat: Fix compilation failures with USE_SOFTFLOAT_STRUCT_TYPES
Make softfloat compile with USE_SOFTFLOAT_STRUCT_TYPES defined, by
adding and using new macros const_float16(), const_float32() and
const_float64() so you can use array initializers in an array of
float16/float32/float64 whether the types are bare or wrapped in the
structs.

[aurelien@aurel32.net: do the same for float16]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-02-10 20:16:43 +01:00
Peter Maydell
f591e1bedf softfloat: Correctly handle NaNs in float16_to_float32()
Correctly handle NaNs in float16_to_float32(), by defining and
using a float16ToCommonNaN() function, as we do with the other formats.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-02-10 18:28:29 +01:00
Peter Maydell
600e30d2b2 softfloat: Fix single-to-half precision float conversions
Fix various bugs in the single-to-half-precision conversion code:
 * input NaNs not correctly converted in IEEE mode
   (fixed by defining and using a commonNaNToFloat16())
 * wrong values returned when converting NaN/Inf into non-IEEE
   half precision value
 * wrong values returned for conversion of values which are
   on the boundary between denormal and zero for the half
   precision format
 * zeroes not correctly identified
 * excessively large results in non-IEEE mode should
   generate InvalidOp, not Overflow

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-02-10 18:28:21 +01:00
Christophe Lyon
bcd4d9afd4 softfloat: Honour default_nan_mode for float-to-float conversions
Honour the default_nan_mode flag when doing conversions between
different floating point formats, as well as when returning a NaN from
a two-operand floating point function. This corrects the behaviour
of float<->double conversions on both ARM and SH4.

Signed-off-by: Christophe Lyon <christophe.lyon@st.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-02-10 18:28:19 +01:00
Peter Maydell
bb4d4bb376 softfloat: Add float16 type and float16 NaN handling functions
Add a float16 type to softfloat, rather than using bits16 directly.
Also add the missing functions float16_is_quiet_nan(),
float16_is_signaling_nan() and float16_maybe_silence_nan(),
which are needed for the float16 conversion routines.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-02-10 18:28:09 +01:00
Peter Maydell
37d18660bb softfloat: Implement flushing input denormals to zero
Add support to softfloat for flushing input denormal float32 and float64
to zero. softfloat's existing 'flush_to_zero' flag only flushes denormals
to zero on output. Some CPUs need input denormals to be flushed before
processing as well. Implement this, using a new status flag to enable it
and a new exception status bit to indicate when it has happened. Existing
CPUs should be unaffected as there is no behaviour change unless the
mode is enabled.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-06 22:16:59 +01:00
Peter Maydell
cbcef455a2 softfloat: Add float/double to 16 bit integer conversion functions
The ARM architecture needs float/double to 16 bit integer conversions.
(The 32 bit versions aren't sufficient because of the requirement
to saturate at 16 bit MAXINT/MININT and to get the exception bits right.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Nathan Froyd <froydnj@codesourcery.com>
2010-12-07 15:37:34 +00:00
Aurelien Jarno
8229c9913a softfloat: add float32_exp2()
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-07-13 18:18:23 +02:00
Blue Swirl
ed086f3dde softfloat: remove dead assignments, spotted by clang
Value stored to 'bSign' is never read.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-03-07 13:49:58 +00:00
Paul Brook
600114988c ARM FP16 support
Implement the ARM VFP half precision floating point extensions.

Signed-off-by: Paul Brook <paul@codesourcery.com>
2009-11-19 16:45:20 +00:00
aurel32
374dfc33e2 soft-float: add float32_log2() and float64_log2()
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6518 c046a42c-6fe2-441c-8c8c-71466251a162
2009-02-05 13:42:47 +00:00
pbrook
fe76d97653 Implement flush-to-zero mode (denormal results are replaced with zero).
Signed-off-by: Paul Brook <paul@codesourcery.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6107 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-19 14:33:59 +00:00
pbrook
69397542d6 Correctly normalize values and handle zero inputs to scalbn functions.
Signed-off-by: Paul Brook <paul@codesourcery.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6102 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-19 12:59:28 +00:00
blueswir1
b55266b5a2 Suppress gcc 4.x -Wpointer-sign (included in -Wall) warnings
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5275 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-20 08:07:15 +00:00
blueswir1
1f58732916 128-bit float support for user mode
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3740 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-25 18:40:20 +00:00
blueswir1
cd8a25337e Fix more typos in softloat code (Eduardo Felipe)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3716 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-21 18:57:44 +00:00
pbrook
a1b91bb406 Fix typo in softfloat code.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3714 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-21 15:32:12 +00:00
pbrook
f090c9d4ad Add strict checking mode for softfp code.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3688 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-18 14:33:24 +00:00
pbrook
9ee6e8bb85 ARMv7 support.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3572 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-11 00:04:49 +00:00
j_mayer
3430b0be36 Ooops... Typo.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2520 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-20 22:25:37 +00:00
j_mayer
75d62a5856 Add missing softfloat helpers.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2518 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-20 22:10:42 +00:00
bellard
750afe93fd avoid using char when it is not necessary
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2204 c046a42c-6fe2-441c-8c8c-71466251a162
2006-10-28 19:27:11 +00:00
pbrook
e6e5906b6e ColdFire target.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2196 c046a42c-6fe2-441c-8c8c-71466251a162
2006-10-22 00:18:54 +00:00
bellard
1d6bda3561 added abs, chs and compare functions
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1338 c046a42c-6fe2-441c-8c8c-71466251a162
2005-03-13 18:52:29 +00:00
bellard
158142c2c2 soft float support
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1332 c046a42c-6fe2-441c-8c8c-71466251a162
2005-03-13 16:54:06 +00:00