softfloat: Add float/double to 16 bit integer conversion functions
The ARM architecture needs float/double to 16 bit integer conversions. (The 32 bit versions aren't sufficient because of the requirement to saturate at 16 bit MAXINT/MININT and to get the exception bits right.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Nathan Froyd <froydnj@codesourcery.com>
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fpu/softfloat.c
136
fpu/softfloat.c
@ -1353,6 +1353,55 @@ int32 float32_to_int32_round_to_zero( float32 a STATUS_PARAM )
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}
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/*----------------------------------------------------------------------------
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| Returns the result of converting the single-precision floating-point value
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| `a' to the 16-bit two's complement integer format. The conversion is
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| performed according to the IEC/IEEE Standard for Binary Floating-Point
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| Arithmetic, except that the conversion is always rounded toward zero.
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| If `a' is a NaN, the largest positive integer is returned. Otherwise, if
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| the conversion overflows, the largest integer with the same sign as `a' is
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| returned.
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*----------------------------------------------------------------------------*/
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int16 float32_to_int16_round_to_zero( float32 a STATUS_PARAM )
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{
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flag aSign;
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int16 aExp, shiftCount;
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bits32 aSig;
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int32 z;
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aSig = extractFloat32Frac( a );
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aExp = extractFloat32Exp( a );
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aSign = extractFloat32Sign( a );
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shiftCount = aExp - 0x8E;
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if ( 0 <= shiftCount ) {
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if ( float32_val(a) != 0xC7000000 ) {
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float_raise( float_flag_invalid STATUS_VAR);
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if ( ! aSign || ( ( aExp == 0xFF ) && aSig ) ) {
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return 0x7FFF;
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}
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}
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return (sbits32) 0xffff8000;
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}
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else if ( aExp <= 0x7E ) {
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if ( aExp | aSig ) {
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STATUS(float_exception_flags) |= float_flag_inexact;
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}
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return 0;
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}
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shiftCount -= 0x10;
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aSig = ( aSig | 0x00800000 )<<8;
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z = aSig>>( - shiftCount );
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if ( (bits32) ( aSig<<( shiftCount & 31 ) ) ) {
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STATUS(float_exception_flags) |= float_flag_inexact;
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}
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if ( aSign ) {
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z = - z;
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}
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return z;
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}
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/*----------------------------------------------------------------------------
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| Returns the result of converting the single-precision floating-point value
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| `a' to the 64-bit two's complement integer format. The conversion is
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@ -2410,6 +2459,57 @@ int32 float64_to_int32_round_to_zero( float64 a STATUS_PARAM )
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}
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/*----------------------------------------------------------------------------
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| Returns the result of converting the double-precision floating-point value
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| `a' to the 16-bit two's complement integer format. The conversion is
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| performed according to the IEC/IEEE Standard for Binary Floating-Point
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| Arithmetic, except that the conversion is always rounded toward zero.
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| If `a' is a NaN, the largest positive integer is returned. Otherwise, if
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| the conversion overflows, the largest integer with the same sign as `a' is
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| returned.
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*----------------------------------------------------------------------------*/
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int16 float64_to_int16_round_to_zero( float64 a STATUS_PARAM )
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{
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flag aSign;
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int16 aExp, shiftCount;
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bits64 aSig, savedASig;
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int32 z;
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aSig = extractFloat64Frac( a );
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aExp = extractFloat64Exp( a );
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aSign = extractFloat64Sign( a );
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if ( 0x40E < aExp ) {
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if ( ( aExp == 0x7FF ) && aSig ) {
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aSign = 0;
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}
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goto invalid;
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}
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else if ( aExp < 0x3FF ) {
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if ( aExp || aSig ) {
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STATUS(float_exception_flags) |= float_flag_inexact;
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}
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return 0;
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}
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aSig |= LIT64( 0x0010000000000000 );
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shiftCount = 0x433 - aExp;
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savedASig = aSig;
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aSig >>= shiftCount;
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z = aSig;
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if ( aSign ) {
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z = - z;
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}
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if ( ( (int16_t)z < 0 ) ^ aSign ) {
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invalid:
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float_raise( float_flag_invalid STATUS_VAR);
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return aSign ? (sbits32) 0xffff8000 : 0x7FFF;
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}
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if ( ( aSig<<shiftCount ) != savedASig ) {
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STATUS(float_exception_flags) |= float_flag_inexact;
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}
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return z;
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}
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/*----------------------------------------------------------------------------
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| Returns the result of converting the double-precision floating-point value
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| `a' to the 64-bit two's complement integer format. The conversion is
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@ -5632,6 +5732,24 @@ unsigned int float32_to_uint32_round_to_zero( float32 a STATUS_PARAM )
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return res;
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}
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unsigned int float32_to_uint16_round_to_zero( float32 a STATUS_PARAM )
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{
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int64_t v;
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unsigned int res;
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v = float32_to_int64_round_to_zero(a STATUS_VAR);
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if (v < 0) {
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res = 0;
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float_raise( float_flag_invalid STATUS_VAR);
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} else if (v > 0xffff) {
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res = 0xffff;
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float_raise( float_flag_invalid STATUS_VAR);
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} else {
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res = v;
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}
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return res;
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}
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unsigned int float64_to_uint32( float64 a STATUS_PARAM )
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{
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int64_t v;
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@ -5668,6 +5786,24 @@ unsigned int float64_to_uint32_round_to_zero( float64 a STATUS_PARAM )
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return res;
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}
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unsigned int float64_to_uint16_round_to_zero( float64 a STATUS_PARAM )
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{
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int64_t v;
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unsigned int res;
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v = float64_to_int64_round_to_zero(a STATUS_VAR);
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if (v < 0) {
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res = 0;
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float_raise( float_flag_invalid STATUS_VAR);
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} else if (v > 0xffff) {
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res = 0xffff;
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float_raise( float_flag_invalid STATUS_VAR);
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} else {
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res = v;
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}
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return res;
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}
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/* FIXME: This looks broken. */
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uint64_t float64_to_uint64 (float64 a STATUS_PARAM)
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{
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@ -251,6 +251,8 @@ float32 float16_to_float32( bits16, flag STATUS_PARAM );
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/*----------------------------------------------------------------------------
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| Software IEC/IEEE single-precision conversion routines.
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*----------------------------------------------------------------------------*/
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int float32_to_int16_round_to_zero( float32 STATUS_PARAM );
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unsigned int float32_to_uint16_round_to_zero( float32 STATUS_PARAM );
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int float32_to_int32( float32 STATUS_PARAM );
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int float32_to_int32_round_to_zero( float32 STATUS_PARAM );
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unsigned int float32_to_uint32( float32 STATUS_PARAM );
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@ -327,6 +329,8 @@ INLINE int float32_is_any_nan(float32 a)
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/*----------------------------------------------------------------------------
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| Software IEC/IEEE double-precision conversion routines.
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*----------------------------------------------------------------------------*/
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int float64_to_int16_round_to_zero( float64 STATUS_PARAM );
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unsigned int float64_to_uint16_round_to_zero( float64 STATUS_PARAM );
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int float64_to_int32( float64 STATUS_PARAM );
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int float64_to_int32_round_to_zero( float64 STATUS_PARAM );
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unsigned int float64_to_uint32( float64 STATUS_PARAM );
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