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amd_k6_2_chomper.cc
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allow to select CPU level = 5 from .bochsrc even when Bochs is compiled with CPU_LEVEL=6
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2013-04-17 19:46:11 +00:00 |
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amd_k6_2_chomper.h
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allow to select CPU level = 5 from .bochsrc even when Bochs is compiled with CPU_LEVEL=6
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2013-04-17 19:46:11 +00:00 |
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amd_k6_2_chomper.txt
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- Fixed compilation issue with cpu-level=5
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2011-08-30 22:00:27 +00:00 |
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athlon64_clawhammer.cc
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fixes for SVN. also turion64_tyler supports RDTSCP - include it in CPUID
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2012-01-01 17:54:41 +00:00 |
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athlon64_clawhammer.h
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support more than 32-bit cpu features vector
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2011-09-14 20:22:24 +00:00 |
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athlon64_clawhammer.txt
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Added another CPU to CPUDB: p4_willamette (one more without x86-64 support).
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2011-07-31 18:43:46 +00:00 |
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athlon64_venice.cc
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Added Haswell configuration to CPUDB
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2013-06-20 19:33:30 +00:00 |
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athlon64_venice.h
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Major commit !
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2012-02-13 23:29:01 +00:00 |
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athlon64_venice.txt
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Major commit !
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2012-02-13 23:29:01 +00:00 |
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atom_n270.cc
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Added Haswell configuration to CPUDB
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2013-06-20 19:33:30 +00:00 |
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atom_n270.h
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fixed 64-bit segment print from internal debugger
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2012-06-14 18:56:47 +00:00 |
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atom_n270.txt
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dos2unix
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2011-08-03 17:50:23 +00:00 |
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core2_penryn_t9600.cc
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Added Haswell configuration to CPUDB
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2013-06-20 19:33:30 +00:00 |
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core2_penryn_t9600.h
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fixed 64-bit segment print from internal debugger
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2012-06-14 18:56:47 +00:00 |
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core2_penryn_t9600.txt
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dos2unix for generic_cpuid.cc
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2011-08-08 18:20:29 +00:00 |
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core_duo_t2400_yonah.cc
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Added Haswell configuration to CPUDB
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2013-06-20 19:33:30 +00:00 |
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core_duo_t2400_yonah.h
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fixed 64-bit segment print from internal debugger
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2012-06-14 18:56:47 +00:00 |
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core_duo_t2400_yonah.txt
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Major commit !
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2012-02-13 23:29:01 +00:00 |
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corei5_arrandale_m520.cc
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Added Haswell configuration to CPUDB
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2013-06-20 19:33:30 +00:00 |
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corei5_arrandale_m520.h
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Added Haswell configuration to CPUDB
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2013-06-20 19:33:30 +00:00 |
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corei5_arrandale_m520.txt
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Major commit !
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2012-02-13 23:29:01 +00:00 |
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corei5_lynnfield_750.cc
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Added Haswell configuration to CPUDB
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2013-06-20 19:33:30 +00:00 |
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corei5_lynnfield_750.h
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Added Haswell configuration to CPUDB
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2013-06-20 19:33:30 +00:00 |
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corei5_lynnfield_750.txt
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Added Corei5 750 (Lynnfield) configuration to the CPUDB
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2012-01-02 20:59:02 +00:00 |
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corei7_haswell_4770.cc
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implemented fcs/fds deprecation. added haswell to cpudb.h as well
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2013-06-20 20:12:53 +00:00 |
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corei7_haswell_4770.h
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Added Haswell configuration to CPUDB
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2013-06-20 19:33:30 +00:00 |
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corei7_haswell_4770.txt
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Added Haswell configuration to CPUDB
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2013-06-20 19:33:30 +00:00 |
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corei7_ivy_bridge_3770K.cc
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Added Haswell configuration to CPUDB
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2013-06-20 19:33:30 +00:00 |
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corei7_ivy_bridge_3770K.h
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Added Haswell configuration to CPUDB
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2013-06-20 19:33:30 +00:00 |
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corei7_ivy_bridge_3770K.txt
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added AMD Bulldozer architecture CPU (Zambezi) to CPUDB
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2013-01-07 19:33:04 +00:00 |
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corei7_sandy_bridge_2600K.cc
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Added Haswell configuration to CPUDB
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2013-06-20 19:33:30 +00:00 |
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corei7_sandy_bridge_2600K.h
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Added Haswell configuration to CPUDB
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2013-06-20 19:33:30 +00:00 |
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corei7_sandy_bridge_2600K.txt
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Added another CPU to CPUDB: p4_willamette (one more without x86-64 support).
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2011-07-31 18:43:46 +00:00 |
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Makefile.in
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Added Haswell configuration to CPUDB
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2013-06-20 19:33:30 +00:00 |
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p2_klamath.cc
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Major commit !
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2012-02-13 23:29:01 +00:00 |
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p2_klamath.h
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Major commit !
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2012-02-13 23:29:01 +00:00 |
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p2_klamath.txt
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Major commit !
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2012-02-13 23:29:01 +00:00 |
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p3_katmai.cc
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- Now you could disable x86-64 from .bochsrc so now it is possible to emulate
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2011-09-25 17:36:20 +00:00 |
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p3_katmai.h
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- Now you could disable x86-64 from .bochsrc so now it is possible to emulate
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2011-09-25 17:36:20 +00:00 |
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p3_katmai.txt
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Added another CPU to CPUDB: p4_willamette (one more without x86-64 support).
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2011-07-31 18:43:46 +00:00 |
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p4_prescott_celeron_336.cc
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Added Haswell configuration to CPUDB
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2013-06-20 19:33:30 +00:00 |
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p4_prescott_celeron_336.h
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fixed 64-bit segment print from internal debugger
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2012-06-14 18:56:47 +00:00 |
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p4_prescott_celeron_336.txt
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Added another CPU to CPUDB: p4_willamette (one more without x86-64 support).
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2011-07-31 18:43:46 +00:00 |
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p4_willamette.cc
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Added Haswell configuration to CPUDB
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2013-06-20 19:33:30 +00:00 |
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p4_willamette.h
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cleaned up code duplication in CPUDB classes
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2012-01-07 17:06:03 +00:00 |
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p4_willamette.txt
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Added another CPU to CPUDB: p4_willamette (one more without x86-64 support).
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2011-07-31 18:43:46 +00:00 |
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pentium_mmx.cc
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allow to select CPU level = 5 from .bochsrc even when Bochs is compiled with CPU_LEVEL=6
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2013-04-17 19:46:11 +00:00 |
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pentium_mmx.h
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allow to select CPU level = 5 from .bochsrc even when Bochs is compiled with CPU_LEVEL=6
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2013-04-17 19:46:11 +00:00 |
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pentium_mmx.txt
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Major commit !
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2012-02-13 23:29:01 +00:00 |
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phenomx3_8650_toliman.cc
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added AMD Bulldozer architecture CPU (Zambezi) to CPUDB
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2013-01-07 19:33:04 +00:00 |
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phenomx3_8650_toliman.h
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SVM: Added EXITINFO2 write on VMEXIT (missed in prev commit)
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2012-02-19 20:15:23 +00:00 |
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phenomx3_8650_toliman.txt
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Major commit !
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2012-02-13 23:29:01 +00:00 |
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turion64_tyler.cc
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Major commit !
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2012-02-13 23:29:01 +00:00 |
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turion64_tyler.h
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Major commit !
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2012-02-13 23:29:01 +00:00 |
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turion64_tyler.txt
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Major commit !
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2012-02-13 23:29:01 +00:00 |
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zambezi.cc
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implemented pause threshold count in SVN + bugfix in SMAP
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2013-01-08 21:03:22 +00:00 |
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zambezi.h
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added AMD Bulldozer architecture CPU (Zambezi) to CPUDB
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2013-01-07 19:33:04 +00:00 |
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zambezi.txt
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added AMD Bulldozer architecture CPU (Zambezi) to CPUDB
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2013-01-07 19:33:04 +00:00 |
