Stanislav Shwartsman
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27e23ad1eb
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give priority for VMX induced #UD in INVPCID and RDTSCP instructions over all other exeptions that could be generated there
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2019-10-24 19:49:25 +00:00 |
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Stanislav Shwartsman
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72b9d26717
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coding style changes, tab2space, macro2function or macro2const
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2019-10-17 19:23:27 +00:00 |
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Stanislav Shwartsman
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eec720c62b
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convert bochs.h macros to inline functions with strong types
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2019-10-16 20:46:00 +00:00 |
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Stanislav Shwartsman
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64ae3fe1ba
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convert bochs.h macros to inline functions with strong types
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2019-10-16 20:19:34 +00:00 |
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Stanislav Shwartsman
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bb5ccc97c1
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remove unused function parameter
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2019-10-16 19:53:04 +00:00 |
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Stanislav Shwartsman
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9c61e9e9f5
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remove unused function parameter
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2019-10-16 19:48:21 +00:00 |
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Stanislav Shwartsman
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10c23b5d39
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implement fasstring for 64-bit mode as well
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2019-10-14 19:50:47 +00:00 |
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Stanislav Shwartsman
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9d7233a9b5
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fixed code duplication in fast string invocaion code
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2019-10-14 19:15:01 +00:00 |
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Stanislav Shwartsman
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bf16e720f8
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add faststring mode for REP MOVSW in 32-bit mode
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2019-10-14 18:12:37 +00:00 |
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Stanislav Shwartsman
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fe7acbb6a0
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more faststring cleanup
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2019-10-14 14:54:07 +00:00 |
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Stanislav Shwartsman
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ee3f1b91a3
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allow fast string only for forward strings and simplify the code
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2019-10-14 14:45:01 +00:00 |
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Stanislav Shwartsman
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f0245b5f2b
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introduce special handlers for zero-idiom instructions - ~1% speedup to simulation. infra for fast string emulation in 64-bit mode
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2019-10-14 06:40:19 +00:00 |
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Stanislav Shwartsman
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d6e08702e4
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add Icelake-U model to CPUDB database. TODO: verify its VMX features
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2019-09-24 20:26:14 +00:00 |
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Stanislav Shwartsman
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2ae332cce8
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patch by Luigu.B - significantly speedup multi-threaded guest simulation
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2019-08-09 19:57:13 +00:00 |
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Stanislav Shwartsman
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2eb47f866f
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added minor clarifications based on most recent AMD SDM published
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2019-07-30 18:17:21 +00:00 |
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Stanislav Shwartsman
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49ebaf8397
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typofix: attached MASK_K0 attr to wrong opcode
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2019-05-25 19:10:55 +00:00 |
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Stanislav Shwartsman
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bc4af1b08d
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add missing break statement in disasm.cc
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2019-05-25 19:08:39 +00:00 |
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Stanislav Shwartsman
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4d10852c04
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impemented recently published VP2INTERSECTD/Q instructions
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2019-05-25 19:07:09 +00:00 |
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Stanislav Shwartsman
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85780d939a
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extract MONITOR/MWAIT stuff to separate trsnlation unit
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2019-05-25 18:32:17 +00:00 |
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Stanislav Shwartsman
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55d2dc6b0c
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add some CPUID and VMCS definitions from latest SDM
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2019-05-22 18:22:22 +00:00 |
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Stanislav Shwartsman
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0c28705b18
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fixed compilation under MAC env
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2019-05-18 04:50:07 +00:00 |
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Stanislav Shwartsman
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662b252507
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added missing endif
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2019-04-17 16:04:34 +00:00 |
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Stanislav Shwartsman
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a022d71774
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fixed compilation
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2019-04-14 04:05:04 +00:00 |
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Stanislav Shwartsman
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54bdb24e4b
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remove MOVDIRI opcode extension for now until fugured out how nicely do MOVDIR64B, they better to be both done with same CPUID feature name
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2019-02-22 19:15:53 +00:00 |
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Stanislav Shwartsman
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3e007fbdea
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fixed copy-pasted issue with decoding
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2019-02-17 21:54:38 +00:00 |
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Stanislav Shwartsman
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c3f7a34cf5
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fixed copy-pasted issue with decoding
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2019-02-17 21:41:45 +00:00 |
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Stanislav Shwartsman
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3da93728b3
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split some opcode reference tables in new decoder between x86-64 and 32 for better perf
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2019-02-17 21:22:54 +00:00 |
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Stanislav Shwartsman
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cd79d22113
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fixes for 32-bit mode only compilation
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2019-02-16 19:42:04 +00:00 |
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Stanislav Shwartsman
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bfd7bb2c13
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remove redundant VL512 runtime check, redundant with new decoder
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2019-02-16 19:25:32 +00:00 |
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Stanislav Shwartsman
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4f625b23e0
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enable yet another Bochs new decoder. It is a bit slower than old one but it is much more extendable so adding new opcode won't be nightmare anymore
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2019-02-16 15:23:24 +00:00 |
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Stanislav Shwartsman
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61dcc4ace7
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remove unreferenced decode table
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2019-01-29 13:44:39 +00:00 |
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Stanislav Shwartsman
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f8ec18acd5
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fix decode/disasm of AVX512-VBMI2 VPSH*D* opcodes
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2019-01-27 18:52:03 +00:00 |
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Stanislav Shwartsman
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0b18a42e4e
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fixed decoding of AVX-512 opcodes
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2019-01-27 17:35:21 +00:00 |
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Stanislav Shwartsman
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5cb4639891
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fixed decoding of AVX-512 opcodes
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2019-01-27 17:31:28 +00:00 |
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Stanislav Shwartsman
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6dc5cfe80b
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fixed typo in opcode name
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2019-01-24 20:10:46 +00:00 |
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Stanislav Shwartsman
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af75c2a81e
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fixed comment in the opcode table for EVEX
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2019-01-22 18:31:39 +00:00 |
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Stanislav Shwartsman
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9bc7faf493
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dump all supported CPU fetures into Bochs log from CPUID object
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2019-01-05 20:17:39 +00:00 |
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Stanislav Shwartsman
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264b797363
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fixed compilation without VMX=2
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2019-01-03 06:28:15 +00:00 |
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Stanislav Shwartsman
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098791bf95
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report MONITOR/MWAITX for Ryzen configuration in CPUID
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2018-12-01 12:15:57 +00:00 |
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Stanislav Shwartsman
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7a183ab520
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fixed PDE4M reserved bits checking if physical address wider than 40 bit
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2018-11-22 11:51:33 +00:00 |
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Stanislav Shwartsman
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eff201773f
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convert some defines to enums and const expressions
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2018-11-17 12:45:44 +00:00 |
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Stanislav Shwartsman
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e387876145
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Enable PML VMX feature in Skylake-X
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2018-10-26 19:54:22 +00:00 |
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Stanislav Shwartsman
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2e192372c0
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fixes for CNL CPUID
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2018-10-26 19:46:56 +00:00 |
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Stanislav Shwartsman
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a9aa1040c1
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add Intel Cannonlake CPU model to CPUDB featuring AVF512FMA52 and SHA instructions
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2018-10-26 09:23:58 +00:00 |
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Stanislav Shwartsman
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cf41679b53
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closing bug report: Missing TLB_flush on VMX_VMEXIT_EPT_VIOLATION
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2018-08-30 20:18:27 +00:00 |
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Stanislav Shwartsman
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3995dc13aa
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fixed compilation of CLZERO pn cpu-level<6
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2018-08-26 18:11:10 +00:00 |
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Stanislav Shwartsman
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965bcc2606
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support 64-bit in 'info tab' debugger command and also speed it up significantly
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2018-08-14 08:09:09 +00:00 |
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Stanislav Shwartsman
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eebdb4d63a
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avoid gcc 7.3 warning
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2018-05-27 19:09:59 +00:00 |
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Stanislav Shwartsman
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a8413aa838
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update comments base on latest AMD spec
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2018-05-27 18:13:24 +00:00 |
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Stanislav Shwartsman
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fcd9ce1634
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fix compilation without x86_64
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2018-04-15 14:22:16 +00:00 |
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Stanislav Shwartsman
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d000e21001
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added MOVDIRI opcode implementation
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2018-04-06 05:06:36 +00:00 |
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Stanislav Shwartsman
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fd15b61d94
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keep def of YMM/ZMM register even if AVX or EVEX are not compiled in and let reading/writing them to MEM
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2018-04-04 19:31:56 +00:00 |
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Stanislav Shwartsman
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8c9f7f54b6
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update CPUID definitions with recently published EAS-33 extensions document
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2018-04-04 18:15:44 +00:00 |
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Stanislav Shwartsman
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0cd49ddae4
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fixed compilation with EVEX disabled
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2018-03-29 08:50:38 +00:00 |
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Stanislav Shwartsman
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773f1b7e42
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cleanup return value of all instruction handlers
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2018-02-16 07:57:32 +00:00 |
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Stanislav Shwartsman
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2bca4cc310
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improve debug print for SPP access
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2018-01-27 21:25:46 +00:00 |
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Stanislav Shwartsman
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afc2ee6bfd
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Implemented SPP: EPT-Based Subpage Protection. Cleaned code duplication between FXSAVE/FXRSTORE and XSAVE/XRSTOR (save/restore of SSE code is the same)
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2018-01-27 21:20:33 +00:00 |
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Stanislav Shwartsman
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a9ac81e092
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convert defines to const and enum in paging.cc
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2018-01-27 19:31:39 +00:00 |
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Stanislav Shwartsman
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769ed3ef88
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fixed MOVBE instruction decoding
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2018-01-23 19:53:34 +00:00 |
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Stanislav Shwartsman
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7d1a524ff0
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fix indentation after tab2space
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2018-01-11 08:47:02 +00:00 |
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Stanislav Shwartsman
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6d93ba14ec
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tab2space
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2018-01-11 08:45:00 +00:00 |
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Stanislav Shwartsman
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3c08cfedf2
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fixed buffer overflow when printing instruction disasm for opcode bytes which cannot be decoded
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2017-12-31 21:22:04 +00:00 |
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Stanislav Shwartsman
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6566cab8aa
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fixed new disasm for avx2 opcodes
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2017-12-30 18:45:21 +00:00 |
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Stanislav Shwartsman
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4c03fe3e2c
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fixed disasm of vcvtps2ph/ph2ps opcodes
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2017-12-28 19:59:42 +00:00 |
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Stanislav Shwartsman
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27a7925810
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fix for MOV to CR3 in long mode with PCID enabled - patch by Kent Williams
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2017-12-25 19:49:45 +00:00 |
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Stanislav Shwartsman
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ed8fa8ac61
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fix compilation with no AVX enabled
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2017-12-24 15:38:21 +00:00 |
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Stanislav Shwartsman
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ca034f0642
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fixed disasm of sse insertps instruction
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2017-12-21 18:18:10 +00:00 |
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Stanislav Shwartsman
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59c542fb06
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fix disasm of FISTTP opcodes
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2017-12-19 20:36:55 +00:00 |
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Stanislav Shwartsman
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4337a062e2
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disasm memsize for gather opcodes
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2017-12-19 19:51:55 +00:00 |
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Stanislav Shwartsman
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15187110ef
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implement disasm of implicit memory reference for maskmovdqu/maskmovq opcodes. fix vmaskmovdqu disasm for legacy disasm as well
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2017-12-19 19:45:30 +00:00 |
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Stanislav Shwartsman
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e086f7ba19
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split INSERTPS opcode to reg and mem forms
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2017-12-19 19:25:40 +00:00 |
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Stanislav Shwartsman
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ce3eafa535
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disasm fix
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2017-12-17 18:47:21 +00:00 |
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Stanislav Shwartsman
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79ec183ff6
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fixup for MMX opcodes disasm
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2017-12-17 17:21:02 +00:00 |
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Stanislav Shwartsman
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5dc5e01a12
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disasm fixes and reorg of pinsr* opcodes
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2017-12-16 18:34:20 +00:00 |
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Stanislav Shwartsman
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6a4e8ff2f1
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fixed typo in prev commit
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2017-12-13 21:08:10 +00:00 |
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Stanislav Shwartsman
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f362f34ed6
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correctly decode PINSRQ instruction
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2017-12-13 20:59:41 +00:00 |
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Stanislav Shwartsman
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50a799ea11
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split handlers for PINSRD/Q opcodes. fix disasm for MULX instruction
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2017-12-13 20:18:59 +00:00 |
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Stanislav Shwartsman
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07bff3be43
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fixed decoding of VPINSRB/W/D/Q and VINSERTPS with EVEX prefix
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2017-12-13 20:02:12 +00:00 |
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Stanislav Shwartsman
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8a311515dd
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correctly decode VPEXTRB/W/D/Q - these opcodes allowed to be with VEX.L=0 only
fixed disasm module compilation with no AVX enabled
remove duplicate opcode handlers
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2017-12-13 19:51:25 +00:00 |
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Stanislav Shwartsman
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2f3c9d3c8c
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correct disasm for movsxd opcode
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2017-12-13 18:44:13 +00:00 |
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Stanislav Shwartsman
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c1dc514c2a
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clarify disasm of movlhps/movhlps opcodes
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2017-12-12 08:55:09 +00:00 |
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Stanislav Shwartsman
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fd953421f4
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new disasm: add correct memaccess size for FLDCW
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2017-12-11 19:58:09 +00:00 |
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Stanislav Shwartsman
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a84d9cf1c7
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disasm: fix crc32 operand description
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2017-12-11 19:45:50 +00:00 |
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Stanislav Shwartsman
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a028ef7c9c
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bugfix for decoder with EVEX enabled
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2017-12-11 19:29:11 +00:00 |
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Stanislav Shwartsman
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e46f37b40e
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fixed disasm of memsize for sse legacy instructions
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2017-12-11 18:33:33 +00:00 |
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Stanislav Shwartsman
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404a5f2c53
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bugfix for previous commit
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2017-12-11 16:41:48 +00:00 |
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Stanislav Shwartsman
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b03f78d652
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updates for bochs decoder and decoder based disasm
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2017-12-11 15:45:43 +00:00 |
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Stanislav Shwartsman
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c80e587ded
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properly handle kmask registers in modrm form
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2017-12-05 19:33:23 +00:00 |
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Stanislav Shwartsman
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8f15cfb514
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fixed link err with debugger enabled
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2017-12-05 19:23:41 +00:00 |
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Stanislav Shwartsman
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31ea453921
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fixed bogus assert
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2017-12-02 16:40:03 +00:00 |
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Stanislav Shwartsman
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eaa05c32e8
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link without LOGIO for standalone decoder mode
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2017-12-01 21:27:30 +00:00 |
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Stanislav Shwartsman
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60591800f1
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handle lock mov cr0 amd feature out decoder critical path
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2017-12-01 21:18:16 +00:00 |
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Stanislav Shwartsman
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01067cb4b9
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another compilation fix for new disasm stand-alone module
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2017-11-29 19:24:00 +00:00 |
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Stanislav Shwartsman
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a7e58973ce
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fixed typo
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2017-11-27 20:26:54 +00:00 |
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Stanislav Shwartsman
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c8d9aeb377
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mark blocks of code which not supposed to be compiled for stand-alone bochs cpu decoder
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2017-11-27 20:25:04 +00:00 |
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Stanislav Shwartsman
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cef6c7fb98
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fix for new disasm
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2017-11-26 19:38:58 +00:00 |
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Stanislav Shwartsman
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596b3b6eb8
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reduce CPU dependencies from fetchdecode module
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2017-11-25 20:20:34 +00:00 |
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Stanislav Shwartsman
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0c604d27d1
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fixed compilation with no PKEYS enabled
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2017-11-12 20:15:48 +00:00 |
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Stanislav Shwartsman
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875c38a05c
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POPFD/POPFQ always clear RF flag (instead of reading it from stack image)
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2017-11-11 12:27:50 +00:00 |
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Stanislav Shwartsman
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045a1cd637
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XSAVEC/XSAVES should be supported in SKL-X CPUID
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2017-11-11 12:04:26 +00:00 |
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