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3266 Commits

Author SHA1 Message Date
Stanislav Shwartsman
ea255b5bf7 fixed VMCS memory type calculation 2015-07-12 20:10:43 +00:00
Stanislav Shwartsman
129db3bfaf fixed typo in the list of the vmcs exits 2015-07-12 15:26:34 +00:00
Stanislav Shwartsman
9315742f3d cleanups of vmcs mapping related stuff 2015-07-07 21:06:56 +00:00
Stanislav Shwartsman
e9f9f824be return value from clear/set_mapping functions 2015-07-06 20:16:34 +00:00
Stanislav Shwartsman
28c19ecec7 more interfaces to VMCS Mapping class 2015-07-06 20:14:56 +00:00
Stanislav Shwartsman
5fe1423ab6 introducr new class for VMCS mapping so it can be customized per cpuid 2015-07-06 18:46:57 +00:00
Stanislav Shwartsman
b86f01d410 update TODO 2015-06-29 19:57:04 +00:00
Stanislav Shwartsman
3fef7f32f6 added new bits definitions recently published 2015-06-29 19:53:56 +00:00
Stanislav Shwartsman
bc25883087 add new definitions from most recent AMD Software Developers Manual update. TODO: implement new AMD's MONITORX/MWAITX extensions 2015-06-22 21:46:50 +00:00
Stanislav Shwartsman
91086d0627 remove not relevant comments 2015-06-14 20:36:16 +00:00
Stanislav Shwartsman
3a0dff9b36 fixed Bochs compiled for 386 with FPU enabled 2015-06-10 20:36:46 +00:00
Stanislav Shwartsman
c43ea147bf ~1% emulation speedup by skipping pageWriteStamp check for stack writes. 
For now the optimization is supported only when no SMP is compiled in because it doesn't handle cross-modifying code.

The current stack page will cache also current pageWriteStamp for that page and could skip pageWriteStamp access if possible.
Any code fetch access missing trace cache will invalidate current stack page.
Code fetch accesses from another SMP threads should do the same to support SMP.

Next step:
 - support SMP
 - support pageWriteStamp access skipping for all other memory writes from all segments
 2015-05-23 19:34:59 +00:00
Stanislav Shwartsman
745d843c88 change BX_INFO message to BX_DEBUG because it floods log 2015-05-19 20:21:17 +00:00
Stanislav Shwartsman
280a773323 fix vmexit qualification for some instructions after previous code reorg and inlining of resolve_modrm methods 2015-05-16 21:25:43 +00:00
Stanislav Shwartsman
b468316250 re-style old resolve macros after resolve function inlining 2015-05-16 21:06:59 +00:00
Stanislav Shwartsman
29585cae72 delete resolver.cc 2015-05-16 20:30:26 +00:00
Stanislav Shwartsman
f0d7379908 remove BxResolveModrm member in BxInstruction_c class and inline resolve functions into instruction handlers instead. helps to remove indirect branch mispredictions (suggested by Vtune). measured speedup on Win7-64 boot is 5%, on other guests it might vary between 1% and 5% 2015-05-16 20:29:49 +00:00
Stanislav Shwartsman
cf4b3f2542 optimize code duplication 2015-05-12 21:33:06 +00:00
Stanislav Shwartsman
9f18573740 Rename BX_CPU_CALL_METHODR to BX_CPU_RESOLVE_ADDR and introduce special cases BX_CPU_RESOLVE_ADDR_64 (for 64-bit mode only) and BX_CPU_RESOLVE_ADDR_32 (for 32-bit mode only) 2015-05-11 19:23:09 +00:00
Stanislav Shwartsman
b9b45f0d0d convert some defines to typed consts 2015-05-10 19:54:57 +00:00
Stanislav Shwartsman
0d79c5f986 Implemented Page Modification Logging VMX feature 2015-05-06 19:55:44 +00:00
Stanislav Shwartsman
2185d21eb7 fixed comments for PML acronym 2015-05-05 19:52:05 +00:00
Stanislav Shwartsman
a197977682 fixed typo 2015-05-05 19:37:01 +00:00
Stanislav Shwartsman
c9fba73a69 added defines about new VMX bits and controls related to Page Miss Logging (PML) EPT feature 2015-05-05 19:35:39 +00:00
Stanislav Shwartsman
16ab385e1d added cpuid/creg bits definition announced in recent 054 update of Intel SDM 2015-05-05 19:28:25 +00:00
Stanislav Shwartsman
5edd53186e optimize for target with no x86-64 support 2015-05-04 19:58:01 +00:00
Stanislav Shwartsman
28fc5083af remove the victim cache code to resolve assert in proc_ctrl.cc 2015-05-04 19:47:52 +00:00
Stanislav Shwartsman
4c34b97db1 fixed comment 2015-05-03 19:44:24 +00:00
Stanislav Shwartsman
5ef56d6d79 rename fpu function 2015-05-02 20:08:36 +00:00
Stanislav Shwartsman
4c7a05621c reorg of code managing MXCSR to softfloat status conversion 2015-05-02 19:54:48 +00:00
Stanislav Shwartsman
9be2f07d54 fix compilation err when SVM is enabled 2015-04-21 08:20:28 +00:00
Stanislav Shwartsman
e72f66ce49 added BX_CPP_AttrRegparmN to xmm/ymmz/zmm read methods matching cpu.h 2015-04-19 20:47:55 +00:00
Stanislav Shwartsman
239b1ae684 added missed vmexit reason to debug print 2015-04-18 19:25:58 +00:00
Stanislav Shwartsman
080ceb8293 don't crash when running on 386 with no FPU model 2015-03-27 21:39:24 +00:00
Stanislav Shwartsman
c360ddf60c correctly report memory type for EPT page table accesses 
TODO: support memory type for guest physical access under EPT
TODO: support memory type for SVM nested paging 
TODO: check what happens when PAT is not enabled in CPU configuration
 2015-03-23 20:27:36 +00:00
Stanislav Shwartsman
05635a9534 call correctly resolve_memtype function 2015-03-21 20:28:22 +00:00
Stanislav Shwartsman
56323b2806 bugfixes 2015-03-21 20:15:57 +00:00
Stanislav Shwartsman
a55c5e4eb8 correctly report memory type for page table accesses in x86 mode (not in EPT or SVM nested paging yet) 
TODO: support memory type with EPT / nested paging
TODO: check what happens when PAT is not enabled in CPU configuration
 2015-03-21 20:08:58 +00:00
Stanislav Shwartsman
e79185b0a0 refactor memtype methods 2015-03-02 20:51:59 +00:00
Stanislav Shwartsman
36f7bf0ba6 fixed ept memtype printout 2015-03-01 21:04:34 +00:00
Stanislav Shwartsman
8134dc67af supporting memory type provided by page tables with PCD,PWT and PAT bits 
TODO: support memory type with EPT
TODO: support memory type for intermediate page table accesses
TODO: check what happens when PAT is not enabled in CPU configuration
 2015-03-01 20:55:23 +00:00
Stanislav Shwartsman
9932384df3 fixed visual studio warning 2015-03-01 19:44:06 +00:00
Stanislav Shwartsman
53041981f7 supply PAT required memory type bits through new combined access interface 2015-02-28 14:06:04 +00:00
Stanislav Shwartsman
25b02dac4b code reorg before PAT memory type support 2015-02-28 14:01:11 +00:00
Stanislav Shwartsman
b74036d2d8 another try to fix the weird compilation error 2015-02-26 20:34:24 +00:00
Stanislav Shwartsman
4e859202a1 attemp to fix compilation issue 2015-02-25 19:43:47 +00:00
Stanislav Shwartsman
1e1c893041 introduce new 64bit packed register type and implement pat/mtrr and mmx registers through it 2015-02-23 21:17:33 +00:00
Stanislav Shwartsman
2bad0d0d12 fixed link error with debugger enabled, small speed optimization 2015-02-23 19:55:55 +00:00
Stanislav Shwartsman
2448c0cf74 fixed complation err 2015-02-23 17:55:09 +00:00
Stanislav Shwartsman
6c6b670551 fixed typo causing compilation error 2015-02-22 21:33:26 +00:00
Stanislav Shwartsman
0917d12e8b memory type report for physical accesses and RMW acccesses. todo: consider also pat 2015-02-22 21:26:26 +00:00
Stanislav Shwartsman
7a3e340e6d implement memory type calculation by mtrr. todo: memory type from page tables 2015-02-20 21:50:59 +00:00
Stanislav Shwartsman
e16c6eb30c preparations and interface definition for memory type support 2015-02-19 20:23:08 +00:00
Stanislav Shwartsman
a74e855185 added Broadwell ULT CPUID definition to CPUDB 2015-02-12 21:28:24 +00:00
Stanislav Shwartsman
901b7be1a8 code reorg 2015-02-12 20:18:35 +00:00
Stanislav Shwartsman
40312cec2d added pentium cpudb files 2015-02-11 21:44:24 +00:00
Stanislav Shwartsman
b60d7d3154 Cleanup of CPUDB modules, moved common functionality into bx_cpuid_t base class 
Added Pentium (P54C) AKA Pentium with no MMX to CPUDB
 2015-02-11 21:31:17 +00:00
Stanislav Shwartsman
adaca4a6f5 more correct limit4g fix 2015-02-08 06:37:59 +00:00
Stanislav Shwartsman
e80e911166 fixed compilation on cpu level < 6 2015-01-29 18:41:28 +00:00
Stanislav Shwartsman
d6631f767d correct alignment checking (on linear address and not on effective address) 2015-01-28 16:49:46 +00:00
Stanislav Shwartsman
51808f775d 4G optimization is active only when seg.base == 0 2015-01-27 15:47:02 +00:00
Stanislav Shwartsman
17c89d1c78 masked load-store optimization for avx-512 2015-01-26 20:52:03 +00:00
Stanislav Shwartsman
ee3841ef07 fixed more compilation problems and code cleanup 2015-01-26 20:01:25 +00:00
Stanislav Shwartsman
3a4bd2da51 fixed debug message 2015-01-26 19:16:51 +00:00
Stanislav Shwartsman
9a70727814 fixed fault priority for memory accesses requiring alignment 2015-01-26 19:09:58 +00:00
Stanislav Shwartsman
74da7a7092 fixed compilation err 2015-01-26 15:34:52 +00:00
Stanislav Shwartsman
b5a603c8c7 fixed %d->%u format found by cppcheck (patch by Maxim Derbasov) 2015-01-25 21:24:13 +00:00
Stanislav Shwartsman
ea390d58dc added new files, removed old files, remove obsolete assert 2015-01-25 20:58:04 +00:00
Stanislav Shwartsman
5e6955c5e7 Major rewrite of memory access methods to avoid massive code duplication and enable inlining of memory access methods 2015-01-25 20:55:10 +00:00
Stanislav Shwartsman
271f06026d fixed compilation err with SVM without VMX 2015-01-16 06:15:47 +00:00
Stanislav Shwartsman
63c3ed3f70 update (c) and fix instrumentation stub 2015-01-11 20:50:26 +00:00
Stanislav Shwartsman
3b237df41d Added far branch origin to bx_instr_far_branch instrumentation callback by user request 
Updated instrumentation examples
Fixed code duplication
 2015-01-11 20:45:39 +00:00
Stanislav Shwartsman
6fd2d32180 fixed exception error code for debugger and instrumentation 2014-12-18 19:45:03 +00:00
Volker Ruppert
2ec57b8a6b Fixed some more C++11 warnings. 2014-12-18 17:52:40 +00:00
Stanislav Shwartsman
fea4d47830 fixed spelling in comments 2014-12-16 20:11:08 +00:00
Stanislav Shwartsman
6700a3f5e6 fix cpuid patch merged 2014-12-16 06:52:24 +00:00
Stanislav Shwartsman
03dab0b0c9 remove debug prints from param tree dump in xml format, small code reorg 2014-11-30 21:26:33 +00:00
Stanislav Shwartsman
f01891faa2 fixed compilation err with perfmon disabled 2014-11-07 13:15:54 +00:00
Stanislav Shwartsman
9219c2c20b fixed format for debug printing x87 numbers 2014-11-05 18:29:35 +00:00
Stanislav Shwartsman
6e254743c1 Added missing sanity check. 
The sanity check would help to detect real Bochs crash issue under Win x64 with MSDEV
configure script under Mingw env decided that SIZEOF_INT_P == 4 which is terribly wrong for 64-bit host.
 2014-11-04 19:00:20 +00:00
Stanislav Shwartsman
9feed6d777 fixed bug in write_new_stack_qword 2014-11-03 14:34:20 +00:00
Volker Ruppert
b7c8323633 Fixed panic in case x86-64 support is not present (Bochs 2.6.7 P4-SMP release 
binaries are already fixed).
Usual updates after release (version strings, release tag).
 2014-11-02 14:14:36 +00:00
Stanislav Shwartsman
987e2ad223 Added definitions from recently published Intel Architecture 
Instruction Set Extensions Programming Reference rev22.
Implemented CLWB instruction
 2014-11-01 13:12:24 +00:00
Stanislav Shwartsman
45ddcf2e02 compilation fix 2014-11-01 11:51:03 +00:00
Stanislav Shwartsman
5f4e7f8b49 fixed compilation when APIC if snot enabled 2014-11-01 10:25:42 +00:00
Stanislav Shwartsman
618bc234ab changes in comments 2014-10-24 11:18:52 +00:00
Stanislav Shwartsman
f11b9a7f58 CPUID: "Yonah" and "Atom N-270" should report max virtual address as 32-bit in leaf 0x80000008 2014-10-22 19:53:23 +00:00
Stanislav Shwartsman
cb18f1e0a1 more use of the clearflagsOSZAPC 2014-10-22 18:24:33 +00:00
Stanislav Shwartsman
1c027b17d7 some lazy flags handling optimizations 2014-10-22 17:49:12 +00:00
Stanislav Shwartsman
25ad64f75a rename one more mem access handler 2014-10-21 19:11:21 +00:00
Stanislav Shwartsman
1de7a35031 update (c) 2014-10-20 21:10:52 +00:00
Stanislav Shwartsman
ea91354b3b code reorg : take laddr calculation out of 64-bit memory handlers. this creates generic linear address memory handlers which now could be used elsewhere 2014-10-20 21:08:29 +00:00
Stanislav Shwartsman
2c4b17ebff fixed compilation err without x86-64 compiled in 2014-10-16 06:29:58 +00:00
Stanislav Shwartsman
54a009ccf9 update CHANGES. added BX_INFO prints related to Perfmon usage 2014-10-15 19:04:28 +00:00
Stanislav Shwartsman
6252632e31 Fixed segmentation fault that could happen under rare conditions with handlers chaining speedups enabled. 
I saw that issue under gcc 4.9.0. for some reason gcc 4.9.0 didn't optimize next handler call in all fpu opcode handlers.
As result, instead of finishing the handler and jumping to next one, the next handler is called blowing up stack.
After some long period stack overflow might occur.

The fix simply limit the max chaining depth to 1000 traces (should be enough)
The same fix should be able to address the stack overflow problem when compiling with -O0 and handlers chaining speedup enabled.
 2014-10-15 18:00:04 +00:00
Stanislav Shwartsman
d82e51f947 added comment to RDPMC instr 2014-10-15 15:28:13 +00:00
Stanislav Shwartsman
841117c721 added more perfmon MSR defines into cpu.h 2014-10-15 15:21:38 +00:00
Stanislav Shwartsman
caab07e580 move common code (extended topology leaf) into base cpuid class to save code duplication 2014-10-15 14:25:08 +00:00
Stanislav Shwartsman
f8267ec3a7 rework in CPUID code (fixed code duplication). Re-enable perfmon reporting in CPUID because Win8/Win10 installation doesn't want to start without perfmon reported. TODO: implement basic perfmon support (at least only fixed counters) because win7-64 doesn't install with perfmon reported but not implemented 2014-10-15 08:04:38 +00:00
Stanislav Shwartsman
8d1e3b2ac1 Added statistics collection infrastructure in Bochs and 
implemented important CPU statistics which were used for Bochs CPU model performance analysis.
old statistics code from paging.cc and cpu.cc is replaced with new infrastructure.

In order to enale statitics collection in Bochs CPU:

- Enable statistics @ compilation time in cpu/cpustats.h
- Dump statistics periodically by adding -dumpstats N into Bochs command line
 2014-10-14 15:59:10 +00:00