added Broadwell ULT CPUID definition to CPUDB
This commit is contained in:
parent
901b7be1a8
commit
a74e855185
@ -54,6 +54,7 @@ CPUDB_OBJS = pentium.o \
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corei7_sandy_bridge_2600K.o \
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corei7_ivy_bridge_3770K.o \
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corei7_haswell_4770.o \
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broadwell_ult.o \
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zambezi.o \
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trinity_apu.o
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@ -154,6 +155,15 @@ corei5_lynnfield_750.o: corei5_lynnfield_750.@CPP_SUFFIX@ ../../bochs.h \
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../icache.h ../apic.h ../i387.h ../fpu/softfloat.h ../fpu/tag_w.h \
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../fpu/status_w.h ../fpu/control_w.h ../xmm.h ../../param_names.h \
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corei5_lynnfield_750.h ../../cpu/cpuid.h
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broadwell_ult.o: broadwell_ult.@CPP_SUFFIX@ ../../bochs.h \
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../../config.h ../../osdep.h ../../bx_debug/debug.h ../../config.h \
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../../osdep.h ../../gui/siminterface.h ../../cpudb.h \
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../../gui/paramtree.h ../../memory/memory.h ../../pc_system.h \
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../../gui/gui.h ../../instrument/stubs/instrument.h ../cpu.h ../access.h ../cpuid.h \
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../crregs.h ../descriptor.h ../instr.h ../ia_opcodes.h ../lazy_flags.h \
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../icache.h ../apic.h ../i387.h ../fpu/softfloat.h ../fpu/tag_w.h \
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../fpu/status_w.h ../fpu/control_w.h ../xmm.h ../../param_names.h \
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broadwell_ult.h
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corei7_haswell_4770.o: corei7_haswell_4770.@CPP_SUFFIX@ ../../bochs.h \
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../../config.h ../../osdep.h ../../bx_debug/debug.h ../../config.h \
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../../osdep.h ../../gui/siminterface.h ../../cpudb.h \
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bochs/cpu/cpudb/broadwell_ult.cc
Normal file
808
bochs/cpu/cpudb/broadwell_ult.cc
Normal file
@ -0,0 +1,808 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id$
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (c) 2015 Stanislav Shwartsman
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// Written by Stanislav Shwartsman [sshwarts at sourceforge net]
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
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//
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/////////////////////////////////////////////////////////////////////////
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#include "bochs.h"
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#include "cpu.h"
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#include "param_names.h"
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#include "broadwell_ult.h"
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#define LOG_THIS cpu->
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#if BX_SUPPORT_X86_64 && BX_SUPPORT_AVX
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broadwell_ult_t::broadwell_ult_t(BX_CPU_C *cpu): bx_cpuid_t(cpu)
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{
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if (! BX_SUPPORT_X86_64)
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BX_PANIC(("You must enable x86-64 for Intel Broadwell ULT configuration"));
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if (BX_SUPPORT_VMX == 1)
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BX_INFO(("You must compile with --enable-vmx=2 for Intel Core i7 Haswell VMX configuration"));
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if (! BX_SUPPORT_MONITOR_MWAIT)
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BX_INFO(("WARNING: MONITOR/MWAIT support is not compiled in !"));
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BX_INFO(("WARNING: RDRAND would not produce true random numbers !"));
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BX_INFO(("WARNING: RDSEED would not produce true random numbers !"));
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enable_cpu_extension(BX_ISA_X87);
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enable_cpu_extension(BX_ISA_486);
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enable_cpu_extension(BX_ISA_PENTIUM);
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enable_cpu_extension(BX_ISA_P6);
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enable_cpu_extension(BX_ISA_MMX);
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enable_cpu_extension(BX_ISA_SYSENTER_SYSEXIT);
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enable_cpu_extension(BX_ISA_CLFLUSH);
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enable_cpu_extension(BX_ISA_DEBUG_EXTENSIONS);
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enable_cpu_extension(BX_ISA_VME);
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enable_cpu_extension(BX_ISA_PSE);
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enable_cpu_extension(BX_ISA_PAE);
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enable_cpu_extension(BX_ISA_PGE);
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#if BX_PHY_ADDRESS_LONG
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enable_cpu_extension(BX_ISA_PSE36);
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#endif
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enable_cpu_extension(BX_ISA_MTRR);
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enable_cpu_extension(BX_ISA_PAT);
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enable_cpu_extension(BX_ISA_XAPIC);
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enable_cpu_extension(BX_ISA_X2APIC);
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enable_cpu_extension(BX_ISA_LONG_MODE);
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enable_cpu_extension(BX_ISA_LM_LAHF_SAHF);
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enable_cpu_extension(BX_ISA_CMPXCHG16B);
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enable_cpu_extension(BX_ISA_NX);
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enable_cpu_extension(BX_ISA_1G_PAGES);
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enable_cpu_extension(BX_ISA_PCID);
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enable_cpu_extension(BX_ISA_TSC_DEADLINE);
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enable_cpu_extension(BX_ISA_SSE);
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enable_cpu_extension(BX_ISA_SSE2);
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enable_cpu_extension(BX_ISA_SSE3);
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enable_cpu_extension(BX_ISA_SSSE3);
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enable_cpu_extension(BX_ISA_SSE4_1);
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enable_cpu_extension(BX_ISA_SSE4_2);
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enable_cpu_extension(BX_ISA_POPCNT);
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#if BX_SUPPORT_MONITOR_MWAIT
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enable_cpu_extension(BX_ISA_MONITOR_MWAIT);
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#endif
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#if BX_SUPPORT_VMX >= 2
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enable_cpu_extension(BX_ISA_VMX);
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#endif
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enable_cpu_extension(BX_ISA_RDTSCP);
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enable_cpu_extension(BX_ISA_XSAVE);
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enable_cpu_extension(BX_ISA_XSAVEOPT);
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enable_cpu_extension(BX_ISA_AES_PCLMULQDQ);
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enable_cpu_extension(BX_ISA_MOVBE);
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enable_cpu_extension(BX_ISA_AVX);
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enable_cpu_extension(BX_ISA_AVX_F16C);
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enable_cpu_extension(BX_ISA_AVX2);
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enable_cpu_extension(BX_ISA_AVX_FMA);
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enable_cpu_extension(BX_ISA_LZCNT);
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enable_cpu_extension(BX_ISA_BMI1);
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enable_cpu_extension(BX_ISA_BMI2);
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enable_cpu_extension(BX_ISA_FSGSBASE);
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enable_cpu_extension(BX_ISA_INVPCID);
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enable_cpu_extension(BX_ISA_SMEP);
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enable_cpu_extension(BX_ISA_RDRAND);
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enable_cpu_extension(BX_ISA_TSC_DEADLINE);
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enable_cpu_extension(BX_ISA_FCS_FDS_DEPRECATION);
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enable_cpu_extension(BX_ISA_RDSEED);
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enable_cpu_extension(BX_ISA_ADX);
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enable_cpu_extension(BX_ISA_SMAP);
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}
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void broadwell_ult_t::get_cpuid_leaf(Bit32u function, Bit32u subfunction, cpuid_function_t *leaf) const
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{
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static const char* brand_string = "Intel(R) Processor 5Y70 CPU @ 1.10GHz\0\0\0\0\0\0\0\0\0\0";
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static bx_bool cpuid_limit_winnt = SIM->get_param_bool(BXPN_CPUID_LIMIT_WINNT)->get();
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if (cpuid_limit_winnt)
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if (function > 2 && function < 0x80000000) function = 2;
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switch(function) {
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case 0x80000000:
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get_ext_cpuid_leaf_0(leaf);
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return;
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case 0x80000001:
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get_ext_cpuid_leaf_1(leaf);
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return;
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case 0x80000002:
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case 0x80000003:
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case 0x80000004:
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get_ext_cpuid_brand_string_leaf(brand_string, function, leaf);
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return;
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case 0x80000005:
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get_reserved_leaf(leaf);
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return;
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case 0x80000006:
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get_ext_cpuid_leaf_6(leaf);
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return;
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case 0x80000007:
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get_ext_cpuid_leaf_7(leaf);
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return;
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case 0x80000008:
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get_ext_cpuid_leaf_8(leaf);
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return;
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case 0x00000000:
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get_std_cpuid_leaf_0(leaf);
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return;
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case 0x00000001:
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get_std_cpuid_leaf_1(leaf);
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return;
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case 0x00000002:
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get_std_cpuid_leaf_2(leaf);
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return;
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case 0x00000003:
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get_reserved_leaf(leaf);
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return;
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case 0x00000004:
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get_std_cpuid_leaf_4(subfunction, leaf);
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return;
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case 0x00000005:
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get_std_cpuid_leaf_5(leaf);
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return;
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case 0x00000006:
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get_std_cpuid_leaf_6(leaf);
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return;
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case 0x00000007:
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get_std_cpuid_leaf_7(subfunction, leaf);
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return;
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case 0x00000008:
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case 0x00000009:
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get_reserved_leaf(leaf);
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return;
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case 0x0000000A:
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get_std_cpuid_leaf_A(leaf);
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return;
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case 0x0000000B:
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get_std_cpuid_extended_topology_leaf(subfunction, leaf);
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return;
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case 0x0000000C:
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get_reserved_leaf(leaf);
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return;
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case 0x0000000D:
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get_std_cpuid_xsave_leaf(subfunction, leaf);
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return;
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case 0x0000000E:
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case 0x0000000F:
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case 0x00000010:
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case 0x00000011:
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case 0x00000012:
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case 0x00000013:
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get_reserved_leaf(leaf);
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return;
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case 0x00000014:
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default:
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get_reserved_leaf(leaf); // Intel Processor Trace Enumeration is not supported yet
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return;
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}
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}
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#if BX_SUPPORT_VMX >= 2
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// MSR 00000480: 00DA-0400-0000-0012 BX_MSR_VMX_BASIC
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// MSR 00000481: 0000-007F-0000-0016 BX_MSR_VMX_PINBASED_CTRLS
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// MSR 00000482: FFF9-FFFE-0401-E172 BX_MSR_VMX_PROCBASED_CTRLS
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// MSR 00000483: 007F-FFFF-0003-6DFF BX_MSR_VMX_VMEXIT_CTRLS
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// MSR 00000484: 0000-FFFF-0000-11FF BX_MSR_VMX_VMENTRY_CTRLS
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// MSR 00000485: 0000-0000-3004-81E5 BX_MSR_VMX_MISC
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// MSR 00000486: 0000-0000-8000-0021 BX_MSR_VMX_CR0_FIXED0
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// MSR 00000487: 0000-0000-FFFF-FFFF BX_MSR_VMX_CR0_FIXED1
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// MSR 00000488: 0000-0000-0000-2000 BX_MSR_VMX_CR4_FIXED0
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// MSR 00000489: 0000-0000-0037-67FF BX_MSR_VMX_CR4_FIXED1
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// MSR 0000048A: 0000-0000-0000-002A BX_MSR_VMX_VMCS_ENUM
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// MSR 0000048B: 0005-7CFF-0000-0000 BX_MSR_VMX_PROCBASED_CTRLS2
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// MSR 0000048C: 0000-0F01-0633-4141 BX_MSR_VMX_MSR_VMX_EPT_VPID_CAP
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// MSR 0000048D: 0000-007F-0000-0016 BX_MSR_VMX_TRUE_PINBASED_CTRLS
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// MSR 0000048E: FFF9-FFFE-0400-6172 BX_MSR_VMX_TRUE_PINBASED_CTRLS
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// MSR 0000048F: 007F-FFFF-0003-6DFB BX_MSR_VMX_TRUE_VMEXIT_CTRLS
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// MSR 00000490: 0000-FFFF-0000-11FB BX_MSR_VMX_TRUE_VMENTRY_CTRLS
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Bit32u broadwell_ult_t::get_vmx_extensions_bitmask(void) const
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{
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return BX_VMX_TPR_SHADOW |
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BX_VMX_VIRTUAL_NMI |
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BX_VMX_APIC_VIRTUALIZATION |
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BX_VMX_WBINVD_VMEXIT |
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/* BX_VMX_MONITOR_TRAP_FLAG | */ // not implemented yet
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BX_VMX_VPID |
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BX_VMX_EPT |
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BX_VMX_UNRESTRICTED_GUEST |
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BX_VMX_SAVE_DEBUGCTL_DISABLE |
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BX_VMX_PERF_GLOBAL_CTRL | // MSR not implemented yet
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BX_VMX_PAT |
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BX_VMX_EFER |
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BX_VMX_DESCRIPTOR_TABLE_EXIT |
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BX_VMX_X2APIC_VIRTUALIZATION |
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BX_VMX_PREEMPTION_TIMER |
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BX_VMX_PAUSE_LOOP_EXITING |
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BX_VMX_EPTP_SWITCHING |
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BX_VMX_EPT_ACCESS_DIRTY |
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BX_VMX_VINTR_DELIVERY |
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BX_VMX_VMCS_SHADOWING |
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BX_VMX_EPT_EXCEPTION;
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}
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#endif
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// leaf 0x00000000 //
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void broadwell_ult_t::get_std_cpuid_leaf_0(cpuid_function_t *leaf) const
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{
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static const char* vendor_string = "GenuineIntel";
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// EAX: highest std function understood by CPUID
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// EBX: vendor ID string
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// EDX: vendor ID string
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// ECX: vendor ID string
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unsigned max_leaf = 0x14;
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static bx_bool cpuid_limit_winnt = SIM->get_param_bool(BXPN_CPUID_LIMIT_WINNT)->get();
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if (cpuid_limit_winnt)
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max_leaf = 0x2;
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get_leaf_0(max_leaf, vendor_string, leaf);
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}
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// leaf 0x00000001 //
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void broadwell_ult_t::get_std_cpuid_leaf_1(cpuid_function_t *leaf) const
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{
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// EAX: CPU Version Information
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// [3:0] Stepping ID
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// [7:4] Model: starts at 1
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// [11:8] Family: 4=486, 5=Pentium, 6=PPro, ...
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// [13:12] Type: 0=OEM, 1=overdrive, 2=dual cpu, 3=reserved
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// [19:16] Extended Model
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// [27:20] Extended Family
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leaf->eax = 0x000306D4;
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// EBX:
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// [7:0] Brand ID
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// [15:8] CLFLUSH cache line size (value*8 = cache line size in bytes)
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// [23:16] Number of logical processors in one physical processor
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// [31:24] Local Apic ID
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unsigned n_logical_processors = ncores*nthreads;
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leaf->ebx = ((CACHE_LINE_SIZE / 8) << 8) |
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(n_logical_processors << 16);
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#if BX_SUPPORT_APIC
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leaf->ebx |= ((cpu->get_apic_id() & 0xff) << 24);
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#endif
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// ECX: Extended Feature Flags
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// * [0:0] SSE3: SSE3 Instructions
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// * [1:1] PCLMULQDQ Instruction support
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// * [2:2] DTES64: 64-bit DS area
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// * [3:3] MONITOR/MWAIT support
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// * [4:4] DS-CPL: CPL qualified debug store
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// * [5:5] VMX: Virtual Machine Technology
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// * [6:6] SMX: Secure Virtual Machine Technology
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// * [7:7] EST: Enhanced Intel SpeedStep Technology
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// * [8:8] TM2: Thermal Monitor 2
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// * [9:9] SSSE3: SSSE3 Instructions
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// [10:10] CNXT-ID: L1 context ID
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// * [11:11] reserved
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// * [12:12] FMA Instructions support
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// * [13:13] CMPXCHG16B: CMPXCHG16B instruction support
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// * [14:14] xTPR update control
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// * [15:15] PDCM - Perfon and Debug Capability MSR
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// [16:16] reserved
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// * [17:17] PCID: Process Context Identifiers
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// [18:18] DCA - Direct Cache Access
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// * [19:19] SSE4.1 Instructions
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// * [20:20] SSE4.2 Instructions
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// * [21:21] X2APIC
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// * [22:22] MOVBE instruction
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// * [23:23] POPCNT instruction
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// * [24:24] TSC Deadline
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// * [25:25] AES Instructions
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// * [26:26] XSAVE extensions support
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// * [27:27] OSXSAVE support
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// * [28:28] AVX extensions support
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// * [29:29] AVX F16C - Float16 conversion support
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// * [30:30] RDRAND instruction
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// [31:31] reserved
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leaf->ecx = BX_CPUID_EXT_SSE3 |
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BX_CPUID_EXT_PCLMULQDQ |
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BX_CPUID_EXT_DTES64 |
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#if BX_SUPPORT_MONITOR_MWAIT
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BX_CPUID_EXT_MONITOR_MWAIT |
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#endif
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BX_CPUID_EXT_DS_CPL |
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#if BX_SUPPORT_VMX >= 2
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BX_CPUID_EXT_VMX |
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#endif
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/* BX_CPUID_EXT_SMX | */
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BX_CPUID_EXT_EST |
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BX_CPUID_EXT_THERMAL_MONITOR2 |
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BX_CPUID_EXT_SSSE3 |
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BX_CPUID_EXT_FMA |
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BX_CPUID_EXT_CMPXCHG16B |
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BX_CPUID_EXT_xTPR |
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BX_CPUID_EXT_PDCM |
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BX_CPUID_EXT_PCID |
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BX_CPUID_EXT_SSE4_1 |
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BX_CPUID_EXT_SSE4_2 |
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BX_CPUID_EXT_X2APIC |
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BX_CPUID_EXT_MOVBE |
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BX_CPUID_EXT_POPCNT |
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BX_CPUID_EXT_TSC_DEADLINE |
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BX_CPUID_EXT_AES |
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BX_CPUID_EXT_XSAVE |
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BX_CPUID_EXT_AVX |
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BX_CPUID_EXT_AVX_F16C |
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BX_CPUID_EXT_RDRAND;
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if (cpu->cr4.get_OSXSAVE())
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leaf->ecx |= BX_CPUID_EXT_OSXSAVE;
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// EDX: Standard Feature Flags
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// * [0:0] FPU on chip
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// * [1:1] VME: Virtual-8086 Mode enhancements
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// * [2:2] DE: Debug Extensions (I/O breakpoints)
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// * [3:3] PSE: Page Size Extensions
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// * [4:4] TSC: Time Stamp Counter
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// * [5:5] MSR: RDMSR and WRMSR support
|
||||
// * [6:6] PAE: Physical Address Extensions
|
||||
// * [7:7] MCE: Machine Check Exception
|
||||
// * [8:8] CXS: CMPXCHG8B instruction
|
||||
// * [9:9] APIC: APIC on Chip
|
||||
// [10:10] Reserved
|
||||
// * [11:11] SYSENTER/SYSEXIT support
|
||||
// * [12:12] MTRR: Memory Type Range Reg
|
||||
// * [13:13] PGE/PTE Global Bit
|
||||
// * [14:14] MCA: Machine Check Architecture
|
||||
// * [15:15] CMOV: Cond Mov/Cmp Instructions
|
||||
// * [16:16] PAT: Page Attribute Table
|
||||
// * [17:17] PSE-36: Physical Address Extensions
|
||||
// [18:18] PSN: Processor Serial Number
|
||||
// * [19:19] CLFLUSH: CLFLUSH Instruction support
|
||||
// [20:20] Reserved
|
||||
// * [21:21] DS: Debug Store
|
||||
// * [22:22] ACPI: Thermal Monitor and Software Controlled Clock Facilities
|
||||
// * [23:23] MMX Technology
|
||||
// * [24:24] FXSR: FXSAVE/FXRSTOR (also indicates CR4.OSFXSR is available)
|
||||
// * [25:25] SSE: SSE Extensions
|
||||
// * [26:26] SSE2: SSE2 Extensions
|
||||
// * [27:27] Self Snoop
|
||||
// * [28:28] Hyper Threading Technology
|
||||
// * [29:29] TM: Thermal Monitor
|
||||
// [30:30] Reserved
|
||||
// * [31:31] PBE: Pending Break Enable
|
||||
leaf->edx = BX_CPUID_STD_X87 |
|
||||
BX_CPUID_STD_VME |
|
||||
BX_CPUID_STD_DEBUG_EXTENSIONS |
|
||||
BX_CPUID_STD_PSE |
|
||||
BX_CPUID_STD_TSC |
|
||||
BX_CPUID_STD_MSR |
|
||||
BX_CPUID_STD_PAE |
|
||||
BX_CPUID_STD_MCE |
|
||||
BX_CPUID_STD_CMPXCHG8B |
|
||||
BX_CPUID_STD_SYSENTER_SYSEXIT |
|
||||
BX_CPUID_STD_MTRR |
|
||||
BX_CPUID_STD_GLOBAL_PAGES |
|
||||
BX_CPUID_STD_MCA |
|
||||
BX_CPUID_STD_CMOV |
|
||||
BX_CPUID_STD_PAT |
|
||||
BX_CPUID_STD_PSE36 |
|
||||
BX_CPUID_STD_CLFLUSH |
|
||||
BX_CPUID_STD_DEBUG_STORE |
|
||||
BX_CPUID_STD_ACPI |
|
||||
BX_CPUID_STD_MMX |
|
||||
BX_CPUID_STD_FXSAVE_FXRSTOR |
|
||||
BX_CPUID_STD_SSE |
|
||||
BX_CPUID_STD_SSE2 |
|
||||
BX_CPUID_STD_SELF_SNOOP |
|
||||
BX_CPUID_STD_HT |
|
||||
BX_CPUID_STD_THERMAL_MONITOR |
|
||||
BX_CPUID_STD_PBE;
|
||||
#if BX_SUPPORT_APIC
|
||||
// if MSR_APICBASE APIC Global Enable bit has been cleared,
|
||||
// the CPUID feature flag for the APIC is set to 0.
|
||||
if (cpu->msr.apicbase & 0x800)
|
||||
leaf->edx |= BX_CPUID_STD_APIC; // APIC on chip
|
||||
#endif
|
||||
}
|
||||
|
||||
// leaf 0x00000002 //
|
||||
void broadwell_ult_t::get_std_cpuid_leaf_2(cpuid_function_t *leaf) const
|
||||
{
|
||||
// CPUID function 0x00000002 - Cache and TLB Descriptors
|
||||
leaf->eax = 0x76036301;
|
||||
leaf->ebx = 0x00f0b5ff;
|
||||
leaf->ecx = 0x00000000;
|
||||
leaf->edx = 0x00c30000;
|
||||
}
|
||||
|
||||
// leaf 0x00000003 - Processor Serial Number (not supported) //
|
||||
|
||||
// leaf 0x00000004 //
|
||||
void broadwell_ult_t::get_std_cpuid_leaf_4(Bit32u subfunction, cpuid_function_t *leaf) const
|
||||
{
|
||||
// CPUID function 0x00000004 - Deterministic Cache Parameters
|
||||
|
||||
// EAX:
|
||||
// [04-00] - Cache Type Field
|
||||
// 0 = No more caches
|
||||
// 1 = Data Cache
|
||||
// 2 = Instruction Cache
|
||||
// 3 = Unified Cache
|
||||
// [07-05] - Cache Level (starts at 1)]
|
||||
// [08] - Self Initializing cache level (doesn't need software initialization)
|
||||
// [09] - Fully Associative cache
|
||||
// [13-10] - Reserved
|
||||
// [25-14] - Maximum number of addressable IDs for logical processors sharing this cache
|
||||
// [31-26] - Maximum number of addressable IDs for processor cores in the physical package - 1
|
||||
// EBX:
|
||||
// [11-00] - L = System Coherency Line Size
|
||||
// [21-12] - P = Physical Line partitions
|
||||
// [31-22] - W = Ways of associativity
|
||||
// ECX: Number of Sets
|
||||
// EDX:
|
||||
// [00] - Writeback invalidate
|
||||
// [01] - Cache Inclusiveness
|
||||
// [02] - Complex Cache Indexing
|
||||
// [31-03] - Reserved
|
||||
|
||||
switch(subfunction) {
|
||||
case 0:
|
||||
leaf->eax = 0x1C004121;
|
||||
leaf->ebx = 0x01C0003F;
|
||||
leaf->ecx = 0x0000003F;
|
||||
leaf->edx = 0x00000000;
|
||||
break;
|
||||
case 1:
|
||||
leaf->eax = 0x1C004122;
|
||||
leaf->ebx = 0x01C0003F;
|
||||
leaf->ecx = 0x0000003F;
|
||||
leaf->edx = 0x00000000;
|
||||
break;
|
||||
case 2:
|
||||
leaf->eax = 0x1C004143;
|
||||
leaf->ebx = 0x01C0003F;
|
||||
leaf->ecx = 0x000001FF;
|
||||
leaf->edx = 0x00000000;
|
||||
break;
|
||||
case 3:
|
||||
leaf->eax = 0x1C03C163;
|
||||
leaf->ebx = 0x03C0003F;
|
||||
leaf->ecx = 0x00000FFF;
|
||||
leaf->edx = 0x00000006;
|
||||
break;
|
||||
default:
|
||||
leaf->eax = 0;
|
||||
leaf->ebx = 0;
|
||||
leaf->ecx = 0;
|
||||
leaf->edx = 0;
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
// leaf 0x00000005 //
|
||||
void broadwell_ult_t::get_std_cpuid_leaf_5(cpuid_function_t *leaf) const
|
||||
{
|
||||
// CPUID function 0x00000005 - MONITOR/MWAIT Leaf
|
||||
|
||||
#if BX_SUPPORT_MONITOR_MWAIT
|
||||
// EAX - Smallest monitor-line size in bytes
|
||||
// EBX - Largest monitor-line size in bytes
|
||||
// ECX -
|
||||
// [31:2] - reserved
|
||||
// [1:1] - exit MWAIT even with EFLAGS.IF = 0
|
||||
// [0:0] - MONITOR/MWAIT extensions are supported
|
||||
// EDX -
|
||||
// [03-00] - number of C0 sub C-states supported using MWAIT
|
||||
// [07-04] - number of C1 sub C-states supported using MWAIT
|
||||
// [11-08] - number of C2 sub C-states supported using MWAIT
|
||||
// [15-12] - number of C3 sub C-states supported using MWAIT
|
||||
// [19-16] - number of C4 sub C-states supported using MWAIT
|
||||
// [31-20] - reserved (MBZ)
|
||||
leaf->eax = CACHE_LINE_SIZE;
|
||||
leaf->ebx = CACHE_LINE_SIZE;
|
||||
leaf->ecx = 3;
|
||||
leaf->edx = 0x11142120;
|
||||
#else
|
||||
leaf->eax = 0;
|
||||
leaf->ebx = 0;
|
||||
leaf->ecx = 0;
|
||||
leaf->edx = 0;
|
||||
#endif
|
||||
}
|
||||
|
||||
// leaf 0x00000006 //
|
||||
void broadwell_ult_t::get_std_cpuid_leaf_6(cpuid_function_t *leaf) const
|
||||
{
|
||||
// CPUID function 0x00000006 - Thermal and Power Management Leaf
|
||||
leaf->eax = 0x00000077;
|
||||
leaf->ebx = 0x00000002;
|
||||
leaf->ecx = 0x00000009;
|
||||
leaf->edx = 0x00000000;
|
||||
}
|
||||
|
||||
// leaf 0x00000007 //
|
||||
void broadwell_ult_t::get_std_cpuid_leaf_7(Bit32u subfunction, cpuid_function_t *leaf) const
|
||||
{
|
||||
switch(subfunction) {
|
||||
case 0:
|
||||
leaf->eax = 0; /* report max sub-leaf that supported in leaf 7 */
|
||||
|
||||
// * [0:0] FS/GS BASE access instructions
|
||||
// * [1:1] Support for IA32_TSC_ADJUST MSR
|
||||
// [2:2] reserved
|
||||
// * [3:3] BMI1: Advanced Bit Manipulation Extensions
|
||||
// [4:4] HLE: Hardware Lock Elision
|
||||
// * [5:5] AVX2
|
||||
// [6:6] reserved
|
||||
// * [7:7] SMEP: Supervisor Mode Execution Protection
|
||||
// * [8:8] BMI2: Advanced Bit Manipulation Extensions
|
||||
// * [9:9] Support for Enhanced REP MOVSB/STOSB
|
||||
// * [10:10] Support for INVPCID instruction
|
||||
// [11:11] RTM: Restricted Transactional Memory
|
||||
// [12:12] Supports Quality of Service (QoS) capability
|
||||
// * [13:13] Deprecates FPU CS and FPU DS values
|
||||
// [14:14] Intel Memory Protection Extensions
|
||||
// [15:15] Supports Platform Quality of Service Enforcement (PQE) capability
|
||||
// [16:16] AVX512F instructions support
|
||||
// [17:17] reserved
|
||||
// * [18:18] RDSEED instruction support
|
||||
// * [19:19] ADCX/ADOX instructions support
|
||||
// * [20:20] SMAP: Supervisor Mode Access Prevention
|
||||
// [21:21] reserved
|
||||
// [22:22] reserved
|
||||
// [23:23] CLFLUSHOPT instruction
|
||||
// [24:24] reserved
|
||||
// * [25:25] Intel Processor Trace
|
||||
// [26:26] AVX512PF instructions support
|
||||
// [27:27] AVX512ER instructions support
|
||||
// [28:28] AVX512CD instructions support
|
||||
// [29:29] SHA instructions support
|
||||
// [30:30] reserved
|
||||
// [31:31] reserved
|
||||
leaf->ebx = BX_CPUID_EXT3_FSGSBASE |
|
||||
/* BX_CPUID_EXT3_TSC_ADJUST | */ // not implemented yet
|
||||
BX_CPUID_EXT3_BMI1 |
|
||||
BX_CPUID_EXT3_AVX2 |
|
||||
BX_CPUID_EXT3_SMEP |
|
||||
BX_CPUID_EXT3_BMI2 |
|
||||
BX_CPUID_EXT3_ENCHANCED_REP_STRINGS |
|
||||
BX_CPUID_EXT3_INVPCID |
|
||||
BX_CPUID_EXT3_DEPRECATE_FCS_FDS |
|
||||
BX_CPUID_EXT3_RDSEED |
|
||||
BX_CPUID_EXT3_ADX |
|
||||
BX_CPUID_EXT3_SMAP;
|
||||
/* BX_CPUID_EXT3_PROCESSOR_TRACE */ // Intel Processor Trace not implemented yet
|
||||
|
||||
leaf->ecx = 0;
|
||||
leaf->edx = 0;
|
||||
break;
|
||||
default:
|
||||
leaf->eax = 0;
|
||||
leaf->ebx = 0;
|
||||
leaf->ecx = 0;
|
||||
leaf->edx = 0;
|
||||
}
|
||||
}
|
||||
|
||||
// leaf 0x00000008 reserved //
|
||||
// leaf 0x00000009 direct cache access not supported //
|
||||
|
||||
// leaf 0x0000000A //
|
||||
void broadwell_ult_t::get_std_cpuid_leaf_A(cpuid_function_t *leaf) const
|
||||
{
|
||||
// CPUID function 0x0000000A - Architectural Performance Monitoring Leaf
|
||||
|
||||
// EAX:
|
||||
// [7:0] Version ID of architectural performance monitoring
|
||||
// [15:8] Number of general-purpose performance monitoring counters per logical processor
|
||||
// [23:16] Bit width of general-purpose, performance monitoring counter
|
||||
// [31:24] Length of EBX bit vector to enumerate architectural performance
|
||||
// monitoring events.
|
||||
|
||||
// EBX:
|
||||
// [0] Core cycle event not available if 1
|
||||
// [1] Instruction retired event not available if 1
|
||||
// [2] Reference cycles event not available if 1
|
||||
// [3] Last-level cache reference event not available if 1
|
||||
// [4] Last-level cache misses event not available if 1
|
||||
// [5] Branch instruction retired event not available if 1
|
||||
// [6] Branch mispredict retired event not available if 1
|
||||
// [31:7] reserved
|
||||
|
||||
// ECX: reserved
|
||||
|
||||
// EDX:
|
||||
// [4:0] Number of fixed performance counters (if Version ID > 1)
|
||||
// [12:5] Bit width of fixed-function performance counters (if Version ID > 1)
|
||||
// [31:13] reserved
|
||||
|
||||
leaf->eax = 0x07300403;
|
||||
leaf->ebx = 0x00000000;
|
||||
leaf->ecx = 0x00000000;
|
||||
leaf->edx = 0x00000603;
|
||||
/*
|
||||
leaf->eax = 0; // reporting true capabilities without supporting it breaks Win7 x64 installation
|
||||
leaf->ebx = 0;
|
||||
leaf->ecx = 0;
|
||||
leaf->edx = 0;
|
||||
*/
|
||||
|
||||
BX_INFO(("WARNING: Architectural Performance Monitoring is not implemented"));
|
||||
}
|
||||
|
||||
// leaf 0x0000000C reserved //
|
||||
|
||||
// leaf 0x0000000D //
|
||||
void broadwell_ult_t::get_std_cpuid_xsave_leaf(Bit32u subfunction, cpuid_function_t *leaf) const
|
||||
{
|
||||
switch(subfunction) {
|
||||
case 0:
|
||||
// EAX - valid bits of XCR0 (lower part)
|
||||
// EBX - Maximum size (in bytes) required by enabled features
|
||||
// ECX - Maximum size (in bytes) required by CPU supported features
|
||||
// EDX - valid bits of XCR0 (upper part)
|
||||
leaf->eax = cpu->xcr0_suppmask;
|
||||
leaf->ebx = 512+64;
|
||||
if (cpu->xcr0.get_YMM())
|
||||
leaf->ebx = XSAVE_YMM_STATE_OFFSET + XSAVE_YMM_STATE_LEN;
|
||||
leaf->ecx = XSAVE_YMM_STATE_OFFSET + XSAVE_YMM_STATE_LEN;
|
||||
leaf->edx = 0;
|
||||
return;
|
||||
|
||||
case 1:
|
||||
leaf->eax = 1; /* XSAVEOPT supported */
|
||||
leaf->ebx = 0;
|
||||
leaf->ecx = 0;
|
||||
leaf->edx = 0;
|
||||
return;
|
||||
|
||||
case 2: // YMM leaf
|
||||
leaf->eax = XSAVE_YMM_STATE_LEN;
|
||||
leaf->ebx = XSAVE_YMM_STATE_OFFSET;
|
||||
leaf->ecx = 0;
|
||||
leaf->edx = 0;
|
||||
return;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
leaf->eax = 0; // reserved
|
||||
leaf->ebx = 0; // reserved
|
||||
leaf->ecx = 0; // reserved
|
||||
leaf->edx = 0; // reserved
|
||||
}
|
||||
|
||||
// leaf 0x80000000 //
|
||||
void broadwell_ult_t::get_ext_cpuid_leaf_0(cpuid_function_t *leaf) const
|
||||
{
|
||||
// EAX: highest extended function understood by CPUID
|
||||
// EBX: reserved
|
||||
// EDX: reserved
|
||||
// ECX: reserved
|
||||
get_leaf_0(0x80000008, NULL, leaf);
|
||||
}
|
||||
|
||||
// leaf 0x80000001 //
|
||||
void broadwell_ult_t::get_ext_cpuid_leaf_1(cpuid_function_t *leaf) const
|
||||
{
|
||||
// EAX: CPU Version Information (reserved for Intel)
|
||||
leaf->eax = 0;
|
||||
|
||||
// EBX: Brand ID (reserved for Intel)
|
||||
leaf->ebx = 0;
|
||||
|
||||
// ECX:
|
||||
// * [0:0] LAHF/SAHF instructions support in 64-bit mode
|
||||
// [1:1] CMP_Legacy: Core multi-processing legacy mode (AMD)
|
||||
// [2:2] SVM: Secure Virtual Machine (AMD)
|
||||
// [3:3] Extended APIC Space
|
||||
// [4:4] AltMovCR8: LOCK MOV CR0 means MOV CR8
|
||||
// * [5:5] LZCNT: LZCNT instruction support
|
||||
// [6:6] SSE4A: SSE4A Instructions support
|
||||
// [7:7] Misaligned SSE support
|
||||
// * [8:8] PREFETCHW: PREFETCHW instruction support
|
||||
// [9:9] OSVW: OS visible workarounds (AMD)
|
||||
// [10:10] IBS: Instruction based sampling
|
||||
// [11:11] XOP: Extended Operations Support and XOP Prefix
|
||||
// [12:12] SKINIT support
|
||||
// [13:13] WDT: Watchdog timer support
|
||||
// [14:14] Reserved
|
||||
// [15:15] LWP: Light weight profiling
|
||||
// [16:16] FMA4: Four-operand FMA instructions support
|
||||
// [17:17] Reserved
|
||||
// [18:18] Reserved
|
||||
// [19:19] NodeId: Indicates support for NodeId MSR (0xc001100c)
|
||||
// [20:20] Reserved
|
||||
// [21:21] TBM: trailing bit manipulation instructions support
|
||||
// [22:22] Topology extensions support
|
||||
// [23:23] PerfCtrExtCore: core perf counter extensions support
|
||||
// [24:24] PerfCtrExtNB: NB perf counter extensions support
|
||||
// [25:25] Reserved
|
||||
// [26:26] Data breakpoint extension. Indicates support for MSR 0xC0011027 and MSRs 0xC001101[B:9]
|
||||
// [27:27] Performance time-stamp counter. Indicates support for MSR 0xC0010280
|
||||
// [28:28] PerfCtrExtL2I: L2I performance counter extensions support
|
||||
// [29:29] Reserved
|
||||
// [30:30] Reserved
|
||||
// [31:31] Reserved
|
||||
|
||||
leaf->ecx = BX_CPUID_EXT2_LAHF_SAHF |
|
||||
BX_CPUID_EXT2_LZCNT |
|
||||
BX_CPUID_EXT2_PREFETCHW;
|
||||
|
||||
// EDX:
|
||||
// Many of the bits in EDX are the same as FN 0x00000001 [*] for AMD
|
||||
// [10:0] Reserved for Intel
|
||||
// * [11:11] SYSCALL/SYSRET support
|
||||
// [19:12] Reserved for Intel
|
||||
// * [20:20] No-Execute page protection
|
||||
// [25:21] Reserved
|
||||
// * [26:26] 1G paging support
|
||||
// * [27:27] Support RDTSCP Instruction
|
||||
// [28:28] Reserved
|
||||
// * [29:29] Long Mode
|
||||
// [30:30] AMD 3DNow! Extensions
|
||||
// [31:31] AMD 3DNow! Instructions
|
||||
|
||||
leaf->edx = BX_CPUID_STD2_NX |
|
||||
BX_CPUID_STD2_1G_PAGES |
|
||||
BX_CPUID_STD2_RDTSCP |
|
||||
BX_CPUID_STD2_LONG_MODE;
|
||||
if (cpu->long64_mode())
|
||||
leaf->edx |= BX_CPUID_STD2_SYSCALL_SYSRET;
|
||||
}
|
||||
|
||||
// leaf 0x80000002 //
|
||||
// leaf 0x80000003 //
|
||||
// leaf 0x80000004 //
|
||||
|
||||
// leaf 0x80000005 - L1 Cache and TLB Identifiers (reserved for Intel)
|
||||
|
||||
// leaf 0x80000006 //
|
||||
void broadwell_ult_t::get_ext_cpuid_leaf_6(cpuid_function_t *leaf) const
|
||||
{
|
||||
// CPUID function 0x800000006 - L2 Cache and TLB Identifiers
|
||||
leaf->eax = 0x00000000;
|
||||
leaf->ebx = 0x00000000;
|
||||
leaf->ecx = 0x01006040;
|
||||
leaf->edx = 0x00000000;
|
||||
}
|
||||
|
||||
// leaf 0x80000007 //
|
||||
void broadwell_ult_t::get_ext_cpuid_leaf_7(cpuid_function_t *leaf) const
|
||||
{
|
||||
// CPUID function 0x800000007 - Advanced Power Management
|
||||
leaf->eax = 0;
|
||||
leaf->ebx = 0;
|
||||
leaf->ecx = 0;
|
||||
leaf->edx = 0x00000100; // bit 8 - invariant TSC
|
||||
}
|
||||
|
||||
// leaf 0x80000008 //
|
||||
void broadwell_ult_t::get_ext_cpuid_leaf_8(cpuid_function_t *leaf) const
|
||||
{
|
||||
// virtual & phys address size in low 2 bytes.
|
||||
leaf->eax = BX_PHY_ADDRESS_WIDTH | (BX_LIN_ADDRESS_WIDTH << 8);
|
||||
leaf->ebx = 0;
|
||||
leaf->ecx = 0; // Reserved, undefined
|
||||
leaf->edx = 0;
|
||||
}
|
||||
|
||||
void broadwell_ult_t::dump_cpuid(void) const
|
||||
{
|
||||
bx_cpuid_t::dump_cpuid(0x14, 0x8);
|
||||
}
|
||||
|
||||
bx_cpuid_t *create_broadwell_ult_cpuid(BX_CPU_C *cpu) { return new broadwell_ult_t(cpu); }
|
||||
|
||||
#endif
|
69
bochs/cpu/cpudb/broadwell_ult.h
Normal file
69
bochs/cpu/cpudb/broadwell_ult.h
Normal file
@ -0,0 +1,69 @@
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
// $Id$
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Copyright (c) 2015 Stanislav Shwartsman
|
||||
// Written by Stanislav Shwartsman [sshwarts at sourceforge net]
|
||||
//
|
||||
// This library is free software; you can redistribute it and/or
|
||||
// modify it under the terms of the GNU Lesser General Public
|
||||
// License as published by the Free Software Foundation; either
|
||||
// version 2 of the License, or (at your option) any later version.
|
||||
//
|
||||
// This library is distributed in the hope that it will be useful,
|
||||
// but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
// Lesser General Public License for more details.
|
||||
//
|
||||
// You should have received a copy of the GNU Lesser General Public
|
||||
// License along with this library; if not, write to the Free Software
|
||||
// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
|
||||
//
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
|
||||
#ifndef BX_BROADWELL_ULT_CPUID_DEFINITIONS_H
|
||||
#define BX_BROADWELL_ULT_CPUID_DEFINITIONS_H
|
||||
|
||||
#if BX_SUPPORT_X86_64 && BX_SUPPORT_AVX
|
||||
|
||||
#include "cpu/cpuid.h"
|
||||
|
||||
class broadwell_ult_t : public bx_cpuid_t {
|
||||
public:
|
||||
broadwell_ult_t(BX_CPU_C *cpu);
|
||||
virtual ~broadwell_ult_t() {}
|
||||
|
||||
// return CPU name
|
||||
virtual const char *get_name(void) const { return "broadwell_ult"; }
|
||||
|
||||
#if BX_SUPPORT_VMX >= 2
|
||||
virtual Bit32u get_vmx_extensions_bitmask(void) const;
|
||||
#endif
|
||||
|
||||
virtual void get_cpuid_leaf(Bit32u function, Bit32u subfunction, cpuid_function_t *leaf) const;
|
||||
|
||||
virtual void dump_cpuid(void) const;
|
||||
|
||||
private:
|
||||
void get_std_cpuid_leaf_0(cpuid_function_t *leaf) const;
|
||||
void get_std_cpuid_leaf_1(cpuid_function_t *leaf) const;
|
||||
void get_std_cpuid_leaf_2(cpuid_function_t *leaf) const;
|
||||
void get_std_cpuid_leaf_4(Bit32u subfunction, cpuid_function_t *leaf) const;
|
||||
void get_std_cpuid_leaf_5(cpuid_function_t *leaf) const;
|
||||
void get_std_cpuid_leaf_6(cpuid_function_t *leaf) const;
|
||||
void get_std_cpuid_leaf_7(Bit32u subfunction, cpuid_function_t *leaf) const;
|
||||
void get_std_cpuid_leaf_A(cpuid_function_t *leaf) const;
|
||||
void get_std_cpuid_xsave_leaf(Bit32u subfunction, cpuid_function_t *leaf) const;
|
||||
|
||||
void get_ext_cpuid_leaf_0(cpuid_function_t *leaf) const;
|
||||
void get_ext_cpuid_leaf_1(cpuid_function_t *leaf) const;
|
||||
void get_ext_cpuid_leaf_6(cpuid_function_t *leaf) const;
|
||||
void get_ext_cpuid_leaf_7(cpuid_function_t *leaf) const;
|
||||
void get_ext_cpuid_leaf_8(cpuid_function_t *leaf) const;
|
||||
};
|
||||
|
||||
extern bx_cpuid_t *create_broadwell_ult_cpuid(BX_CPU_C *cpu);
|
||||
|
||||
#endif // BX_SUPPORT_X86_64 && BX_SUPPORT_AVX
|
||||
|
||||
#endif
|
338
bochs/cpu/cpudb/broadwell_ult.txt
Normal file
338
bochs/cpu/cpudb/broadwell_ult.txt
Normal file
@ -0,0 +1,338 @@
|
||||
------[ Versions ]------
|
||||
|
||||
Program Version : AIDA64 v5.00.3300
|
||||
BenchDLL Version: 4.1.627-x64
|
||||
|
||||
------[ CPU Info ]------
|
||||
|
||||
CPU Type : Mobile DualCore Intel Core M-5Y70, 2600 MHz (26 x 100)
|
||||
CPU Alias : Broadwell-ULT
|
||||
CPU Platform : BGA1234
|
||||
CPU Stepping : E0/F0
|
||||
Instruction Set : x86, x86-64, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, FMA, AES
|
||||
CPUID Manufacturer: GenuineIntel
|
||||
CPUID CPU Name : Intel(R) Processor 5Y70 CPU @ 1.10GHz
|
||||
CPUID Revision : 000306D4h
|
||||
IA Brand ID : 00h (Unknown)
|
||||
Platform ID : 2Ch (BGA1234)
|
||||
HTT / CMP Units : 2 / 2
|
||||
Max. NUMA Node : 0
|
||||
|
||||
Tjmax Temperature : 95 Celsius
|
||||
HTC Temperature Limit : 0 Celsius
|
||||
CPU TDP : 4.5 W
|
||||
CPU TDC : 18 A
|
||||
CPU Max Power Limit : Unlimited Power / Unlimited Time
|
||||
CPU Power Limit 1 (Long) : 6 W / 28.00 sec (Locked)
|
||||
CPU Power Limit 2 (Short) : 15 W / 2.44 ms (Locked)
|
||||
Max Turbo Boost Multipliers: 1C: 26x, 2C: 26x
|
||||
|
||||
------[ Logical CPU #0 ]------
|
||||
|
||||
allcpu: Package 0 / Core 0 / Thread 0: Valid
|
||||
|
||||
CPUID 00000000: 00000014-756E6547-6C65746E-49656E69 [GenuineIntel]
|
||||
CPUID 00000001: 000306D4-00100800-7FFAFBFF-BFEBFBFF
|
||||
CPUID 00000002: 76036301-00F0B5FF-00000000-00C30000
|
||||
CPUID 00000003: 00000000-00000000-00000000-00000000
|
||||
CPUID 00000004: 1C004121-01C0003F-0000003F-00000000 [SL 00]
|
||||
CPUID 00000004: 1C004122-01C0003F-0000003F-00000000 [SL 01]
|
||||
CPUID 00000004: 1C004143-01C0003F-000001FF-00000000 [SL 02]
|
||||
CPUID 00000004: 1C03C163-03C0003F-00000FFF-00000006 [SL 03]
|
||||
CPUID 00000005: 00000040-00000040-00000003-11142120
|
||||
CPUID 00000006: 00000077-00000002-00000009-00000000
|
||||
CPUID 00000007: 00000000-021C27AB-00000000-00000000
|
||||
CPUID 00000008: 00000000-00000000-00000000-00000000
|
||||
CPUID 00000009: 00000000-00000000-00000000-00000000
|
||||
CPUID 0000000A: 07300403-00000000-00000000-00000603
|
||||
CPUID 0000000B: 00000001-00000002-00000100-00000000 [SL 00]
|
||||
CPUID 0000000B: 00000004-00000004-00000201-00000000 [SL 01]
|
||||
CPUID 0000000C: 00000000-00000001-00000001-00000000
|
||||
CPUID 0000000D: 00000007-00000340-00000340-00000000 [SL 00]
|
||||
CPUID 0000000D: 00000001-00000000-00000000-00000000 [SL 01]
|
||||
CPUID 0000000D: 00000100-00000240-00000000-00000000 [SL 02]
|
||||
CPUID 0000000E: 00000000-00000000-00000000-00000000
|
||||
CPUID 0000000F: 00000000-00000000-00000000-00000000 [SL 00]
|
||||
CPUID 0000000F: 00000000-00000000-00000000-00000000 [SL 01]
|
||||
CPUID 00000010: 00000000-00000000-00000000-00000000 [SL 00]
|
||||
CPUID 00000010: 00000000-00000000-00000000-00000000 [SL 01]
|
||||
CPUID 00000011: 00000000-00000000-00000000-00000000
|
||||
CPUID 00000012: 00000000-00000000-00000000-00000000 [SL 00]
|
||||
CPUID 00000012: 00000000-00000000-00000000-00000000 [SL 01]
|
||||
CPUID 00000013: 00000000-00000000-00000000-00000000
|
||||
CPUID 00000014: 00000000-00000001-00000001-00000000 [SL 00]
|
||||
CPUID 80000000: 80000008-00000000-00000000-00000000
|
||||
CPUID 80000001: 00000000-00000000-00000121-2C100000
|
||||
CPUID 80000002: 65746E49-2952286C-6F725020-73736563 [Intel(R) Process]
|
||||
CPUID 80000003: 3520726F-20303759-20555043-2E312040 [or 5Y70 CPU @ 1.]
|
||||
CPUID 80000004: 48473031-0000007A-00000000-00000000 [10GHz]
|
||||
CPUID 80000005: 00000000-00000000-00000000-00000000
|
||||
CPUID 80000006: 00000000-00000000-01006040-00000000
|
||||
CPUID 80000007: 00000000-00000000-00000000-00000100
|
||||
CPUID 80000008: 00003027-00000000-00000000-00000000
|
||||
|
||||
L1 Data Cache: 32 KB, 8-way Associative, 64-byte Line
|
||||
L1 Instr. Cache: 32 KB, 8-way Associative, 64-byte Line
|
||||
L2 Unified Cache: 256 KB, 8-way Associative, 64-byte Line
|
||||
L3 Unified Cache: 4 MB, 16-way Associative, 64-byte Line
|
||||
|
||||
------[ Logical CPU #1 ]------
|
||||
|
||||
allcpu: Package 0 / Core 0 / Thread 1: Valid, Virtual
|
||||
|
||||
CPUID 00000000: 00000014-756E6547-6C65746E-49656E69 [GenuineIntel]
|
||||
CPUID 00000001: 000306D4-01100800-7FFAFBFF-BFEBFBFF
|
||||
CPUID 00000002: 76036301-00F0B5FF-00000000-00C30000
|
||||
CPUID 00000003: 00000000-00000000-00000000-00000000
|
||||
CPUID 00000004: 1C004121-01C0003F-0000003F-00000000 [SL 00]
|
||||
CPUID 00000004: 1C004122-01C0003F-0000003F-00000000 [SL 01]
|
||||
CPUID 00000004: 1C004143-01C0003F-000001FF-00000000 [SL 02]
|
||||
CPUID 00000004: 1C03C163-03C0003F-00000FFF-00000006 [SL 03]
|
||||
CPUID 00000005: 00000040-00000040-00000003-11142120
|
||||
CPUID 00000006: 00000077-00000002-00000009-00000000
|
||||
CPUID 00000007: 00000000-021C27AB-00000000-00000000
|
||||
CPUID 00000008: 00000000-00000000-00000000-00000000
|
||||
CPUID 00000009: 00000000-00000000-00000000-00000000
|
||||
CPUID 0000000A: 07300403-00000000-00000000-00000603
|
||||
CPUID 0000000B: 00000001-00000002-00000100-00000001 [SL 00]
|
||||
CPUID 0000000B: 00000004-00000004-00000201-00000001 [SL 01]
|
||||
CPUID 0000000C: 00000000-00000001-00000001-00000000
|
||||
CPUID 0000000D: 00000007-00000340-00000340-00000000 [SL 00]
|
||||
CPUID 0000000D: 00000001-00000000-00000000-00000000 [SL 01]
|
||||
CPUID 0000000D: 00000100-00000240-00000000-00000000 [SL 02]
|
||||
CPUID 0000000E: 00000000-00000000-00000000-00000000
|
||||
CPUID 0000000F: 00000000-00000000-00000000-00000000 [SL 00]
|
||||
CPUID 0000000F: 00000000-00000000-00000000-00000000 [SL 01]
|
||||
CPUID 00000010: 00000000-00000000-00000000-00000000 [SL 00]
|
||||
CPUID 00000010: 00000000-00000000-00000000-00000000 [SL 01]
|
||||
CPUID 00000011: 00000000-00000000-00000000-00000000
|
||||
CPUID 00000012: 00000000-00000000-00000000-00000000 [SL 00]
|
||||
CPUID 00000012: 00000000-00000000-00000000-00000000 [SL 01]
|
||||
CPUID 00000013: 00000000-00000000-00000000-00000000
|
||||
CPUID 00000014: 00000000-00000001-00000001-00000000 [SL 00]
|
||||
CPUID 80000000: 80000008-00000000-00000000-00000000
|
||||
CPUID 80000001: 00000000-00000000-00000121-2C100000
|
||||
CPUID 80000002: 65746E49-2952286C-6F725020-73736563 [Intel(R) Process]
|
||||
CPUID 80000003: 3520726F-20303759-20555043-2E312040 [or 5Y70 CPU @ 1.]
|
||||
CPUID 80000004: 48473031-0000007A-00000000-00000000 [10GHz]
|
||||
CPUID 80000005: 00000000-00000000-00000000-00000000
|
||||
CPUID 80000006: 00000000-00000000-01006040-00000000
|
||||
CPUID 80000007: 00000000-00000000-00000000-00000100
|
||||
CPUID 80000008: 00003027-00000000-00000000-00000000
|
||||
|
||||
L1 Data Cache: 32 KB, 8-way Associative, 64-byte Line
|
||||
L1 Instr. Cache: 32 KB, 8-way Associative, 64-byte Line
|
||||
L2 Unified Cache: 256 KB, 8-way Associative, 64-byte Line
|
||||
L3 Unified Cache: 4 MB, 16-way Associative, 64-byte Line
|
||||
|
||||
------[ Logical CPU #2 ]------
|
||||
|
||||
allcpu: Package 0 / Core 1 / Thread 0: Valid
|
||||
|
||||
CPUID 00000000: 00000014-756E6547-6C65746E-49656E69 [GenuineIntel]
|
||||
CPUID 00000001: 000306D4-02100800-7FFAFBFF-BFEBFBFF
|
||||
CPUID 00000002: 76036301-00F0B5FF-00000000-00C30000
|
||||
CPUID 00000003: 00000000-00000000-00000000-00000000
|
||||
CPUID 00000004: 1C004121-01C0003F-0000003F-00000000 [SL 00]
|
||||
CPUID 00000004: 1C004122-01C0003F-0000003F-00000000 [SL 01]
|
||||
CPUID 00000004: 1C004143-01C0003F-000001FF-00000000 [SL 02]
|
||||
CPUID 00000004: 1C03C163-03C0003F-00000FFF-00000006 [SL 03]
|
||||
CPUID 00000005: 00000040-00000040-00000003-11142120
|
||||
CPUID 00000006: 00000077-00000002-00000009-00000000
|
||||
CPUID 00000007: 00000000-021C27AB-00000000-00000000
|
||||
CPUID 00000008: 00000000-00000000-00000000-00000000
|
||||
CPUID 00000009: 00000000-00000000-00000000-00000000
|
||||
CPUID 0000000A: 07300403-00000000-00000000-00000603
|
||||
CPUID 0000000B: 00000001-00000002-00000100-00000002 [SL 00]
|
||||
CPUID 0000000B: 00000004-00000004-00000201-00000002 [SL 01]
|
||||
CPUID 0000000C: 00000000-00000001-00000001-00000000
|
||||
CPUID 0000000D: 00000007-00000340-00000340-00000000 [SL 00]
|
||||
CPUID 0000000D: 00000001-00000000-00000000-00000000 [SL 01]
|
||||
CPUID 0000000D: 00000100-00000240-00000000-00000000 [SL 02]
|
||||
CPUID 0000000E: 00000000-00000000-00000000-00000000
|
||||
CPUID 0000000F: 00000000-00000000-00000000-00000000 [SL 00]
|
||||
CPUID 0000000F: 00000000-00000000-00000000-00000000 [SL 01]
|
||||
CPUID 00000010: 00000000-00000000-00000000-00000000 [SL 00]
|
||||
CPUID 00000010: 00000000-00000000-00000000-00000000 [SL 01]
|
||||
CPUID 00000011: 00000000-00000000-00000000-00000000
|
||||
CPUID 00000012: 00000000-00000000-00000000-00000000 [SL 00]
|
||||
CPUID 00000012: 00000000-00000000-00000000-00000000 [SL 01]
|
||||
CPUID 00000013: 00000000-00000000-00000000-00000000
|
||||
CPUID 00000014: 00000000-00000001-00000001-00000000 [SL 00]
|
||||
CPUID 80000000: 80000008-00000000-00000000-00000000
|
||||
CPUID 80000001: 00000000-00000000-00000121-2C100000
|
||||
CPUID 80000002: 65746E49-2952286C-6F725020-73736563 [Intel(R) Process]
|
||||
CPUID 80000003: 3520726F-20303759-20555043-2E312040 [or 5Y70 CPU @ 1.]
|
||||
CPUID 80000004: 48473031-0000007A-00000000-00000000 [10GHz]
|
||||
CPUID 80000005: 00000000-00000000-00000000-00000000
|
||||
CPUID 80000006: 00000000-00000000-01006040-00000000
|
||||
CPUID 80000007: 00000000-00000000-00000000-00000100
|
||||
CPUID 80000008: 00003027-00000000-00000000-00000000
|
||||
|
||||
L1 Data Cache: 32 KB, 8-way Associative, 64-byte Line
|
||||
L1 Instr. Cache: 32 KB, 8-way Associative, 64-byte Line
|
||||
L2 Unified Cache: 256 KB, 8-way Associative, 64-byte Line
|
||||
L3 Unified Cache: 4 MB, 16-way Associative, 64-byte Line
|
||||
|
||||
------[ Logical CPU #3 ]------
|
||||
|
||||
allcpu: Package 0 / Core 1 / Thread 1: Valid, Virtual
|
||||
|
||||
CPUID 00000000: 00000014-756E6547-6C65746E-49656E69 [GenuineIntel]
|
||||
CPUID 00000001: 000306D4-03100800-7FFAFBFF-BFEBFBFF
|
||||
CPUID 00000002: 76036301-00F0B5FF-00000000-00C30000
|
||||
CPUID 00000003: 00000000-00000000-00000000-00000000
|
||||
CPUID 00000004: 1C004121-01C0003F-0000003F-00000000 [SL 00]
|
||||
CPUID 00000004: 1C004122-01C0003F-0000003F-00000000 [SL 01]
|
||||
CPUID 00000004: 1C004143-01C0003F-000001FF-00000000 [SL 02]
|
||||
CPUID 00000004: 1C03C163-03C0003F-00000FFF-00000006 [SL 03]
|
||||
CPUID 00000005: 00000040-00000040-00000003-11142120
|
||||
CPUID 00000006: 00000077-00000002-00000009-00000000
|
||||
CPUID 00000007: 00000000-021C27AB-00000000-00000000
|
||||
CPUID 00000008: 00000000-00000000-00000000-00000000
|
||||
CPUID 00000009: 00000000-00000000-00000000-00000000
|
||||
CPUID 0000000A: 07300403-00000000-00000000-00000603
|
||||
CPUID 0000000B: 00000001-00000002-00000100-00000003 [SL 00]
|
||||
CPUID 0000000B: 00000004-00000004-00000201-00000003 [SL 01]
|
||||
CPUID 0000000C: 00000000-00000001-00000001-00000000
|
||||
CPUID 0000000D: 00000007-00000340-00000340-00000000 [SL 00]
|
||||
CPUID 0000000D: 00000001-00000000-00000000-00000000 [SL 01]
|
||||
CPUID 0000000D: 00000100-00000240-00000000-00000000 [SL 02]
|
||||
CPUID 0000000E: 00000000-00000000-00000000-00000000
|
||||
CPUID 0000000F: 00000000-00000000-00000000-00000000 [SL 00]
|
||||
CPUID 0000000F: 00000000-00000000-00000000-00000000 [SL 01]
|
||||
CPUID 00000010: 00000000-00000000-00000000-00000000 [SL 00]
|
||||
CPUID 00000010: 00000000-00000000-00000000-00000000 [SL 01]
|
||||
CPUID 00000011: 00000000-00000000-00000000-00000000
|
||||
CPUID 00000012: 00000000-00000000-00000000-00000000 [SL 00]
|
||||
CPUID 00000012: 00000000-00000000-00000000-00000000 [SL 01]
|
||||
CPUID 00000013: 00000000-00000000-00000000-00000000
|
||||
CPUID 00000014: 00000000-00000001-00000001-00000000 [SL 00]
|
||||
CPUID 80000000: 80000008-00000000-00000000-00000000
|
||||
CPUID 80000001: 00000000-00000000-00000121-2C100000
|
||||
CPUID 80000002: 65746E49-2952286C-6F725020-73736563 [Intel(R) Process]
|
||||
CPUID 80000003: 3520726F-20303759-20555043-2E312040 [or 5Y70 CPU @ 1.]
|
||||
CPUID 80000004: 48473031-0000007A-00000000-00000000 [10GHz]
|
||||
CPUID 80000005: 00000000-00000000-00000000-00000000
|
||||
CPUID 80000006: 00000000-00000000-01006040-00000000
|
||||
CPUID 80000007: 00000000-00000000-00000000-00000100
|
||||
CPUID 80000008: 00003027-00000000-00000000-00000000
|
||||
|
||||
L1 Data Cache: 32 KB, 8-way Associative, 64-byte Line
|
||||
L1 Instr. Cache: 32 KB, 8-way Associative, 64-byte Line
|
||||
L2 Unified Cache: 256 KB, 8-way Associative, 64-byte Line
|
||||
L3 Unified Cache: 4 MB, 16-way Associative, 64-byte Line
|
||||
|
||||
------[ All CPUs ]------
|
||||
|
||||
CPU 0: APICID 0 / Package 0 / Core 0 / Thread 0: Valid
|
||||
CPU 1: APICID 1 / Package 0 / Core 0 / Thread 1: Valid, Virtual
|
||||
CPU 2: APICID 2 / Package 0 / Core 1 / Thread 0: Valid
|
||||
CPU 3: APICID 3 / Package 0 / Core 1 / Thread 1: Valid, Virtual
|
||||
|
||||
------[ MSR Registers ]------
|
||||
|
||||
MSR 00000017: 001C-0000-0000-0000 [PlatID = 7]
|
||||
MSR 0000001B: 0000-0000-FEE0-0900
|
||||
MSR 00000035: 0000-0000-0002-0004
|
||||
MSR 0000008B: 0000-000E-0000-0000
|
||||
MSR 000000CE: 0005-053D-F301-0D00
|
||||
MSR 000000E7: 0000-0000-0002-6833 [S200]
|
||||
MSR 000000E7: 0000-0000-0000-6ACA [S200]
|
||||
MSR 000000E7: 0000-0000-0000-70F0
|
||||
MSR 000000E8: 0000-0000-0001-21C4 [S200]
|
||||
MSR 000000E8: 0000-0000-0000-C2F3 [S200]
|
||||
MSR 000000E8: 0000-0000-0000-A3F6
|
||||
MSR 00000194: 0000-0000-0001-0000
|
||||
MSR 00000198: 0000-23C0-0000-1A00 [S200]
|
||||
MSR 00000198: 0000-23C0-0000-1A00 [S200]
|
||||
MSR 00000198: 0000-23C0-0000-1A00
|
||||
MSR 00000199: 0000-0000-0000-0D00
|
||||
MSR 0000019A: 0000-0000-0000-0000
|
||||
MSR 0000019B: 0000-0000-0000-0000
|
||||
MSR 0000019C: 0000-0000-882D-0800 [S200]
|
||||
MSR 0000019C: 0000-0000-882D-0800 [S200]
|
||||
MSR 0000019C: 0000-0000-882D-0800
|
||||
MSR 0000019D: 0000-0000-0000-0000
|
||||
MSR 000001A0: 0000-0000-0085-0089
|
||||
MSR 000001A2: 0000-0000-005F-0000
|
||||
MSR 000001A4: 0000-0000-0000-0000
|
||||
MSR 000001AA: 0000-0000-0040-0000
|
||||
MSR 000001AC: < FAILED >
|
||||
MSR 000001AD: 0000-1A1A-1A1A-1A1A
|
||||
MSR 000001B0: 0000-0000-0000-0000
|
||||
MSR 000001B1: 0000-0000-8827-0800
|
||||
MSR 000001B2: 0000-0000-0000-0000
|
||||
MSR 000001FC: 0000-0000-0004-005F
|
||||
MSR 00000300: < FAILED >
|
||||
MSR 00000480: 00DA-0400-0000-0012
|
||||
MSR 00000481: 0000-007F-0000-0016
|
||||
MSR 00000482: FFF9-FFFE-0401-E172
|
||||
MSR 00000483: 007F-FFFF-0003-6DFF
|
||||
MSR 00000484: 0000-FFFF-0000-11FF
|
||||
MSR 00000485: 0000-0000-3004-81E5
|
||||
MSR 00000486: 0000-0000-8000-0021
|
||||
MSR 00000487: 0000-0000-FFFF-FFFF
|
||||
MSR 00000488: 0000-0000-0000-2000
|
||||
MSR 00000489: 0000-0000-0037-67FF
|
||||
MSR 0000048A: 0000-0000-0000-002A
|
||||
MSR 0000048B: 0005-7CFF-0000-0000
|
||||
MSR 0000048C: 0000-0F01-0633-4141
|
||||
MSR 0000048D: 0000-007F-0000-0016
|
||||
MSR 0000048E: FFF9-FFFE-0400-6172
|
||||
MSR 0000048F: 007F-FFFF-0003-6DFB
|
||||
MSR 00000490: 0000-FFFF-0000-11FB
|
||||
MSR 00000601: 4010-1414-0000-0090
|
||||
MSR 00000602: < FAILED >
|
||||
MSR 00000603: 0072-0000-0033-3333
|
||||
MSR 00000604: < FAILED >
|
||||
MSR 00000606: 0000-0000-000A-0E03
|
||||
MSR 0000060A: 0000-0000-0000-8842
|
||||
MSR 0000060B: 0000-0000-0000-8873
|
||||
MSR 0000060C: 0000-0000-0000-8891
|
||||
MSR 0000060D: 0000-0024-30B6-11FF
|
||||
MSR 00000610: 8042-8078-00DD-8030
|
||||
MSR 00000611: 0000-0000-00F0-5E7D [S200]
|
||||
MSR 00000611: 0000-0000-00F0-BD41 [S200]
|
||||
MSR 00000611: 0000-0000-00F1-16B6
|
||||
MSR 00000613: 0000-0000-0000-0049
|
||||
MSR 00000614: 0000-0000-0000-0024
|
||||
MSR 00000618: 8054-00DE-0000-0000
|
||||
MSR 00000619: 0000-0000-004E-0E7B [S200]
|
||||
MSR 00000619: 0000-0000-004E-1804 [S200]
|
||||
MSR 00000619: 0000-0000-004E-20C2
|
||||
MSR 0000061B: 0000-0000-0000-0000
|
||||
MSR 0000061C: < FAILED >
|
||||
MSR 0000061E: < FAILED >
|
||||
MSR 00000620: 0000-0000-0000-061A
|
||||
MSR 00000621: 0000-0000-0000-001A
|
||||
MSR 00000638: 0000-0000-0000-0000
|
||||
MSR 00000639: 0000-0000-0094-488B [S200]
|
||||
MSR 00000639: 0000-0000-0094-7B26 [S200]
|
||||
MSR 00000639: 0000-0000-0094-9974
|
||||
MSR 0000063A: 0000-0000-0000-0009
|
||||
MSR 0000063B: < FAILED >
|
||||
MSR 00000640: 0000-0000-0000-0000
|
||||
MSR 00000641: 0000-0000-0000-3944 [S200]
|
||||
MSR 00000641: 0000-0000-0000-3944 [S200]
|
||||
MSR 00000641: 0000-0000-0000-3944
|
||||
MSR 00000642: 0000-0000-0000-000D
|
||||
MSR 00000648: 0000-0000-0000-000B
|
||||
MSR 00000649: 0000-0000-0006-001C
|
||||
MSR 0000064A: 0000-0000-000D-0030
|
||||
MSR 0000064B: 0000-0000-0000-0002
|
||||
MSR 0000064C: 0000-0000-0000-000C
|
||||
MSR 00000690: 0000-0000-2D20-0000
|
||||
MSR 000006B0: 0000-0000-1D00-0000
|
||||
MSR 000006B1: 0000-0000-0100-0000
|
||||
|
||||
PerformanceFrequency = 1266587
|
||||
|
||||
CPU Clock M.Method = 8 (APIC SNB)
|
||||
PM Timer Address = 6152 (1808h)
|
||||
|
||||
APIC Clock = 99.81 MHz
|
||||
APIC Clock = 99.80 MHz
|
||||
APIC Clock = 99.80 MHz
|
||||
APIC Clock = 99.77 MHz
|
||||
APIC Clock = 99.80 MHz
|
@ -47,6 +47,7 @@ bx_define_cpudb(zambezi)
|
||||
bx_define_cpudb(trinity_apu)
|
||||
bx_define_cpudb(corei7_ivy_bridge_3770k)
|
||||
bx_define_cpudb(corei7_haswell_4770)
|
||||
bx_define_cpudb(broadwell_ult)
|
||||
#endif
|
||||
#endif
|
||||
#endif
|
||||
|
Loading…
Reference in New Issue
Block a user