fixed more compilation problems and code cleanup
This commit is contained in:
parent
3a4bd2da51
commit
ee3841ef07
@ -188,166 +188,6 @@ BX_CPU_C::read_virtual_zmmword_aligned_32(unsigned s, Bit32u offset, BxPackedZmm
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#endif // BX_CPU_LEVEL >= 6
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#if BX_SUPPORT_X86_64
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BX_CPP_INLINE void BX_CPP_AttrRegparmN(3)
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BX_CPU_C::write_virtual_byte_64(unsigned s, Bit64u offset, Bit8u data)
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{
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bx_address laddr = get_laddr64(s, offset);
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write_linear_byte(s, laddr, data);
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}
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BX_CPP_INLINE void BX_CPP_AttrRegparmN(3)
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BX_CPU_C::write_virtual_word_64(unsigned s, Bit64u offset, Bit16u data)
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{
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bx_address laddr = get_laddr64(s, offset);
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write_linear_word(s, laddr, data);
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}
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BX_CPP_INLINE void BX_CPP_AttrRegparmN(3)
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BX_CPU_C::write_virtual_dword_64(unsigned s, Bit64u offset, Bit32u data)
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{
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bx_address laddr = get_laddr64(s, offset);
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write_linear_dword(s, laddr, data);
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}
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BX_CPP_INLINE void BX_CPP_AttrRegparmN(3)
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BX_CPU_C::write_virtual_qword_64(unsigned s, Bit64u offset, Bit64u data)
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{
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bx_address laddr = get_laddr64(s, offset);
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write_linear_qword(s, laddr, data);
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}
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BX_CPP_INLINE void BX_CPP_AttrRegparmN(3)
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BX_CPU_C::write_virtual_xmmword_64(unsigned s, Bit64u offset, const BxPackedXmmRegister *data)
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{
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bx_address laddr = get_laddr64(s, offset);
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write_linear_xmmword(s, laddr, data);
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}
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BX_CPP_INLINE void BX_CPP_AttrRegparmN(3)
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BX_CPU_C::write_virtual_xmmword_aligned_64(unsigned s, Bit64u offset, const BxPackedXmmRegister *data)
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{
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bx_address laddr = get_laddr64(s, offset);
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write_linear_xmmword_aligned(s, laddr, data);
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}
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#if BX_SUPPORT_AVX
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BX_CPP_INLINE void BX_CPP_AttrRegparmN(3)
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BX_CPU_C::write_virtual_ymmword_64(unsigned s, Bit64u offset, const BxPackedYmmRegister *data)
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{
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bx_address laddr = get_laddr64(s, offset);
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write_linear_ymmword(s, laddr, data);
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}
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BX_CPP_INLINE void BX_CPP_AttrRegparmN(3)
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BX_CPU_C::write_virtual_ymmword_aligned_64(unsigned s, Bit64u offset, const BxPackedYmmRegister *data)
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{
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bx_address laddr = get_laddr64(s, offset);
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write_linear_ymmword_aligned(s, laddr, data);
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}
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#endif // BX_SUPPORT_AVX
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#if BX_SUPPORT_EVEX
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BX_CPP_INLINE void BX_CPP_AttrRegparmN(3)
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BX_CPU_C::write_virtual_zmmword_64(unsigned s, Bit64u offset, const BxPackedZmmRegister *data)
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{
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bx_address laddr = get_laddr64(s, offset);
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write_linear_zmmword(s, laddr, data);
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}
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BX_CPP_INLINE void BX_CPP_AttrRegparmN(3)
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BX_CPU_C::write_virtual_zmmword_aligned_64(unsigned s, Bit64u offset, const BxPackedZmmRegister *data)
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{
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bx_address laddr = get_laddr64(s, offset);
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write_linear_zmmword_aligned(s, laddr, data);
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}
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#endif // BX_SUPPORT_EVEX
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BX_CPP_INLINE Bit8u BX_CPP_AttrRegparmN(2)
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BX_CPU_C::read_virtual_byte_64(unsigned s, Bit64u offset)
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{
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bx_address laddr = get_laddr64(s, offset);
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return read_linear_byte(s, laddr);
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}
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BX_CPP_INLINE Bit16u BX_CPP_AttrRegparmN(2)
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BX_CPU_C::read_virtual_word_64(unsigned s, Bit64u offset)
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{
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bx_address laddr = get_laddr64(s, offset);
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return read_linear_word(s, laddr);
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}
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BX_CPP_INLINE Bit32u BX_CPP_AttrRegparmN(2)
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BX_CPU_C::read_virtual_dword_64(unsigned s, Bit64u offset)
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{
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bx_address laddr = get_laddr64(s, offset);
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return read_linear_dword(s, laddr);
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}
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BX_CPP_INLINE Bit64u BX_CPP_AttrRegparmN(2)
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BX_CPU_C::read_virtual_qword_64(unsigned s, Bit64u offset)
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{
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bx_address laddr = get_laddr64(s, offset);
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return read_linear_qword(s, laddr);
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}
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BX_CPP_INLINE void BX_CPP_AttrRegparmN(3)
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BX_CPU_C::read_virtual_xmmword_64(unsigned s, Bit64u offset, BxPackedXmmRegister *data)
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{
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bx_address laddr = get_laddr64(s, offset);
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read_linear_xmmword(s, laddr, data);
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}
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BX_CPP_INLINE void BX_CPP_AttrRegparmN(3)
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BX_CPU_C::read_virtual_xmmword_aligned_64(unsigned s, Bit64u offset, BxPackedXmmRegister *data)
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{
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bx_address laddr = get_laddr64(s, offset);
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read_linear_xmmword_aligned(s, laddr, data);
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}
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#if BX_SUPPORT_AVX
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BX_CPP_INLINE void BX_CPP_AttrRegparmN(3)
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BX_CPU_C::read_virtual_ymmword_64(unsigned s, Bit64u offset, BxPackedYmmRegister *data)
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{
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bx_address laddr = get_laddr64(s, offset);
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read_linear_ymmword(s, laddr, data);
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}
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BX_CPP_INLINE void BX_CPP_AttrRegparmN(3)
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BX_CPU_C::read_virtual_ymmword_aligned_64(unsigned s, Bit64u offset, BxPackedYmmRegister *data)
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{
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bx_address laddr = get_laddr64(s, offset);
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read_linear_ymmword_aligned(s, laddr, data);
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}
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#endif // BX_SUPPORT_AVX
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#if BX_SUPPORT_EVEX
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BX_CPP_INLINE void BX_CPP_AttrRegparmN(3)
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BX_CPU_C::read_virtual_zmmword_64(unsigned s, Bit64u offset, BxPackedZmmRegister *data)
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{
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bx_address laddr = get_laddr64(s, offset);
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read_linear_zmmword(s, laddr, data);
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}
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BX_CPP_INLINE void BX_CPP_AttrRegparmN(3)
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BX_CPU_C::read_virtual_zmmword_aligned_64(unsigned s, Bit64u offset, BxPackedZmmRegister *data)
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{
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bx_address laddr = get_laddr64(s, offset);
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read_linear_zmmword_aligned(s, laddr, data);
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}
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#endif // BX_SUPPORT_EVEX
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#endif // BX_SUPPORT_X86_64
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BX_CPP_INLINE void BX_CPP_AttrRegparmN(3)
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BX_CPU_C::write_virtual_byte(unsigned s, bx_address offset, Bit8u data)
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{
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@ -545,38 +385,6 @@ BX_CPU_C::read_RMW_virtual_qword_32(unsigned s, Bit32u offset)
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return read_RMW_linear_qword(s, laddr);
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}
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#if BX_SUPPORT_X86_64
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BX_CPP_INLINE Bit8u BX_CPP_AttrRegparmN(2)
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BX_CPU_C::read_RMW_virtual_byte_64(unsigned s, bx_address offset)
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{
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bx_address laddr = get_laddr64(s, offset);
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return read_RMW_linear_byte(s, laddr);
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}
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BX_CPP_INLINE Bit16u BX_CPP_AttrRegparmN(2)
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BX_CPU_C::read_RMW_virtual_word_64(unsigned s, bx_address offset)
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{
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bx_address laddr = get_laddr64(s, offset);
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return read_RMW_linear_word(s, laddr);
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}
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BX_CPP_INLINE Bit32u BX_CPP_AttrRegparmN(2)
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BX_CPU_C::read_RMW_virtual_dword_64(unsigned s, bx_address offset)
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{
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bx_address laddr = get_laddr64(s, offset);
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return read_RMW_linear_dword(s, laddr);
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}
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BX_CPP_INLINE Bit64u BX_CPP_AttrRegparmN(2)
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BX_CPU_C::read_RMW_virtual_qword_64(unsigned s, bx_address offset)
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{
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bx_address laddr = get_laddr64(s, offset);
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return read_RMW_linear_qword(s, laddr);
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}
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#endif
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BX_CPP_INLINE Bit8u BX_CPP_AttrRegparmN(2)
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BX_CPU_C::read_RMW_virtual_byte(unsigned s, bx_address offset)
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{
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@ -105,11 +105,6 @@ BX_CPU_C::write_linear_dword(unsigned s, bx_address laddr, Bit32u data)
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}
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}
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if (! IsCanonical(laddr)) {
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BX_ERROR(("write_linear_dword(): canonical failure"));
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exception(int_number(s), 0);
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}
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if (access_write_linear(laddr, 4, CPL, 0x3, (void *) &data) < 0)
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exception(int_number(s), 0);
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}
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@ -139,11 +134,6 @@ BX_CPU_C::write_linear_qword(unsigned s, bx_address laddr, Bit64u data)
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}
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}
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if (! IsCanonical(laddr)) {
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BX_ERROR(("write_linear_qword(): canonical failure"));
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exception(int_number(s), 0);
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}
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if (access_write_linear(laddr, 8, CPL, 0x7, (void *) &data) < 0)
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exception(int_number(s), 0);
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}
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@ -33,7 +33,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADD_EqGqM(bxInstruction_c *i)
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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/* pointer, segment address pair */
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op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
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op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
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op2_64 = BX_READ_64BIT_REG(i->src());
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sum_64 = op1_64 + op2_64;
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write_RMW_linear_qword(sum_64);
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@ -80,7 +80,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADC_EqGqM(bxInstruction_c *i)
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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/* pointer, segment address pair */
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op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
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op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
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op2_64 = BX_READ_64BIT_REG(i->src());
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sum_64 = op1_64 + op2_64 + getB_CF();
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write_RMW_linear_qword(sum_64);
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@ -129,7 +129,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SBB_EqGqM(bxInstruction_c *i)
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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/* pointer, segment address pair */
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op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
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op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
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op2_64 = BX_READ_64BIT_REG(i->src());
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diff_64 = op1_64 - (op2_64 + getB_CF());
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write_RMW_linear_qword(diff_64);
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@ -178,7 +178,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SBB_EqIdM(bxInstruction_c *i)
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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/* pointer, segment address pair */
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op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
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op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
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op2_64 = (Bit32s) i->Id();
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diff_64 = op1_64 - (op2_64 + getB_CF());
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write_RMW_linear_qword(diff_64);
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@ -209,7 +209,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SUB_EqGqM(bxInstruction_c *i)
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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/* pointer, segment address pair */
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op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
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op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
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op2_64 = BX_READ_64BIT_REG(i->src());
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diff_64 = op1_64 - op2_64;
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write_RMW_linear_qword(diff_64);
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@ -327,7 +327,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XADD_EqGqM(bxInstruction_c *i)
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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/* pointer, segment address pair */
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op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
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op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
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op2_64 = BX_READ_64BIT_REG(i->src());
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sum_64 = op1_64 + op2_64;
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write_RMW_linear_qword(sum_64);
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@ -373,7 +373,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADD_EqIdM(bxInstruction_c *i)
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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/* pointer, segment address pair */
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op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
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op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
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op2_64 = (Bit32s) i->Id();
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sum_64 = op1_64 + op2_64;
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write_RMW_linear_qword(sum_64);
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@ -404,7 +404,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADC_EqIdM(bxInstruction_c *i)
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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/* pointer, segment address pair */
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op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
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op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
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op2_64 = (Bit32s) i->Id();
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sum_64 = op1_64 + op2_64 + getB_CF();
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write_RMW_linear_qword(sum_64);
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@ -435,7 +435,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SUB_EqIdM(bxInstruction_c *i)
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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/* pointer, segment address pair */
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op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
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op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
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op2_64 = (Bit32s) i->Id();
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diff_64 = op1_64 - op2_64;
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write_RMW_linear_qword(diff_64);
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@ -491,7 +491,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::NEG_EqM(bxInstruction_c *i)
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{
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
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Bit64u op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
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op1_64 = - (Bit64s)(op1_64);
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write_RMW_linear_qword(op1_64);
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@ -515,7 +515,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::INC_EqM(bxInstruction_c *i)
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{
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
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Bit64u op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
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op1_64++;
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write_RMW_linear_qword(op1_64);
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@ -536,7 +536,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::DEC_EqM(bxInstruction_c *i)
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{
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
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Bit64u op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
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op1_64--;
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write_RMW_linear_qword(op1_64);
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@ -557,7 +557,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMPXCHG_EqGqM(bxInstruction_c *i)
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{
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
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Bit64u op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
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Bit64u diff_64 = RAX - op1_64;
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SET_FLAGS_OSZAPC_SUB_64(RAX, op1_64, diff_64);
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@ -122,7 +122,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BTS_EqGqM(bxInstruction_c *i)
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op1_addr = (Bit32u) op1_addr;
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/* pointer, segment address pair */
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op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), op1_addr));
|
||||
op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), op1_addr));
|
||||
bit_i = (op1_64 >> index) & 0x01;
|
||||
op1_64 |= (((Bit64u) 1) << index);
|
||||
write_RMW_linear_qword(op1_64);
|
||||
@ -164,7 +164,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BTR_EqGqM(bxInstruction_c *i)
|
||||
op1_addr = (Bit32u) op1_addr;
|
||||
|
||||
/* pointer, segment address pair */
|
||||
op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), op1_addr));
|
||||
op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), op1_addr));
|
||||
bx_bool temp_cf = (op1_64 >> index) & 0x01;
|
||||
op1_64 &= ~(((Bit64u) 1) << index);
|
||||
/* now write back to destination */
|
||||
@ -207,7 +207,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BTC_EqGqM(bxInstruction_c *i)
|
||||
if (! i->as64L())
|
||||
op1_addr = (Bit32u) op1_addr;
|
||||
|
||||
op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), op1_addr));
|
||||
op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), op1_addr));
|
||||
bx_bool temp_CF = (op1_64 >> index) & 0x01;
|
||||
op1_64 ^= (((Bit64u) 1) << index); /* toggle bit */
|
||||
set_CF(temp_CF);
|
||||
@ -262,7 +262,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BTS_EqIbM(bxInstruction_c *i)
|
||||
|
||||
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
||||
|
||||
Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
|
||||
Bit64u op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
|
||||
bx_bool temp_CF = (op1_64 >> op2_8) & 0x01;
|
||||
op1_64 |= (((Bit64u) 1) << op2_8);
|
||||
write_RMW_linear_qword(op1_64);
|
||||
@ -292,7 +292,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BTC_EqIbM(bxInstruction_c *i)
|
||||
|
||||
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
||||
|
||||
Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
|
||||
Bit64u op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
|
||||
bx_bool temp_CF = (op1_64 >> op2_8) & 0x01;
|
||||
op1_64 ^= (((Bit64u) 1) << op2_8); /* toggle bit */
|
||||
write_RMW_linear_qword(op1_64);
|
||||
@ -322,7 +322,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BTR_EqIbM(bxInstruction_c *i)
|
||||
|
||||
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
||||
|
||||
Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
|
||||
Bit64u op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
|
||||
bx_bool temp_CF = (op1_64 >> op2_8) & 0x01;
|
||||
op1_64 &= ~(((Bit64u) 1) << op2_8);
|
||||
write_RMW_linear_qword(op1_64);
|
||||
|
@ -4533,38 +4533,6 @@ public: // for now...
|
||||
BX_SMF void write_virtual_zmmword_32(unsigned seg, Bit32u off, const BxPackedZmmRegister *data) BX_CPP_AttrRegparmN(3);
|
||||
BX_SMF void write_virtual_zmmword_aligned_32(unsigned seg, Bit32u off, const BxPackedZmmRegister *data) BX_CPP_AttrRegparmN(3);
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#if BX_SUPPORT_X86_64
|
||||
BX_SMF Bit8u read_virtual_byte_64(unsigned seg, Bit64u offset) BX_CPP_AttrRegparmN(2);
|
||||
BX_SMF Bit16u read_virtual_word_64(unsigned seg, Bit64u offset) BX_CPP_AttrRegparmN(2);
|
||||
BX_SMF Bit32u read_virtual_dword_64(unsigned seg, Bit64u offset) BX_CPP_AttrRegparmN(2);
|
||||
BX_SMF Bit64u read_virtual_qword_64(unsigned seg, Bit64u offset) BX_CPP_AttrRegparmN(2);
|
||||
BX_SMF void read_virtual_xmmword_64(unsigned seg, Bit64u off, BxPackedXmmRegister *data) BX_CPP_AttrRegparmN(3);
|
||||
BX_SMF void read_virtual_xmmword_aligned_64(unsigned seg, Bit64u off, BxPackedXmmRegister *data) BX_CPP_AttrRegparmN(3);
|
||||
#if BX_SUPPORT_AVX
|
||||
BX_SMF void read_virtual_ymmword_64(unsigned seg, Bit64u offset, BxPackedYmmRegister *data) BX_CPP_AttrRegparmN(3);
|
||||
BX_SMF void read_virtual_ymmword_aligned_64(unsigned seg, Bit64u offset, BxPackedYmmRegister *data) BX_CPP_AttrRegparmN(3);
|
||||
#endif
|
||||
#if BX_SUPPORT_EVEX
|
||||
BX_SMF void read_virtual_zmmword_64(unsigned seg, Bit64u offset, BxPackedZmmRegister *data) BX_CPP_AttrRegparmN(3);
|
||||
BX_SMF void read_virtual_zmmword_aligned_64(unsigned seg, Bit64u offset, BxPackedZmmRegister *data) BX_CPP_AttrRegparmN(3);
|
||||
#endif
|
||||
|
||||
BX_SMF void write_virtual_byte_64(unsigned seg, Bit64u offset, Bit8u data) BX_CPP_AttrRegparmN(3);
|
||||
BX_SMF void write_virtual_word_64(unsigned seg, Bit64u offset, Bit16u data) BX_CPP_AttrRegparmN(3);
|
||||
BX_SMF void write_virtual_dword_64(unsigned seg, Bit64u offset, Bit32u data) BX_CPP_AttrRegparmN(3);
|
||||
BX_SMF void write_virtual_qword_64(unsigned seg, Bit64u offset, Bit64u data) BX_CPP_AttrRegparmN(3);
|
||||
BX_SMF void write_virtual_xmmword_64(unsigned seg, Bit64u offset, const BxPackedXmmRegister *data) BX_CPP_AttrRegparmN(3);
|
||||
BX_SMF void write_virtual_xmmword_aligned_64(unsigned seg, Bit64u offset, const BxPackedXmmRegister *data) BX_CPP_AttrRegparmN(3);
|
||||
#if BX_SUPPORT_AVX
|
||||
BX_SMF void write_virtual_ymmword_64(unsigned seg, Bit64u offset, const BxPackedYmmRegister *data) BX_CPP_AttrRegparmN(3);
|
||||
BX_SMF void write_virtual_ymmword_aligned_64(unsigned seg, Bit64u offset, const BxPackedYmmRegister *data) BX_CPP_AttrRegparmN(3);
|
||||
#endif
|
||||
#if BX_SUPPORT_EVEX
|
||||
BX_SMF void write_virtual_zmmword_64(unsigned seg, Bit64u offset, const BxPackedZmmRegister *data) BX_CPP_AttrRegparmN(3);
|
||||
BX_SMF void write_virtual_zmmword_aligned_64(unsigned seg, Bit64u offset, const BxPackedZmmRegister *data) BX_CPP_AttrRegparmN(3);
|
||||
#endif
|
||||
#endif
|
||||
|
||||
BX_SMF Bit8u read_virtual_byte(unsigned seg, bx_address offset) BX_CPP_AttrRegparmN(2);
|
||||
@ -4611,13 +4579,6 @@ public: // for now...
|
||||
BX_SMF Bit32u read_RMW_virtual_dword_32(unsigned seg, Bit32u offset) BX_CPP_AttrRegparmN(2);
|
||||
BX_SMF Bit64u read_RMW_virtual_qword_32(unsigned seg, Bit32u offset) BX_CPP_AttrRegparmN(2);
|
||||
|
||||
#if BX_SUPPORT_X86_64
|
||||
BX_SMF Bit8u read_RMW_virtual_byte_64(unsigned seg, Bit64u laddr) BX_CPP_AttrRegparmN(2);
|
||||
BX_SMF Bit16u read_RMW_virtual_word_64(unsigned seg, Bit64u laddr) BX_CPP_AttrRegparmN(2);
|
||||
BX_SMF Bit32u read_RMW_virtual_dword_64(unsigned seg, Bit64u laddr) BX_CPP_AttrRegparmN(2);
|
||||
BX_SMF Bit64u read_RMW_virtual_qword_64(unsigned seg, Bit64u laddr) BX_CPP_AttrRegparmN(2);
|
||||
#endif
|
||||
|
||||
BX_SMF Bit8u read_RMW_virtual_byte(unsigned seg, bx_address offset) BX_CPP_AttrRegparmN(2);
|
||||
BX_SMF Bit16u read_RMW_virtual_word(unsigned seg, bx_address offset) BX_CPP_AttrRegparmN(2);
|
||||
BX_SMF Bit32u read_RMW_virtual_dword(unsigned seg, bx_address offset) BX_CPP_AttrRegparmN(2);
|
||||
|
@ -293,7 +293,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XCHG_EqGqM(bxInstruction_c *i)
|
||||
{
|
||||
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
||||
|
||||
Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
|
||||
Bit64u op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
|
||||
Bit64u op2_64 = BX_READ_64BIT_REG(i->src());
|
||||
|
||||
write_RMW_linear_qword(op2_64);
|
||||
|
@ -251,7 +251,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::INSB32_YbDX(bxInstruction_c *i)
|
||||
void BX_CPP_AttrRegparmN(1) BX_CPU_C::INSB64_YbDX(bxInstruction_c *i)
|
||||
{
|
||||
// trigger any segment or page faults before reading from IO port
|
||||
Bit8u value8 = read_RMW_virtual_byte_64(BX_SEG_REG_ES, RDI);
|
||||
Bit8u value8 = read_RMW_linear_byte(BX_SEG_REG_ES, RDI);
|
||||
|
||||
value8 = BX_INP(DX, 1);
|
||||
|
||||
@ -362,7 +362,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::INSW32_YwDX(bxInstruction_c *i)
|
||||
void BX_CPP_AttrRegparmN(1) BX_CPU_C::INSW64_YwDX(bxInstruction_c *i)
|
||||
{
|
||||
// trigger any segment or page faults before reading from IO port
|
||||
Bit16u value16 = read_RMW_virtual_word_64(BX_SEG_REG_ES, RDI);
|
||||
Bit16u value16 = read_RMW_linear_word(BX_SEG_REG_ES, RDI);
|
||||
|
||||
value16 = BX_INP(DX, 2);
|
||||
|
||||
@ -438,7 +438,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::INSD32_YdDX(bxInstruction_c *i)
|
||||
void BX_CPP_AttrRegparmN(1) BX_CPU_C::INSD64_YdDX(bxInstruction_c *i)
|
||||
{
|
||||
// trigger any segment or page faults before reading from IO port
|
||||
Bit32u value32 = read_RMW_virtual_dword_64(BX_SEG_REG_ES, RDI);
|
||||
Bit32u value32 = read_RMW_linear_dword(BX_SEG_REG_ES, RDI);
|
||||
|
||||
value32 = BX_INP(DX, 4);
|
||||
|
||||
|
@ -32,7 +32,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XOR_EqGqM(bxInstruction_c *i)
|
||||
|
||||
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
||||
|
||||
op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
|
||||
op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
|
||||
op2_64 = BX_READ_64BIT_REG(i->src());
|
||||
op1_64 ^= op2_64;
|
||||
write_RMW_linear_qword(op1_64);
|
||||
@ -80,7 +80,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XOR_EqIdM(bxInstruction_c *i)
|
||||
|
||||
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
||||
|
||||
op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
|
||||
op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
|
||||
op1_64 ^= op2_64;
|
||||
write_RMW_linear_qword(op1_64);
|
||||
|
||||
@ -108,7 +108,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::OR_EqIdM(bxInstruction_c *i)
|
||||
|
||||
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
||||
|
||||
op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
|
||||
op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
|
||||
op1_64 |= op2_64;
|
||||
write_RMW_linear_qword(op1_64);
|
||||
|
||||
@ -134,7 +134,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::NOT_EqM(bxInstruction_c *i)
|
||||
{
|
||||
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
||||
|
||||
Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
|
||||
Bit64u op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
|
||||
op1_64 = ~op1_64;
|
||||
write_RMW_linear_qword(op1_64);
|
||||
|
||||
@ -156,7 +156,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::OR_EqGqM(bxInstruction_c *i)
|
||||
|
||||
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
||||
|
||||
op1_64 = read_RMW_virtual_qword_64(i->seg(), eaddr);
|
||||
op1_64 = read_RMW_linear_qword(i->seg(), eaddr);
|
||||
op2_64 = BX_READ_64BIT_REG(i->src());
|
||||
op1_64 |= op2_64;
|
||||
write_RMW_linear_qword(op1_64);
|
||||
@ -204,7 +204,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::AND_EqGqM(bxInstruction_c *i)
|
||||
|
||||
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
||||
|
||||
op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
|
||||
op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
|
||||
op2_64 = BX_READ_64BIT_REG(i->src());
|
||||
op1_64 &= op2_64;
|
||||
write_RMW_linear_qword(op1_64);
|
||||
@ -252,7 +252,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::AND_EqIdM(bxInstruction_c *i)
|
||||
|
||||
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
||||
|
||||
op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
|
||||
op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
|
||||
op1_64 &= op2_64;
|
||||
write_RMW_linear_qword(op1_64);
|
||||
|
||||
|
@ -35,7 +35,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SHLD_EqGqM(bxInstruction_c *i)
|
||||
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
||||
|
||||
/* pointer, segment address pair */
|
||||
op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
|
||||
op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
|
||||
|
||||
if (i->getIaOpcode() == BX_IA_SHLD_EqGq)
|
||||
count = CL;
|
||||
@ -101,7 +101,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SHRD_EqGqM(bxInstruction_c *i)
|
||||
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
||||
|
||||
/* pointer, segment address pair */
|
||||
op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
|
||||
op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
|
||||
|
||||
if (i->getIaOpcode() == BX_IA_SHRD_EqGq)
|
||||
count = CL;
|
||||
@ -164,7 +164,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ROL_EqM(bxInstruction_c *i)
|
||||
|
||||
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
||||
|
||||
Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
|
||||
Bit64u op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
|
||||
|
||||
if (i->getIaOpcode() == BX_IA_ROL_Eq)
|
||||
count = CL;
|
||||
@ -218,7 +218,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ROR_EqM(bxInstruction_c *i)
|
||||
|
||||
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
||||
|
||||
Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
|
||||
Bit64u op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
|
||||
|
||||
if (i->getIaOpcode() == BX_IA_ROR_Eq)
|
||||
count = CL;
|
||||
@ -274,7 +274,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::RCL_EqM(bxInstruction_c *i)
|
||||
|
||||
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
||||
|
||||
Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
|
||||
Bit64u op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
|
||||
|
||||
if (i->getIaOpcode() == BX_IA_RCL_Eq)
|
||||
count = CL;
|
||||
@ -348,7 +348,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::RCR_EqM(bxInstruction_c *i)
|
||||
|
||||
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
||||
|
||||
Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
|
||||
Bit64u op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
|
||||
|
||||
if (i->getIaOpcode() == BX_IA_RCR_Eq)
|
||||
count = CL;
|
||||
@ -420,7 +420,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SHL_EqM(bxInstruction_c *i)
|
||||
|
||||
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
||||
|
||||
Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
|
||||
Bit64u op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
|
||||
|
||||
if (i->getIaOpcode() == BX_IA_SHL_Eq)
|
||||
count = CL;
|
||||
@ -479,7 +479,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SHR_EqM(bxInstruction_c *i)
|
||||
|
||||
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
||||
|
||||
Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
|
||||
Bit64u op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
|
||||
|
||||
if (i->getIaOpcode() == BX_IA_SHR_Eq)
|
||||
count = CL;
|
||||
@ -539,7 +539,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SAR_EqM(bxInstruction_c *i)
|
||||
|
||||
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
||||
|
||||
Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
|
||||
Bit64u op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
|
||||
|
||||
if (i->getIaOpcode() == BX_IA_SAR_Eq)
|
||||
count = CL;
|
||||
|
@ -124,7 +124,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ENTER64_IwIb(bxInstruction_c *i)
|
||||
// ENTER finishes with memory write check on the final stack pointer
|
||||
// the memory is touched but no write actually occurs
|
||||
// emulate it by doing RMW read access from SS:RSP
|
||||
read_RMW_virtual_qword_64(BX_SEG_REG_SS, temp_RSP);
|
||||
read_RMW_linear_qword(BX_SEG_REG_SS, temp_RSP);
|
||||
|
||||
RBP = frame_ptr64;
|
||||
RSP = temp_RSP;
|
||||
|
Loading…
Reference in New Issue
Block a user