382 Commits

Author SHA1 Message Date
Kevin Lawton
2baf4372d1 Got rid of Ctrl-M's in exception.cc, introduced with the
implementation of SYSCALL.
2002-10-06 18:05:21 +00:00
Kevin Lawton
261badee5a Added a couple macros which expand on GCC to __attribute__ directives
to give the compiler some hints:

    BX_CPP_AttrPrintf(formatArg, firstArg)
    BX_CPP_AttrNoReturn()

The first is to tell the compiler that a function receives printf-like
  arguments so it can do some smart argument checking w.r.t. the
  format string.  The 2nd tells the compiler that the function does
  not ever return; it's not used yet, but I'd like to use it on
  exception() after we fix the situation of it returning for debugging.

I fixed one parameter mismatch in cpu/ by deleting a deprecated
  debug print statement.  There are several other mismatches in
  other code modules.
2002-10-06 14:16:23 +00:00
Kevin Lawton
b1d2f7ae48 Added a return value to handleAsyncEvent() so that requests to
exit out of cpu_loop() and back to the caller can be honored.
  Previously, code in this function was a part of cpu_loop so
  a "return;" would already do that.  Now, a value is passed
  back to cpu_loop() to denote such a request, and then a return
  is executed from cpu_loop().

  I haven't tested this yet, but previously I must have broke
  certain debugging requests by moving the code to a separate
  function and not fixing the "return;" statements.
2002-10-05 14:51:25 +00:00
Peter Tattam
db0a37824c Fixed elusive APIC interrupt problems when bochs compiled for P6 or later.
Symptom:  Linux kernel 2.4.19 would hang in random places.  CPU still
running, but in dle loop.

Cause: if APIC interrupt occurred while a PIC interrupt was pending, the
PIC interrupt would be lost.  This is because either an APIC or PIC
interrupt would trash any pending interrupt event because INTR is only a state,
not an event queue.

Temporary fix: reworked apic.cc to have it's own copy of INTR state. cpu.cc now
checks for both cpu.INTR and local_apic.INTR.

Need to do further research to see if local_apic and pic can be integrated in such
a way as properly manage the combined effects of both devices accessing INTR state.
2002-10-05 10:25:31 +00:00
Kevin Lawton
0d22bbafc2 Added a new function writeEFlags() which takes a 32-bit eflags
value and a change-mask, rather than passing all the boolean
  change flags as arguments.

Recoded the POPF instruction in flag_ctrl.cc to use the
  new writeEFlags() function, and to make it more sane.

Also, the old write_flags() and write_eflags() functions
  redirect to writeEFlags() for now.  Later, when we get
  back in a development mode, it would be better to make
  all calls use the new function and get rid of the old ones.
2002-10-05 06:33:10 +00:00
Bryce Denney
d754550d47 - a boolean variable is represented by just 1 bit, 0=false or 1=true. We have
been using the Boolean type for a number of multi-bit fields on the
  assumption that it is actually many bits wide.  However, this assumption is
  unsafe and has caused some bugs that are hard to track down.
- in the Carbon library on MacOS X, Boolean is defined to be an unsigned char.
  This has been causing some of the EFLAGS accessors to fail (bits 8-31)
  because they depended on Boolean being 32 bits wide.  I changed these
  accessors to return Bit32u instead.  I believe that this will finally fix
  [ 618388 ] Unable to boot under MacOS X.
- It would be possible to create a bochs specific type for booleans (bx_bool),
  but it's cleaner to simply use "Boolean" when we actually mean a 1-bit true
  or false field, and Bit8u/Bit32u when it is a multibit field.
2002-10-04 22:25:22 +00:00
Kevin Lawton
66452e9898 Replaced tabs in cpu/*.{cc,h} files with spaces. 2002-10-04 17:04:33 +00:00
Kevin Lawton
f64eb0e16a Changed the hot countdown timer in pc_system.* files to be
32-bits rather than 64.  This is possible, because there is
  always an active null (heartbeat) timer, with periodicity
  of less than or equal to the maximum 32-bit int value.

  This generates a little less code in the hot part of cpu_loop,
  and saved about 3% execution time on a Win95 boot.

Moved the asynchronous handling code from cpu_loop() to its
  own function since it's a long path.  This neatened up the
  code a little (less gotos and all), and made it more clear
  to use a "while (1)" around the iterative code in cpu_loop().
2002-10-04 16:26:10 +00:00
Bryce Denney
f54551717e - include <windows.h> in bochs.h whenever WIN32 is defined. This is required
so that windows types can be used in fields, for example in cdrom.h:
    #ifdef WIN32
      HANDLE cdrom_interface::hFile;
    #endif
- since every file includes bochs.h, I removed includes of <windows.h>
  everywhere else
- modified: bochs.h cpu/extdb.cc gui/win32.cc gui/wx.cc iodev/cdrom.cc
  iodev/eth_win32.cc iodev/floppy.cc
2002-10-03 21:07:04 +00:00
Kevin Lawton
8e33d2eda1 Integrated patches/patch.extra_eflags_asms from Jas, for more asm()
coverage of the high-frequency eflags instructions.  That should
  complete the asm() eflags updates for now, as we should be stabilizing
  moving towards bochs 2.0.
2002-10-03 18:12:40 +00:00
Kevin Lawton
ee47fabac0 Committed new bochs internal timers (in pc_system.{cc,h}.
These seem to be working better, are a more simple design,
  easier to understand, and AFAIK don't have race conditions
  in them like the old ones do.

Re-coded the apic timer, to return cycle accurate values
  which vary with each iteration of a read from a guest OS.
  The previous implementation had very poor resolution.  It
  also didn't check the mask bit to see if an apic timer
  interrupt should occur on countdown to 0.  The apic timer
  now calls its own bochs timer, rather than tag on the
  one in iodev/devices.cc.

I needed to use one new function which is an inline in
  pc_sytem.h.  That would have to be added to the old pc_system.h if
  we have to back-out to it.

Linux/x86-64 now boots until it hits two undefined opcodes:

  FXRSTOR (0f ae).  This restores FPU, MMX, XMM and MXCSR registers
    from a 512-byte region of memory.  We don't implement this yet.

  MOVNTDQ (66 0f e7).  This is a move involving an XMM register.
    The 0x66 prefix is used so it's a double quadword, rather than
    MOVNTQ (0f e7) which operates on a single quadword.

  The Linux kernel panic is on the MOVNTQD opcodes.  Perhaps that's
  because that opcode is used in exception handling of the 1st?

  Looks like we need to implement some new instructions.
2002-10-03 15:47:13 +00:00
Bryce Denney
75ce3842d2 - add GDB stub patch by Johan Rydberg 2002-10-03 05:14:50 +00:00
Bryce Denney
aeffd3e212 - improve panic slightly to show limits on LDT, if the limit is exceeded 2002-10-03 05:10:24 +00:00
Bryce Denney
0d28420aa2 - provide dbg_xlate_linear2phy when running as GDB stub 2002-10-03 04:53:53 +00:00
Bryce Denney
534c4985d9 - specify the exception type on triple exceptions 2002-10-03 04:52:39 +00:00
Bryce Denney
6c5b223752 - improve panic msg slightly 2002-10-03 04:49:47 +00:00
Bryce Denney
de68ca74d9 - call BX_CPU_C::set_INTR(0) instead of just setting the INTR value.
The result is the async_event gets set, though as far as I can tell
  it makes no difference.
2002-10-03 04:45:17 +00:00
Bryce Denney
7a5b4377fb - replace new preprocessor directive "#panic" with call to BX_INFO and
UndefinedOpcode().
2002-10-02 04:01:45 +00:00
Bryce Denney
4c9776fb96 - add -lwinmm to the link lines anytime you use --enable-sb16=win. Now
instead of winmm being a part of GUI_LINK_OPTS_WIN32 only, it is
  placed in @DEVICE_LINE_OPTS@ so that it will be used for sdl, rfb, wx,
  etc.
- solve compile problems when building bximage, niclist, and any other
  console based program.  The compile flags returned by wx-config and
  sdl-config did strange things to these console programs, for example
  redefining main to SDL_main.  Because I wanted to use the
  configure-generated CFLAGS to compile the programs, but I wanted to
  avoid including GUI specific compile options, I split up the configure's
  @CFLAGS@ variable into @CFLAGS@ and @GUI_CFLAGS@, and split
  @CXXFLAGS@ into @CXXFLAGS@ and @GUI_CXXFLAGS@.  All programs in the
  Bochs binary will use both, but the console programs will just use
  @CFLAGS@ or @CXXFLAGS@.
- gui/Makefile.in, I no longer use the gui specific CFLAGS variables,
  SDL_CFLAGS and WX_CXXFLAGS.  These values are included in CFLAGS and
  CXXFLAGS now.
- modified: configure.in, configure, all Makefile.in's
2002-10-01 23:37:50 +00:00
Peter Tattam
562d6b55dd fixed a formatting problem for debug output for external debugger. 2002-10-01 07:13:00 +00:00
Peter Tattam
9078c5fc06 fixed extdb.cc to work in default IA32 bochs 2002-10-01 06:47:06 +00:00
Peter Tattam
94b2dd2bc8 Cleanup of extdb.* files. included in right places now. 2002-10-01 04:13:12 +00:00
Bryce Denney
be4005269b - many parameters in cpu were being redefined if you stop simulation and
restart another one in wxWindows.  Fixed that.  Also, on restart, the
  apic id's left over from the first run were causing panics.  Fixed that.
- modified: main.cc cpu/apic.cc cpu/cpu.h cpu/init.cc
2002-09-30 22:18:53 +00:00
Kevin Lawton
1e5343b421 As a 1st effort to understand/debug the timer code, I cleanup
up pc_system.h.  Moved all variables under the private: section,
  as well as a few member functions.  The string instructions
  were accessing a field directly (only reads), so I indirected
  that via an inline member function for better abstraction.
2002-09-30 16:43:59 +00:00
Kevin Lawton
af31c4583b More merging of modRM==11b if () clauses in logical*.cc functions,
and code cleanup.
2002-09-30 03:37:42 +00:00
Kevin Lawton
00c14e4efe Added ./configure option --enable-all-optimizations which turns on
all available optimizations in one shot.

Finished one last case of an instruction which could but didn't use
  the Read-Modify-Write variants of access.cc functions.

Started going through the integer instructions, merging obvious cases
  where there are two "if (modrm==11b) {" clauses and very little
  action in between, and cleaning up the aweful indentation leftover
  from many years ago when those instructions were implemented using
  cut-and-paste.  We may get a little extra performance out of these
  mods, but they'll also be easier after I'm finished to enhance
  with asm() statements to knock out the lazy flags processing on x86.
2002-09-30 02:02:06 +00:00
Kevin Lawton
67721c48f4 The convience functions protected_mode(), v8086_mode() and real_mode()
now simply return a cached value which is set upon mode changes.
  The biggest problem was protected_mode() which did something like:

    return CR0.PM && ! EFLAGS.VM

  This adds up when it was being executed many times in branch functions
  etc.  Now, cached values are set and sampled instead.
2002-09-29 22:38:18 +00:00
Kevin Lawton
a5537449cd Split out reg-reg and reg-memory cases for a few other high-profile
instructions, mainly variants of MOV.  Had to update fetchdecode64
  to keep it inline with the 32-bit mods.
2002-09-29 19:21:38 +00:00
Stanislav Shwartsman
b8f1d5c031 Fixed the bug caused failures of instrumentation on SMP configuration ... 2002-09-29 16:59:28 +00:00
Kevin Lawton
f99f17bca4 Integrated CPUID CMPXCHG8B bit setting patch from John_Bäckstrand.
Moved it slightly, but it is correct.
2002-09-29 16:23:03 +00:00
Kevin Lawton
895693b3b5 Fixed fetchdecode64() to work with the few MOV instructions which
were split into mod=11b, and mod!=11b cases for performance.
2002-09-29 15:07:11 +00:00
Stanislav Shwartsman
abb1530faf Fixed number of problems with instrumentation merge cause to instrumentation fail the compilation 2002-09-29 15:06:58 +00:00
Stanislav Shwartsman
8d99157993 Another additional for instrumentation 2002-09-29 14:16:30 +00:00
Stanislav Shwartsman
d495bd75a6 fter integration of SplitMod11b changes Bochs failed to compile in SMP mode.
I fixed the compilation errors in CVS, smbd please check if the fix is property;
2002-09-28 09:38:58 +00:00
Peter Tattam
3ed1d61cd4 Initial work on updating bochs disassembler
Used patch.disasm to do

1) clean up the disasm output to make the dispaly of extra stuff optional.
2) included the part of the patch which displays displacements as
   proper addresses.
2002-09-28 06:29:55 +00:00
Kevin Lawton
08a89fe7b6 Performance mod: I implemented a suggestion from Peter Tattam
and Jas Sandys-Lumsdaine to split out common instructions into
  variants which deal with the mod=11b case (Reg-Reg) and the
  other cases (which do memory ops).  Actually, I only split
  MOV_GwEw and MOV_GdEd for now.  According to some instrumentation
  of a Win95 boot, they were the most frequently used opcode by far.
2002-09-28 05:38:11 +00:00
Kevin Lawton
6843c3dfe8 Integrated patches/patch.logicalxx_asm from Jas Sandys-Lumsdaine.
Essentially, when I coded a few of the instructions to use
  asm()s for acceleration of the eflags, I got lazy and only
  used the asm() to compute eflags and let the normal C operation
  do the actual operation.  Jas's patch, moved the asm()s such
  that they now do the work of the operation as well.

  The patches look great.  The code reads a lot better as well.

  Further work can be done to give the compiler more options with
  register scheduling.
2002-09-28 01:48:18 +00:00
Kevin Lawton
c49309de14 Committed [english] patches from Jas Sandys-Lumsdaine. These
were simply replacements of the eflags mask constants with
  the macro names already in cpu.h for asm() statements.  I forgot
  to use the macros for some instructions.
  0x000008d5 -> EFlagsOSZAPCMask
  0x000008d4 -> EFlagsOSZAPMask
2002-09-28 01:16:09 +00:00
Kevin Lawton
13a1e55f20 Committed patches/patch-bochs-instrumentation from Stanislav.
Some things changed in the ctrl_xfer*.cc, fetchdecode*.cc,
and cpu.cc since the original patches, so I did some patch
integration by hand.  Check the placement of the
macros BX_INSTR_FETCH_DECODE_COMPLETED() and BX_INSTR_OPCODE()
in cpu.cc to make sure I go them right.  Also, I changed the
parameters to BX_INSTR_OPCODE() to update them to the new code.
I put some comments before each of these to help determine if
the placement is right.

These macros are only compiled in if you are gathering instrumentation
data from bochs, so they shouldn't effect others.
2002-09-28 00:54:05 +00:00
Stanislav Shwartsman
e6adebfe2d Added MMX opcodes to x86-64 mode
Fixed problem with fetching extra byte in ESCx opcodes if FPU is disabled
2002-09-27 09:56:40 +00:00
Kevin Lawton
47f2e7c404 Got rid of the KPL64Hacks macro. The fixes below eliminated it.
Created 64-bit versions of some branch instructions and
  changed fetchdecode64.cc to use them instead.  This keeps the
  #ifdef pollution down for 32-bit code and made fixing them
  easier.  They needed to clear the upper bits of RIP for
  16-bit operand sizes.  They also should not have had a protection
  limit check in them, especially since that field is still
  32-bit in cpu.h, so there's no way to set nominal 64-bit values.
  The 32-bit versions were also not honoring the upper 32-bits
  of RIP.

  LOOPNE64_Jb
  LOOPE64_Jb
  LOOP64_Jb
  JCXZ64_Jb

Changed all occurances of JCC_Jw/JCC_Jd in fetchdecode64.cc to
  use JCC_Jq, which was coded already.  Both JMP_Jq and JCC_Jq are
  now fixed w.r.t. 16-bit opsizes and upper RIP bit clearing.
2002-09-27 07:01:02 +00:00
Peter Tattam
5bfd2c669e SYSRET patch. need to do invalidate_prefetch() for correctness 2002-09-27 03:33:13 +00:00
Kevin Lawton
109111202c Modified my fix to JMP_Jq to clear all the upper bits,
63..16 when a 16-bit operand size JMP is executed.  Previous
  fix cleared only 63..32.  I since realized, this is the case
  which does parallel the 32-bit semantics.
2002-09-26 22:34:06 +00:00
Kevin Lawton
6d74a334d6 64-bit bug#1: Instructions such as MOV_ALOq were always
fetching 64-bit address opcode info, which was incorrect.

  Fixed.  Got rid of BxImmediate_Oq.  fetchdecode64.cc now
  uses BxImmediateO, like the fetch routine does.  Addresses which
  are embedded in the opcode, have a size which depends on
  the current addressing size.  For long-mode, this is
  either 64 (default) or 32 (AddrSize over-ride).  BxImmediate_O
  now conditionally fetches based on AddrSize.

64-bit bug#2: In JMP_Jq(), when the current operand size is
  16-bits, the upper dword of RIP was not being cleared.  The
  semantics with this case are weird - one would think the
  top 48 bits would be cleared, but apparently only the top
  32 bits are.  Anyways, I fixed this.

Replaced some of the messy immediate fetching (byte-by-byte) in
  fetchdecode64.cc with ReadHost{Q,D}WordFromLittleEndian() calls
  for cleanliness.  Should do this for all the cases, plus
  the 32-bit stuff.
2002-09-26 21:32:26 +00:00
Stanislav Shwartsman
f987ad036e Changed BxError to UndefinedOpcode function for UD2 opcode (oF 0B) 2002-09-26 18:58:50 +00:00
Peter Tattam
67082a5b50 Implemented SWAPGS instruction.
Note that it is unusual to decode (see SGDT instruction)
2002-09-25 14:09:08 +00:00
Bryce Denney
8f9bec3919 - remove unused, and incorrect MSR fields 2002-09-25 13:26:04 +00:00
Peter Tattam
a0d90e9b39 Implemented SYSCALL and SYSRET as part of x86-64 emulation.
Since the SYSCALL replaces the LOADALL instruction, it is incompatible with
earlier CPU types.

At moment, the SYSCALL is only enabled by x86-64 emulation, but the code
can be incorporated in IA32 only emulations.

Instructions added:

0F 05		SYSCALL		(replaces LOADALL)
0F 07		SYSRET		(new)

TODO:  restructure #if ... so that it can be used by non x86-64 emulations.
2002-09-25 12:54:41 +00:00
Peter Tattam
0de63e8492 Fix to stop external debugger trapping for all exceptions. 2002-09-25 06:36:42 +00:00
Bryce Denney
e3539d7a4a - from Peter Tattam: add missing instruction MOVNTI to decode table 2002-09-25 03:32:12 +00:00