Implemented SYSCALL and SYSRET as part of x86-64 emulation.
Since the SYSCALL replaces the LOADALL instruction, it is incompatible with earlier CPU types. At moment, the SYSCALL is only enabled by x86-64 emulation, but the code can be incorporated in IA32 only emulations. Instructions added: 0F 05 SYSCALL (replaces LOADALL) 0F 07 SYSRET (new) TODO: restructure #if ... so that it can be used by non x86-64 emulations.
This commit is contained in:
Peter Tattam
parent
6ba1fd1b06
commit
a0d90e9b39
@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: cpu.h,v 1.78 2002-09-24 18:33:37 kevinlawton Exp $
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// $Id: cpu.h,v 1.79 2002-09-25 12:54:39 ptrumpet Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -166,6 +166,13 @@ typedef Bit32u bx_address;
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#if BX_SUPPORT_X86_64
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// access to 64 bit instruction pointer
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#define RIP BX_CPU_THIS_PTR rip
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// access to 64 bit MSR registers
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#define MSR_STAR (BX_CPU_THIS_PTR msr.star)
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#define MSR_LSTAR (BX_CPU_THIS_PTR msr.lstar)
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#define MSR_CSTAR (BX_CPU_THIS_PTR msr.cstar)
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#define MSR_FMASK (BX_CPU_THIS_PTR msr.fmask)
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#endif
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#if BX_SUPPORT_X86_64
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@ -2226,6 +2233,10 @@ union {
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BX_SMF void POP64_GS(bxInstruction_c *);
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BX_SMF void PUSH64_SS(bxInstruction_c *);
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BX_SMF void POP64_SS(bxInstruction_c *);
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BX_SMF void SYSCALL(bxInstruction_c *i);
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BX_SMF void SYSRET(bxInstruction_c *i);
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#endif // #if BX_SUPPORT_X86_64
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// mch added
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: exception.cc,v 1.19 2002-09-25 06:36:42 ptrumpet Exp $
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// $Id: exception.cc,v 1.20 2002-09-25 12:54:40 ptrumpet Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -1059,3 +1059,262 @@ BX_CPU_C::shutdown_cpu(void)
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BX_PANIC(("shutdown_cpu(): not finished"));
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}
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#if BX_SUPPORT_X86_64
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void
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BX_CPU_C::SYSCALL(bxInstruction_c *i)
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{
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/* pseudo code from AMD manual.
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SYSCALL_START:
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IF (MSR_EFER.SCE = 0) // Check if syscall/sysret are enabled.
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EXCEPTION [#UD]
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IF (LONG_MODE)
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SYSCALL_LONG_MODE
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ELSE // (LEGACY_MODE)
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SYSCALL_LEGACY_MODE
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SYSCALL_LONG_MODE:
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RCX.q = next_RIP
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R11.q = RFLAGS // with rf cleared
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IF (64BIT_MODE)
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temp_RIP.q = MSR_LSTAR
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ELSE // (COMPATIBILITY_MODE)
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temp_RIP.q = MSR_CSTAR
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CS.sel = MSR_STAR.SYSCALL_CS AND 0xFFFC
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CS.attr = 64-bit code,dpl0 // Always switch to 64-bit mode in long mode.
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CS.base = 0x00000000
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CS.limit = 0xFFFFFFFF
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SS.sel = MSR_STAR.SYSCALL_CS + 8
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SS.attr = 64-bit stack,dpl0
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SS.base = 0x00000000
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SS.limit = 0xFFFFFFFF
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RFLAGS = RFLAGS AND ~MSR_SFMASK
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RFLAGS.RF = 0
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CPL = 0
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RIP = temp_RIP
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EXIT
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SYSCALL_LEGACY_MODE:
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RCX.d = next_RIP
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temp_RIP.d = MSR_STAR.EIP
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CS.sel = MSR_STAR.SYSCALL_CS AND 0xFFFC
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CS.attr = 32-bit code,dpl0 // Always switch to 32-bit mode in legacy mode.
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CS.base = 0x00000000
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CS.limit = 0xFFFFFFFF
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SS.sel = MSR_STAR.SYSCALL_CS + 8
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SS.attr = 32-bit stack,dpl0
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SS.base = 0x00000000
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SS.limit = 0xFFFFFFFF
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RFLAGS.VM,IF,RF=0
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CPL = 0
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RIP = temp_RIP
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EXIT
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*/
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bx_address temp_RIP;
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bx_descriptor_t cs_descriptor,ss_descriptor;
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bx_selector_t cs_selector,ss_selector;
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Bit32u dword1, dword2;
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if (!BX_CPU_THIS_PTR msr.sce) {
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exception(BX_GP_EXCEPTION, 0, 0);
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}
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invalidate_prefetch_q();
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if (BX_CPU_THIS_PTR msr.lma) {
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RCX = RIP;
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#warning - PRT: SYSCALL -- do we reset RF/VM before saving to R11?
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R11 = read_eflags();
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if (BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) {
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temp_RIP = MSR_LSTAR;
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}
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else {
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temp_RIP = MSR_CSTAR;
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}
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parse_selector((MSR_STAR >> 32) & 0xFFFC, &cs_selector);
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fetch_raw_descriptor(&cs_selector, &dword1, &dword2, BX_GP_EXCEPTION);
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parse_descriptor(dword1, dword2, &cs_descriptor);
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load_cs(&cs_selector, &cs_descriptor, 0);
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parse_selector((MSR_STAR >> 32) + 8, &ss_selector);
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fetch_raw_descriptor(&ss_selector, &dword1, &dword2, BX_GP_EXCEPTION);
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parse_descriptor(dword1, dword2, &ss_descriptor);
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load_ss(&ss_selector, &ss_descriptor, 0);
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write_eflags(read_eflags() & MSR_FMASK,1,1,1,0);
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BX_CPU_THIS_PTR clear_RF ();
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RIP = temp_RIP;
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}
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else {
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// legacy mode
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ECX = EIP;
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temp_RIP = MSR_STAR & 0xFFFFFFFF;
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parse_selector((MSR_STAR >> 32) & 0xFFFC, &cs_selector);
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fetch_raw_descriptor(&cs_selector, &dword1, &dword2, BX_GP_EXCEPTION);
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parse_descriptor(dword1, dword2, &cs_descriptor);
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load_cs(&cs_selector, &cs_descriptor, 0);
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parse_selector((MSR_STAR >> 32) + 8, &ss_selector);
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fetch_raw_descriptor(&ss_selector, &dword1, &dword2, BX_GP_EXCEPTION);
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parse_descriptor(dword1, dword2, &ss_descriptor);
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load_ss(&ss_selector, &ss_descriptor, 0);
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BX_CPU_THIS_PTR clear_VM ();
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BX_CPU_THIS_PTR clear_IF ();
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BX_CPU_THIS_PTR clear_RF ();
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RIP = temp_RIP;
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}
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}
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void
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BX_CPU_C::SYSRET(bxInstruction_c *i)
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{
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/* from AMD manual
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SYSRET_START:
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IF (MSR_EFER.SCE = 0) // Check if syscall/sysret are enabled.
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EXCEPTION [#UD]
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IF ((!PROTECTED_MODE) || (CPL != 0))
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EXCEPTION [#GP(0)] // SYSRET requires protected mode, cpl0
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IF (64BIT_MODE)
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SYSRET_64BIT_MODE
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ELSE // (!64BIT_MODE)
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SYSRET_NON_64BIT_MODE
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SYSRET_64BIT_MODE:
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IF (OPERAND_SIZE = 64) // Return to 64-bit mode.
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{
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CS.sel = (MSR_STAR.SYSRET_CS + 16) OR 3
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CS.base = 0x00000000
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CS.limit = 0xFFFFFFFF
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CS.attr = 64-bit code,dpl3
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temp_RIP.q = RCX
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}
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ELSE // Return to 32-bit compatibility mode.
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{
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CS.sel = MSR_STAR.SYSRET_CS OR 3
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CS.base = 0x00000000
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CS.limit = 0xFFFFFFFF
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CS.attr = 32-bit code,dpl3
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temp_RIP.d = RCX
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}
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SS.sel = MSR_STAR.SYSRET_CS + 8 // SS selector is changed,
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// SS base, limit, attributes unchanged.
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RFLAGS.q = R11 // RF=0,VM=0
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CPL = 3
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RIP = temp_RIP
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EXIT
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SYSRET_NON_64BIT_MODE:
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CS.sel = MSR_STAR.SYSRET_CS OR 3 // Return to 32-bit legacy protected mode.
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CS.base = 0x00000000
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CS.limit = 0xFFFFFFFF
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CS.attr = 32-bit code,dpl3
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temp_RIP.d = RCX
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SS.sel = MSR_STAR.SYSRET_CS + 8 // SS selector is changed.
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// SS base, limit, attributes unchanged.
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RFLAGS.IF = 1
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CPL = 3
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RIP = temp_RIP
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EXIT
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*/
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bx_address temp_RIP;
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bx_descriptor_t cs_descriptor,ss_descriptor;
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bx_selector_t cs_selector,ss_selector;
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Bit32u dword1, dword2;
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if (!BX_CPU_THIS_PTR msr.sce) {
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exception(BX_GP_EXCEPTION, 0, 0);
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}
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if(real_mode() || CPL != 0) {
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exception(BX_GP_EXCEPTION, 0, 0);
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}
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if (BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) {
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if (i->os64L()) { // Return to 64-bit mode.
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parse_selector(((MSR_STAR >> 48) + 16) | 3, &cs_selector);
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fetch_raw_descriptor(&cs_selector, &dword1, &dword2, BX_GP_EXCEPTION);
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parse_descriptor(dword1, dword2, &cs_descriptor);
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load_cs(&cs_selector, &cs_descriptor, 3);
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temp_RIP = RCX;
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}
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else { // Return to 32-bit compatibility mode.
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parse_selector((MSR_STAR >> 48) | 3, &cs_selector);
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fetch_raw_descriptor(&cs_selector, &dword1, &dword2, BX_GP_EXCEPTION);
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parse_descriptor(dword1, dword2, &cs_descriptor);
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load_cs(&cs_selector, &cs_descriptor, 3);
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temp_RIP = ECX;
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}
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parse_selector((MSR_STAR >> 48) + 8, &ss_selector);
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fetch_raw_descriptor(&ss_selector, &dword1, &dword2, BX_GP_EXCEPTION);
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parse_descriptor(dword1, dword2, &ss_descriptor);
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load_ss(&ss_selector, &ss_descriptor, 0);
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// SS base, limit, attributes unchanged.
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write_eflags(R11,1,1,1,1);
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RIP = temp_RIP;
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}
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else { // (!64BIT_MODE)
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parse_selector((MSR_STAR >> 48) + 16, &cs_selector);
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fetch_raw_descriptor(&cs_selector, &dword1, &dword2, BX_GP_EXCEPTION);
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parse_descriptor(dword1, dword2, &cs_descriptor);
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load_cs(&cs_selector, &cs_descriptor, 3);
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temp_RIP = ECX;
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parse_selector((MSR_STAR >> 48) + 8, &ss_selector);
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fetch_raw_descriptor(&ss_selector, &dword1, &dword2, BX_GP_EXCEPTION);
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parse_descriptor(dword1, dword2, &ss_descriptor);
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load_ss(&ss_selector, &ss_descriptor, 0);
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BX_CPU_THIS_PTR assert_IF ();
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RIP = temp_RIP;
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}
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}
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#endif // BX_SUPPORT_X86_64
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: fetchdecode.cc,v 1.19 2002-09-22 18:22:24 kevinlawton Exp $
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// $Id: fetchdecode.cc,v 1.20 2002-09-25 12:54:41 ptrumpet Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -646,9 +646,17 @@ static BxOpcodeInfo_t BxOpcodeInfo[512*2] = {
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/* 0F 02 */ { BxAnother, &BX_CPU_C::LAR_GvEw },
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/* 0F 03 */ { BxAnother, &BX_CPU_C::LSL_GvEw },
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/* 0F 04 */ { 0, &BX_CPU_C::BxError },
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#if BX_SUPPORT_X86_64
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/* 0F 05 */ { 0, &BX_CPU_C::SYSCALL },
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#else
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/* 0F 05 */ { 0, &BX_CPU_C::LOADALL },
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#endif
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/* 0F 06 */ { 0, &BX_CPU_C::CLTS },
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#if BX_SUPPORT_X86_64
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/* 0F 07 */ { 0, &BX_CPU_C::SYSRET },
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#else
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/* 0F 07 */ { 0, &BX_CPU_C::BxError },
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#endif
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/* 0F 08 */ { 0, &BX_CPU_C::INVD },
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/* 0F 09 */ { 0, &BX_CPU_C::WBINVD },
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/* 0F 0A */ { 0, &BX_CPU_C::BxError },
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@ -1167,9 +1175,17 @@ static BxOpcodeInfo_t BxOpcodeInfo[512*2] = {
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/* 0F 02 */ { BxAnother, &BX_CPU_C::LAR_GvEw },
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/* 0F 03 */ { BxAnother, &BX_CPU_C::LSL_GvEw },
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/* 0F 04 */ { 0, &BX_CPU_C::BxError },
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#if BX_SUPPORT_X86_64
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/* 0F 05 */ { 0, &BX_CPU_C::SYSCALL },
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#else
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/* 0F 05 */ { 0, &BX_CPU_C::LOADALL },
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#endif
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/* 0F 06 */ { 0, &BX_CPU_C::CLTS },
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#if BX_SUPPORT_X86_64
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/* 0F 07 */ { 0, &BX_CPU_C::SYSRET },
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#else
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/* 0F 07 */ { 0, &BX_CPU_C::BxError },
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#endif
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/* 0F 08 */ { 0, &BX_CPU_C::INVD },
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/* 0F 09 */ { 0, &BX_CPU_C::WBINVD },
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/* 0F 0A */ { 0, &BX_CPU_C::BxError },
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: fetchdecode64.cc,v 1.12 2002-09-25 03:32:12 bdenney Exp $
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// $Id: fetchdecode64.cc,v 1.13 2002-09-25 12:54:41 ptrumpet Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -726,9 +726,9 @@ static BxOpcodeInfo_t BxOpcodeInfo64[512*3] = {
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/* 0F 02 */ { BxAnother, &BX_CPU_C::LAR_GvEw },
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/* 0F 03 */ { BxAnother, &BX_CPU_C::LSL_GvEw },
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/* 0F 04 */ { 0, &BX_CPU_C::BxError },
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/* 0F 05 */ { 0, &BX_CPU_C::LOADALL },
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/* 0F 05 */ { 0, &BX_CPU_C::SYSCALL },
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/* 0F 06 */ { 0, &BX_CPU_C::CLTS },
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/* 0F 07 */ { 0, &BX_CPU_C::BxError },
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/* 0F 07 */ { 0, &BX_CPU_C::SYSRET },
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/* 0F 08 */ { 0, &BX_CPU_C::INVD },
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/* 0F 09 */ { 0, &BX_CPU_C::WBINVD },
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/* 0F 0A */ { 0, &BX_CPU_C::BxError },
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@ -1242,9 +1242,9 @@ static BxOpcodeInfo_t BxOpcodeInfo64[512*3] = {
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/* 0F 02 */ { BxAnother, &BX_CPU_C::LAR_GvEw },
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/* 0F 03 */ { BxAnother, &BX_CPU_C::LSL_GvEw },
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/* 0F 04 */ { 0, &BX_CPU_C::BxError },
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/* 0F 05 */ { 0, &BX_CPU_C::LOADALL },
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/* 0F 05 */ { 0, &BX_CPU_C::SYSCALL },
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/* 0F 06 */ { 0, &BX_CPU_C::CLTS },
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/* 0F 07 */ { 0, &BX_CPU_C::BxError },
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/* 0F 07 */ { 0, &BX_CPU_C::SYSRET },
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/* 0F 08 */ { 0, &BX_CPU_C::INVD },
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/* 0F 09 */ { 0, &BX_CPU_C::WBINVD },
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/* 0F 0A */ { 0, &BX_CPU_C::BxError },
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@ -1757,9 +1757,9 @@ static BxOpcodeInfo_t BxOpcodeInfo64[512*3] = {
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/* 0F 02 */ { BxAnother, &BX_CPU_C::LAR_GvEw },
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/* 0F 03 */ { BxAnother, &BX_CPU_C::LSL_GvEw },
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/* 0F 04 */ { 0, &BX_CPU_C::BxError },
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/* 0F 05 */ { 0, &BX_CPU_C::LOADALL },
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/* 0F 05 */ { 0, &BX_CPU_C::SYSCALL },
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/* 0F 06 */ { 0, &BX_CPU_C::CLTS },
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/* 0F 07 */ { 0, &BX_CPU_C::BxError },
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/* 0F 07 */ { 0, &BX_CPU_C::SYSRET },
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/* 0F 08 */ { 0, &BX_CPU_C::INVD },
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/* 0F 09 */ { 0, &BX_CPU_C::WBINVD },
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/* 0F 0A */ { 0, &BX_CPU_C::BxError },
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