Commit Graph

18 Commits

Author SHA1 Message Date
Stanislav Shwartsman
cc694377b9 Standartization of Bochs instruction handlers.
Bochs instruction emulation handlers won't refer to direct fields of instructions like MODRM.NNN or MODRM.RM anymore.
Use generic source/destination indications like SRC1, SRC2 and DST.
All handlers are modified to support new notation. In addition fetchDecode module was modified to assign sources to instructions properly.

Immediate benefits:
- Removal of several duplicated handlers (FMA3 duplicated with FMA4 is a trivial example)
- Simpler to understand fetch-decode code

Future benefits:
- Integration of disassembler into Bochs CPU module, ability to disasm bx_instruction_c instance (planned)

Huge patch. Almost all source files wre modified.
2012-08-05 13:52:40 +00:00
Stanislav Shwartsman
874ba7388d coding style change 2012-06-30 19:33:49 +00:00
Stanislav Shwartsman
39f3051ce5 fixed opcode primitive used for AVX instructions reading only half register (8byte) from the memory 2012-06-30 19:31:32 +00:00
Stanislav Shwartsman
b1a6b34616 implemented PERMIL2PS/PERMIL2PD XOP instructions 2011-10-20 17:37:57 +00:00
Stanislav Shwartsman
5cc04b9955 Implemented AMDs Buldozer XOP and TBM extensions.
XOP: few instructions are still missing, coming soon

  BX_PANIC(("VPERMILPS_VpsHpsWpsVIbR: not implemented yet"));
  BX_PANIC(("VPERMILPD_VpdHpdWpdVIbR: not implemented yet"));
  BX_PANIC(("VPMADCSSWD_VdqHdqWdqVIbR: not implemented yet"));
  BX_PANIC(("VPMADCSWD_VdqHdqWdqVIbR: not implemented yet"));
  BX_PANIC(("VFRCZPS_VpsWpsR: not implemented yet"));
  BX_PANIC(("VFRCZPD_VpdWpdR: not implemented yet"));
  BX_PANIC(("VFRCZSS_VssWssR: not implemented yet"));
  BX_PANIC(("VFRCZSD_VsdWsdR: not implemented yet"));
2011-10-19 20:54:04 +00:00
Stanislav Shwartsman
2580d8c46d added FMA4 AMD instructions support, fixed mem access length for Intel scalar FMA instructions 2011-10-07 14:09:35 +00:00
Stanislav Shwartsman
6751af5d8e added AVX FMA extensions support. The implementation is based on QEMU patch by Peter Maydell (fixed) 2011-09-29 22:20:56 +00:00
Stanislav Shwartsman
8099fd9efd implemented alternative access to CR8: AMD feature. Lock CR0 -> CR8 2011-09-03 15:22:56 +00:00
Stanislav Shwartsman
1f5e036695 lzcnt/tzcnt bmi instructions implemented 2011-08-31 20:43:47 +00:00
Stanislav Shwartsman
c30275016e avx2 added broadcast from register 2011-08-29 21:00:25 +00:00
Stanislav Shwartsman
44241a1e56 - Added support for AVX and AVX2 instructions emulation, to enable configure
with --enable-avx option. When compiled in, AVX still has to be enabled
    using .bochsrc CPUID option. AVX2 FMA instructions still not implemented.

  - Added support for Bit Manipulation Instructions (BMI) emulation. The BMI
    instructions support can be enabled using .bochsrc CPUID option.
2011-08-27 13:47:16 +00:00
Stanislav Shwartsman
dd79431702 rename AVX handlers - match their real operands 2011-08-20 15:10:18 +00:00
Stanislav Shwartsman
2f582db722 compile less stuff for cpu-level=5 2011-06-26 19:15:30 +00:00
Stanislav Shwartsman
778154b3b2 one more fix 2011-06-11 18:27:37 +00:00
Stanislav Shwartsman
ef38c9e235 fix decode for VCVTPH2PS 2011-06-11 18:26:05 +00:00
Stanislav Shwartsman
8399dee24c implemented AVX float16 convert instructions 2011-06-11 13:12:32 +00:00
Stanislav Shwartsman
7664c55b08 first fixups after AVX
(and for AVX)
2011-03-20 18:27:31 +00:00
Stanislav Shwartsman
7ced718040 implemented AVX instructions support
many changes - some cleanup will follow
please report ay found bugs !
2011-03-19 20:09:34 +00:00