Commit Graph

167 Commits

Author SHA1 Message Date
Stanislav Shwartsman
f95ddc4029 Debug Extensions was introduced in Pentium 2010-05-12 18:48:51 +00:00
Stanislav Shwartsman
b0d5142e18 comp fixes 2010-05-06 21:46:39 +00:00
Stanislav Shwartsman
ca95477b7f Implement x86-64 PCID extension 2010-04-29 19:34:32 +00:00
Stanislav Shwartsman
1c2fa8cd0c move 1G_pages support to runtime option 2010-04-24 09:36:04 +00:00
Stanislav Shwartsman
ea95341e05 compile fix 2010-04-22 18:48:39 +00:00
Stanislav Shwartsman
6e1204cb84 Merged X2APIC + X2APIC virtualization 2010-04-08 15:50:39 +00:00
Stanislav Shwartsman
d39d485ece changes variable name to better one 2010-04-03 05:59:07 +00:00
Stanislav Shwartsman
6d01eb5c1f announce (not implement yet) PCID 2010-03-31 14:00:46 +00:00
Stanislav Shwartsman
4560eaab97 fxsave enable 2010-03-30 18:16:48 +00:00
Stanislav Shwartsman
2efb11f2bc fixes 2010-03-30 18:12:19 +00:00
Stanislav Shwartsman
f5ce2a7639 split crreg access functions to separate file 2010-03-25 21:33:07 +00:00
Stanislav Shwartsman
d9574caafe Return max standard not max extended leaf.
- Sebastian
2010-03-21 20:52:36 +00:00
Stanislav Shwartsman
855c19e396 Limit max CPUID for WinNt fix 2010-03-17 20:25:13 +00:00
Stanislav Shwartsman
ef4731ef49 bugfix 2010-03-06 07:00:05 +00:00
Stanislav Shwartsman
e5dc6c51a8 one more sanity check 2010-03-05 20:43:56 +00:00
Stanislav Shwartsman
13a602d069 fix undefined CPUID options when CPU_LEVEL is too small 2010-03-05 20:42:10 +00:00
Stanislav Shwartsman
895c6729eb cpuid debug info 2010-03-05 15:49:44 +00:00
Stanislav Shwartsman
51618b181c winxp doesn't want to boot with CPUID[0].EAX < 3 2010-03-05 15:19:15 +00:00
Stanislav Shwartsman
803e586a01 bugfix 2010-03-05 14:26:23 +00:00
Stanislav Shwartsman
14b578938d bugfixes and cleanups 2010-03-03 14:33:35 +00:00
Stanislav Shwartsman
01cfbdccbc Move MMX to be runtime option 2010-03-01 18:53:53 +00:00
Stanislav Shwartsman
160d4bbded Fixed typo 2010-03-01 17:35:49 +00:00
Stanislav Shwartsman
e3a13a7a55 Make XAPIC runtime option as well 2010-02-28 14:52:17 +00:00
Stanislav Shwartsman
5b6a14656d Make XSAVE as runtime option 2010-02-26 22:53:43 +00:00
Stanislav Shwartsman
5df864b1f1 Move param_names.h into bochs root folder 2010-02-26 14:18:19 +00:00
Stanislav Shwartsman
927c3594d6 enable compilation with CPU_LEVEL <= 6
converted SEP to runtime option as well
2010-02-26 11:44:50 +00:00
Stanislav Shwartsman
32e5f1ffc8 fixes 2010-02-25 22:44:46 +00:00
Stanislav Shwartsman
78a420faa1 first updates 2010-02-25 22:34:56 +00:00
Stanislav Shwartsman
033a20b3b2 allow to configure CPU features at runtime - implemened on example of SSE/AES/MOVBE/POPCNT 2010-02-25 22:04:31 +00:00
Stanislav Shwartsman
33107b54fc - Fixed CPUID function 0x80000005 for Intel CPUs (should be reserved) 2010-01-24 20:21:47 +00:00
Stanislav Shwartsman
c403090327 ! Implemented PCLMULQDQ AES instruction 2009-12-20 09:00:40 +00:00
Stanislav Shwartsman
7254ea36a1 copyright fixes + small optimization 2009-10-14 20:45:29 +00:00
Stanislav Shwartsman
8a95120e12 deprecate --enable-vme option, now it will be supported iff CPU_LEVEL >= 5 (like in real life) 2009-08-10 15:44:50 +00:00
Stanislav Shwartsman
cd445195dd cleanup configure options. All paging related stuff is now automatically set/unset according to cpu-level option.
Related configure options (--enable-pae, --enable-mtrr, --enable-global-pages, --enable-large-pages) are deprecated.
Less configure options - less configure problems :)
2009-06-15 09:30:56 +00:00
Stanislav Shwartsman
cb8ef697d5 PSE-36 is also supported 2009-06-06 10:40:11 +00:00
Stanislav Shwartsman
071a27fd99 fixed 1g paging cpuid bit (26, not 27) 2009-05-19 18:54:05 +00:00
Stanislav Shwartsman
27805e9aba 64 Bit XP boot requirements CPUID changes - thanks Mark ! 2009-05-19 15:46:07 +00:00
Stanislav Shwartsman
2304f2abf1 reduce dependencies from CPU/APIC.H 2009-02-20 22:00:42 +00:00
Stanislav Shwartsman
3a1852ea23 take local APIC read/write access into CPU class from BX_MEM (needed for APIC virtualization later) 2009-02-17 19:20:47 +00:00
Stanislav Shwartsman
f8185a6bc6 Added Intel VMX emulation to Bochs CPU 2009-01-31 10:43:24 +00:00
Stanislav Shwartsman
9929e6ed78 - updated FSF address 2009-01-16 18:18:59 +00:00
Stanislav Shwartsman
69bd21bf1d 1G pages support for CPU 2008-12-11 21:00:01 +00:00
Stanislav Shwartsman
f9ce1171fe rename crreg accessors 2008-12-06 10:21:55 +00:00
Stanislav Shwartsman
5aaeb331fe Fixed typo 2008-09-22 21:41:22 +00:00
Stanislav Shwartsman
3b276bc9fe Implement modern BIOS mode for limiting max reported CPUID function to 3.
This mode is required in order to correctly boot and install WinNT guest
2008-09-22 21:38:15 +00:00
Stanislav Shwartsman
51cb5451d8 Apply CPUID vendor/brand string from @SF 2008-08-19 16:43:07 +00:00
Stanislav Shwartsman
a8adb36dc2 Implemented MOVBE Intel Atom(R) instruction 2008-08-11 18:53:24 +00:00
Stanislav Shwartsman
709d74728d Call #UD exception directly instead of UndefinedOpcode function - for future use 2008-07-13 15:35:10 +00:00
Stanislav Shwartsman
7494b8823b - Support of AES CPU extensions, to enable configure with
--enable-aes option
2008-05-30 20:35:08 +00:00
Stanislav Shwartsman
8e7cf2bf3a - Fixed CPUID
- Merged jmp_call_gate16 and jmp_call_gate32 to single function
2008-05-09 18:09:04 +00:00
Stanislav Shwartsman
52770feedd Add CPUID bits comments and update CPU TODO 2008-04-04 12:23:19 +00:00
Stanislav Shwartsman
167c7075fb Use fastcall gcc attribute for all cpu execution functions - this pure "compiler helper" optimization brings additional 2% speedup to Bochs code 2008-03-22 21:29:41 +00:00
Stanislav Shwartsman
1d13084ab8 Fixed warning with cpu-level=3 2008-02-13 22:51:31 +00:00
Stanislav Shwartsman
398a8ef230 Fixed warning with XSAVE disabled 2008-02-13 22:42:41 +00:00
Stanislav Shwartsman
ae86ad28a0 Finalize XSAVE/XRSTOR instructions 2008-02-13 22:25:24 +00:00
Stanislav Shwartsman
457152334e step2 in XSAVE implementation 2008-02-13 16:45:21 +00:00
Stanislav Shwartsman
a2897933a3 white space cleanup 2008-02-02 21:46:54 +00:00
Stanislav Shwartsman
37fbb82baa Cleanups. Move bxInstruction_c definition to separate file instr.h 2008-01-29 17:13:10 +00:00
Stanislav Shwartsman
1e843cb462 Decode SSE4A
Rework immediate bytes decoding to make it faster
2007-12-15 17:42:24 +00:00
Stanislav Shwartsman
7ca78b88e9 configure/compile changes + small optimizations 2007-12-01 16:45:17 +00:00
Stanislav Shwartsman
35c3791bb7 Correctly implement EFER.FFXSR feature 2007-11-25 20:52:40 +00:00
Stanislav Shwartsman
d4db077e48 Fixed MSVCPP warning/error 2007-11-16 20:33:21 +00:00
Stanislav Shwartsman
e137560b14 Complete MONITOR/MWAIT implemntation (including monitoring of memory range)
Fixed PANIC in read/write Cr/Dr - should #UD with unkown register used
2007-11-01 18:03:48 +00:00
Stanislav Shwartsman
f69a21ab2b Fix some copyright messages 2007-10-15 22:07:52 +00:00
Stanislav Shwartsman
2a1bcb3e21 Some fixes in CPUID by default 2007-10-12 21:45:41 +00:00
Stanislav Shwartsman
082eb05b6b First step to fully configurable CPUID
- put CPUID functions data into array, in future we could load this array from configure file
 - cpuid initialize function is more flexible now but still reuire some work
2007-10-12 19:30:51 +00:00
Stanislav Shwartsman
8adbbcf17c Started first implementation of MONITOR/MWAIT 2007-10-11 21:29:01 +00:00
Stanislav Shwartsman
2548c05537 Enable SSE4_2 in CPUID 2007-10-01 21:08:26 +00:00
Stanislav Shwartsman
dbb91069f4 Added SSE4_2 instructions emulation 2007-10-01 19:59:37 +00:00
Stanislav Shwartsman
deb79e9675 [Bochs-developers] [PATCH] avoid RCX without BX_SUPPORT_X86_64 2007-09-27 16:11:32 +00:00
Stanislav Shwartsman
91e6ca8d5c Implemented MTRR support
Fixes in #PF exception priority
2007-09-20 17:33:35 +00:00
Stanislav Shwartsman
0dc4badfbb Added SSE4A and SSE4_2 to disassembler
Implemented POPCNT instruction
2007-09-19 19:38:10 +00:00
Stanislav Shwartsman
895891b673 Implemented #AC check under configure option
Fixes in misaligned SSE support
2007-07-31 20:25:52 +00:00
Stanislav Shwartsman
58a2595bca Misaligned SSE support 2007-07-15 19:03:39 +00:00
Stanislav Shwartsman
5189cfbf10 SSE4 support 2007-04-19 16:12:21 +00:00
Stanislav Shwartsman
6c139a9c8c Define LIN and PHY address size in config.h 2007-04-14 10:05:30 +00:00
Stanislav Shwartsman
372ac39050 Report some cache info in CPUID - port from QEMU 2007-01-29 17:56:03 +00:00
Stanislav Shwartsman
c24627c00f Implemented CLFLUSH instruction
Set of minor fixes for correctness
2007-01-28 21:27:31 +00:00
Stanislav Shwartsman
f8003098b1 Rename SSE4 to SSE3E to match intel docs. SSE4 coming later ;)
Fixed "last prefix" for REX in 64-bit mode
2007-01-25 19:09:41 +00:00
Stanislav Shwartsman
3cb38b3c45 Indent changes 2006-06-09 21:17:26 +00:00
Stanislav Shwartsman
fea9973570 Fixed failure when running 386 simulation 2006-06-09 21:14:25 +00:00
Stanislav Shwartsman
03eac64013 Added decoding of new SSE4 instructions (recently published in Intel docs)
At least CPUID detects them correctly
The code is never tested (still) ! (but should work fine)
2006-04-06 18:30:05 +00:00
Stanislav Shwartsman
f8c3968d42 Changes list made after CVS service crash:
- Fixed critical bug in CPU code added with one of the prev commits
  - Disasm support for SSE4
  - Rename PNI->SSE3 everywhere in the code
  - Correctly decode, disassemble and execute 'XCHG R8, rAX' x86-64 instruction
  - Correctly decode, disassemble and execute multi-byte NOP 0F F1 opcode
  - Fixed ENTER and LEAVE instructions in x86-64 mode
  - Added ability to turn ON instruction trace, only GUI support is missed.
    Instruction trace could be enabled if Bochs was compiled with disasm
  - More changes Bit32u -> bx_phy_address
  - Complete preliminary implementation of SMM in Bochs, SMI is still PANICs but if you press 'continue' everything should work OK
  - Small code cleanup
  - Update CHANGES and user docs
2006-04-05 17:31:35 +00:00
Stanislav Shwartsman
7b6c2587a9 Now devices could be compiled separatelly from CPU
Averything that required cpu.h include now has it explicitly and there are a lot of files not dependant by CPU at all which will compile a lot faster now ...
2006-03-06 22:03:16 +00:00
Stanislav Shwartsman
7cfa31492c Removed --enable-pni configure option, to compile with PNI use
--enable-sse=3 instead (Stanislav Shwartsman)
2006-02-20 19:28:57 +00:00
Volker Ruppert
a4bc4cc9e0 - fixed cpu parameter handling in SMP mode 2006-02-18 17:28:18 +00:00
Stanislav Shwartsman
0bf03f370d Support for DC and HT in SMP configurations
Extended format of CPU::COUNT .bochsrc option to define number of core/threads
2006-02-11 15:28:43 +00:00
Stanislav Shwartsman
c8cd1f805a Enabled LAHF/SAHF for x86-64 mode 2006-01-17 19:50:42 +00:00
Stanislav Shwartsman
8c91790680 Redefine registers accessors in cpu.h
Change BxSupportPAE and BxSupportGlobalPages macros to Bochs style names
Set bx_cpu_id in BX_CPU_C constructor (safe way)
Backup cpu-level check for paging features at compile time (already checked in configure)
Some warnings and indent fixes
speed up get_segment_base method for x86-64 case
2005-11-26 21:36:51 +00:00
Stanislav Shwartsman
e83c77db49 Preparing to VME implementation
DO NOT ENABLE VME option until the implementation will be completed !
2005-10-16 23:13:19 +00:00
Stanislav Shwartsman
8be190d848 Implemented RDTSCP instruction 2005-08-05 12:47:33 +00:00
Stanislav Shwartsman
663f7d5ef3 CMPXCHG16B instruction implemented 2005-05-19 20:25:16 +00:00
Stanislav Shwartsman
77e398b47b Added comments for cpuid flags 2005-04-20 18:12:54 +00:00
Stanislav Shwartsman
3074078297 Added CVS version header to all the files.
One more small change in APIC
2005-03-19 20:44:01 +00:00
Stanislav Shwartsman
76e0f2cc95 Fixed AMD cpuid 2005-02-20 20:02:54 +00:00
Stanislav Shwartsman
3351723e70 Fixed P4 extended CPUID 2005-02-17 06:07:58 +00:00
Stanislav Shwartsman
91526a90b3 Merged patch
[1123895] x86-64 gdb/debugger fixes by Avi Kivity
2005-02-16 18:58:48 +00:00
Stanislav Shwartsman
a01347f17d Extended information for AMD and Intel processors (CPUID) 2005-02-14 21:17:20 +00:00
Stanislav Shwartsman
b69345225b Correct model_id for Pentium MMX in CPUID 2005-02-13 21:20:48 +00:00
Stanislav Shwartsman
68714924b0 Return local APIC id in CPUID 00000001h function in EBX register 2005-01-29 15:24:57 +00:00