Stanislav Shwartsman
613bad34ee
split MOVZX/MOVSX opcodes
2007-11-17 18:29:00 +00:00
Stanislav Shwartsman
5ec15df46d
Split more opcodes EbIb opcodes
2007-11-17 18:08:46 +00:00
Stanislav Shwartsman
d5a58e1df2
Split more opcodes - G3 group
2007-11-17 16:20:37 +00:00
Stanislav Shwartsman
d9e58bd598
split11b on opcode tables level - split almost eevery splittable instruction
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will be continued
2007-11-17 12:44:10 +00:00
Stanislav Shwartsman
abe3f4c5c2
Split one more opcode
2007-11-16 21:43:23 +00:00
Stanislav Shwartsman
393018cdf8
More split11b
2007-11-16 17:45:58 +00:00
Stanislav Shwartsman
351244d1ea
Rename splitmod11b methods
2007-11-16 08:30:22 +00:00
Stanislav Shwartsman
db02731cbf
Replace BxAnother attribute in fetchdecode by table lookup like it is done in disasm. This is done in preparation to feature huge fetchdecode change - all fethdecode tables will be duplicated and made separatate table for ModC0 and others.
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So ALL instructions will emjoy SplitMod11b automatically (if they want).
After splitting ALL instruction I hope to get 20% speedup at least.
2007-11-15 17:57:56 +00:00
Stanislav Shwartsman
0fa82afe1f
Bugfix and optimize BxResolve calls - bugfix in 64-bit mode
2007-11-13 17:30:54 +00:00
Stanislav Shwartsman
edfff23ca0
Split JCC methods to 16 different methods per branch condition
2007-11-12 18:20:15 +00:00
Stanislav Shwartsman
aed6640ef4
speedup JCC for 64-bit -> separate JZ/JNZ for single faster methods
2007-11-11 21:26:10 +00:00
Stanislav Shwartsman
7648101f28
Optimize metainfo data - ilen() and b1() methods get speedup
2007-11-11 21:14:24 +00:00
Stanislav Shwartsman
eea5023da8
small simplification for fetchdecode
2007-11-11 20:56:22 +00:00
Stanislav Shwartsman
9dc471bbe5
Simplify Guest2HostTLB code
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Fixed APIC CPUID bit
2007-11-11 20:44:07 +00:00
Stanislav Shwartsman
5fd21257de
Remove qick TLBN invalidation code - it actually only could slow down emulation
2007-11-09 21:14:56 +00:00
Stanislav Shwartsman
2653d54e96
split 32-bit modermdata variable in BxInstruction_c to 4 Bit8u variables
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this way it is possible to save shifts and masking when accessing modrm fields
2007-11-08 18:21:37 +00:00
Stanislav Shwartsman
2f5fa07af3
small speedups
2007-11-07 10:40:40 +00:00
Stanislav Shwartsman
44e49f2fe2
Fixed CPU state print in debug dump
2007-11-05 16:28:03 +00:00
Stanislav Shwartsman
e137560b14
Complete MONITOR/MWAIT implemntation (including monitoring of memory range)
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Fixed PANIC in read/write Cr/Dr - should #UD with unkown register used
2007-11-01 18:03:48 +00:00
Stanislav Shwartsman
ce0e0287fb
Naturally speedup repeat execution functions, fix TLB index calculations
2007-10-30 22:15:42 +00:00
Stanislav Shwartsman
a4e20e9d29
warnings fixed
2007-10-24 23:02:09 +00:00
Stanislav Shwartsman
6d7134ef99
Remove dump_cpu debugger function, CPI method and all related structures.
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Extended 'info' command in debugger to have all functionality of dump_cpu if needed. Also param tree print always could be used !
2007-10-23 21:51:44 +00:00
Stanislav Shwartsman
292153b30e
Fixed BranchImm cases in 64-bit mode
2007-10-22 17:41:41 +00:00
Stanislav Shwartsman
42fdd8a3a1
During Bochs benchmarking I figured out that hostasm actually slow down the emulation ... so remove this ugly code which also doesn't help :)
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speedup flags update for some instructions - idea was taken from DT patch by h.johansson
2007-10-21 22:07:33 +00:00
Stanislav Shwartsman
28a5c6741c
Fix SSE4 MOVNTDQA instruction - memory access must be always aligned
2007-10-20 17:03:33 +00:00
Stanislav Shwartsman
679110caa9
fixed push to new stack for long mode
2007-10-19 12:40:19 +00:00
Stanislav Shwartsman
0fc32d3c81
Fixed except_chk issue in more clean way - added 3 new methods for pushing to new, still not loaded stack
2007-10-19 10:14:33 +00:00
Stanislav Shwartsman
4ec7f5df39
Optimize access to IP (16 bit) - made IP register similar to GPR
2007-10-18 22:44:39 +00:00
Stanislav Shwartsman
e9801ef501
Support for restore cpu (and any other device from bochs root) from debugger
2007-10-14 19:04:51 +00:00
Stanislav Shwartsman
082eb05b6b
First step to fully configurable CPUID
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- put CPUID functions data into array, in future we could load this array from configure file
- cpuid initialize function is more flexible now but still reuire some work
2007-10-12 19:30:51 +00:00
Stanislav Shwartsman
8adbbcf17c
Started first implementation of MONITOR/MWAIT
2007-10-11 21:29:01 +00:00
Stanislav Shwartsman
f6ed95785f
added cpu state param - for future use and for dbg info
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started to move debugger to info bx_param interface -> info sse and info mmx commands modified
2007-10-11 18:12:00 +00:00
Stanislav Shwartsman
82b7eaabd5
CLFLUSH do not fault when checking execute only segment
2007-10-10 21:48:46 +00:00
Stanislav Shwartsman
07739173f5
add --show-ips to all configs for future releases (it is not ON by default ?)
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Bit32u -> bx_phy_address in debugger and some other places
2007-10-09 19:49:23 +00:00
Stanislav Shwartsman
dbb91069f4
Added SSE4_2 instructions emulation
2007-10-01 19:59:37 +00:00
Stanislav Shwartsman
071c5c1a26
A lot of changes but everything is really trivial.
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Make save/restore default feature, the configure option for save/restore removed from configure script and save/restore made available forever. All code now assume it is exists. Bochs save/restore tree previosly called "save_restore" renamed to "bochs" tree and it will be havily used everywhere, starting from save/restore and ending by various bochs debugger functions. I am going to rework debugger code to get rid of debug CPU access functions and use this "bochs" param tree instead
2007-09-28 19:52:08 +00:00
Stanislav Shwartsman
91e6ca8d5c
Implemented MTRR support
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Fixes in #PF exception priority
2007-09-20 17:33:35 +00:00
Stanislav Shwartsman
0dc4badfbb
Added SSE4A and SSE4_2 to disassembler
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Implemented POPCNT instruction
2007-09-19 19:38:10 +00:00
Stanislav Shwartsman
70f513b07b
Make efer control MSR separate register
2007-09-10 20:47:08 +00:00
Stanislav Shwartsman
412eeeeb7c
Get crregs definition to separate file from cpu.h
2007-09-10 16:00:15 +00:00
Stanislav Shwartsman
016660698e
just code cleanup, preparation for future
2007-08-31 18:09:34 +00:00
Stanislav Shwartsman
5ac1bb6646
rewrite page fault
2007-08-30 16:48:10 +00:00
Stanislav Shwartsman
895891b673
Implemented #AC check under configure option
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Fixes in misaligned SSE support
2007-07-31 20:25:52 +00:00
Stanislav Shwartsman
38d1f39c77
Converted CR0 bits to one register similar to CR4 - a bit slower but helps with other features implemntation
2007-07-09 15:16:14 +00:00
Stanislav Shwartsman
5189cfbf10
SSE4 support
2007-04-19 16:12:21 +00:00
Stanislav Shwartsman
6c139a9c8c
Define LIN and PHY address size in config.h
2007-04-14 10:05:30 +00:00
Stanislav Shwartsman
223b9fda0e
Fixed RIP relative mode when in 32-bit address size
2007-04-09 21:15:00 +00:00
Stanislav Shwartsman
e26609fa97
Support for Intel LSS/LFS/LGS in 64-bit mode
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TODO: have both AMD and Intelk versions
2007-04-09 20:28:15 +00:00
Stanislav Shwartsman
1ec33ec518
Correctly #UD on aliased instructions when no SSE2 is configured
2007-03-22 22:51:41 +00:00
Stanislav Shwartsman
b8787fd5a7
Some code cleanups and warning fixes
2007-03-14 21:15:15 +00:00
