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3562 Commits

Author SHA1 Message Date
Stanislav Shwartsman
2ea27f1afb more correct fix for load with mask and broadcast 2019-12-13 14:57:32 +00:00
Stanislav Shwartsman
6d612df280 AVX512_BITALG: Fixed decoding of VPSHUFBITQMB instruction 2019-12-13 14:11:08 +00:00
Stanislav Shwartsman
abdeea560a AVX512: fix masked broadcast with mask of all zero corner case - no memory access should be made at all 2019-12-13 13:44:30 +00:00
Stanislav Shwartsman
c9ac9a1e43 AVX512_VBMI: Fixed decoding of VPERMB instruction 2019-12-13 13:24:02 +00:00
Stanislav Shwartsman
fc79466dcb AVX512_VBMI: Fixed decoding of VPERMI2B/VPERMT2B instructions 2019-12-13 13:08:45 +00:00
Stanislav Shwartsman
eb009ddd00 fixed VPACKSSDW/VPACKUSDW opcodes - allow broadcast 2019-12-13 12:53:48 +00:00
Stanislav Shwartsman
f9d04849b3 fixed decoding for VPSHLDVW/VPSHRDVW/VPSHLDVD/VPSHLDVQ/VPSHRDVD/VPSHRDVQ 2019-12-13 12:34:16 +00:00
Stanislav Shwartsman
9bbf43ed4b fixed decoding of AVX512_VNNI instructions 2019-12-13 08:39:23 +00:00
Stanislav Shwartsman
27e96c807c fixed decoding of VPBROADCASTMW2D opcode 2019-12-13 08:09:18 +00:00
Stanislav Shwartsman
7090abe1a1 fix one more place with incorrect detection of x2apic MSR space. use function instead of magic numbers in all places 2019-12-10 21:07:19 +00:00
Stanislav Shwartsman
e35fcd1782 clarify err message 2019-12-10 20:38:45 +00:00
Stanislav Shwartsman
6c8db0f569 simplify interfaces to DTLB/ITLB 2019-12-09 18:46:36 +00:00
Stanislav Shwartsman
4b66fecaad split Bochs CPU TLB to DTLB and ITLB to avoid aliasing conflicts between them. ~5% speedup measured 2019-12-09 18:37:02 +00:00
Stanislav Shwartsman
311ef81e87 fixed comment 2019-12-09 18:16:29 +00:00
Stanislav Shwartsman
b228d22303 expose TLB_INDEX_OF for debugger compilation 2019-12-09 16:55:41 +00:00
Stanislav Shwartsman
8befc3bf82 make separate class for TLB to be used in CPU class. preparation to DTLB and ITLB split of TLB structure 2019-12-09 16:49:51 +00:00
Stanislav Shwartsman
44b3ebeca2 remove BX_TRUE/BX_FALSE macros, use stdc++ true/false instead 2019-12-09 16:44:36 +00:00
Stanislav Shwartsman
96e2c50bef applying SF patch #545 Speling fixes 2019-12-09 16:29:23 +00:00
Stanislav Shwartsman
12d228abde split vmx initialization to multiple methods for better code readability, improve VMX error messages 2019-12-08 20:46:51 +00:00
Stanislav Shwartsman
b3076793b7 fixed MSR range reserved for x2apic 2019-12-08 19:17:46 +00:00
Stanislav Shwartsman
c7fdf6d428 add ability to read or write LVT_CMCI APIC register. It will never fire and interrupt as #MC is don't care but user can configure the interface 2019-12-06 19:38:59 +00:00
Stanislav Shwartsman
06d826755b increase max configurable msrs to 0x1000 again 2019-12-06 12:31:51 +00:00
Stanislav Shwartsman
8c385f2a9a fix in cpu features print 2019-12-06 11:05:05 +00:00
Stanislav Shwartsman
7861ff5160 fixed typo in feature name 2019-12-06 10:39:42 +00:00
Stanislav Shwartsman
0c75e0beaf extract xcr0_support bits calculation to a function 2019-12-06 09:23:28 +00:00
Stanislav Shwartsman
893aa10359 cosmetic changes 2019-12-04 19:53:08 +00:00
Stanislav Shwartsman
276482e67d fix set_PKRU method 2019-12-04 18:52:00 +00:00
Stanislav Shwartsman
951361a3a5 bugfix: PKRU should affect only user-mode memory accesses (bug in page translation) 2019-12-04 17:27:57 +00:00
Stanislav Shwartsman
4e9e3f85de simplify code by merging two opcodes with similar behavior 2019-11-27 15:31:32 +00:00
Stanislav Shwartsman
36991e9f59 fixed typo in comment 2019-11-26 17:39:09 +00:00
Stanislav Shwartsman
7833a82347 fixed bug in instruction decoding - regression before release 2019-11-22 17:46:54 +00:00
Stanislav Shwartsman
3b9db9e4cd fixed bug in faststring optimizations recently introduced 2019-11-22 10:54:36 +00:00
Stanislav Shwartsman
46b862fe5e do not truncate disasm branch target in 64-bit mode 2019-11-20 20:41:03 +00:00
Stanislav Shwartsman
a030d03935 fixed bug in instruction decoding - regression before release 2019-11-20 20:18:22 +00:00
Stanislav Shwartsman
83846cc821 fixed bug in instruction decoding - regression before release 2019-11-20 20:11:00 +00:00
Stanislav Shwartsman
82b6f7cb6c fixed bug in instruction decoding - regression before release 2019-11-20 19:58:51 +00:00
Stanislav Shwartsman
00237b5c9d add missing XSAVE_PKRU_STATE_LEN define 2019-11-12 22:02:02 +00:00
Stanislav Shwartsman
4aba3b54e7 do not use uint 2019-11-12 22:00:29 +00:00
Stanislav Shwartsman
b1e9701e5c avoid goto 2019-11-12 21:48:54 +00:00
Stanislav Shwartsman
8d7bffa311 optimize highest_priority_int routine 2019-11-12 21:42:57 +00:00
Stanislav Shwartsman
8d13fb3ffd rewritten APIC interfaces to hold irr/isr/tmr in Bit32u values instead of array of bytes 2019-11-12 21:15:29 +00:00
Stanislav Shwartsman
a70df308fa add defines for CPUID bits published in latest SDM 071 2019-11-12 18:54:08 +00:00
Stanislav Shwartsman
c098ab7de1 take msr.ia32_spec_ctrl out of @ifdef CPU_LEVEL=6 2019-10-26 20:17:41 +00:00
Stanislav Shwartsman
d766cc8112 implemented SCA (Side-Channel-Attack) Prevention reporting and corresponding MSR registers, enabled for Icelake-U CPU definition 2019-10-26 20:09:30 +00:00
Stanislav Shwartsman
a580b0ccbe cosmetic change with no logic affected 2019-10-24 20:33:05 +00:00
Stanislav Shwartsman
c97bb62b6c VMX: Fix RDRAND/RDSEED VMEXIT Instruction-Information Field 2019-10-24 20:12:00 +00:00
Stanislav Shwartsman
330c691367 VMX: Fix RDRAND/RDSEED VMEXIT Instruction-Information Field 2019-10-24 20:10:56 +00:00
Stanislav Shwartsman
27e23ad1eb give priority for VMX induced #UD in INVPCID and RDTSCP instructions over all other exeptions that could be generated there 2019-10-24 19:49:25 +00:00
Stanislav Shwartsman
72b9d26717 coding style changes, tab2space, macro2function or macro2const 2019-10-17 19:23:27 +00:00
Stanislav Shwartsman
eec720c62b convert bochs.h macros to inline functions with strong types 2019-10-16 20:46:00 +00:00
Stanislav Shwartsman
64ae3fe1ba convert bochs.h macros to inline functions with strong types 2019-10-16 20:19:34 +00:00
Stanislav Shwartsman
bb5ccc97c1 remove unused function parameter 2019-10-16 19:53:04 +00:00
Stanislav Shwartsman
9c61e9e9f5 remove unused function parameter 2019-10-16 19:48:21 +00:00
Stanislav Shwartsman
10c23b5d39 implement fasstring for 64-bit mode as well 2019-10-14 19:50:47 +00:00
Stanislav Shwartsman
9d7233a9b5 fixed code duplication in fast string invocaion code 2019-10-14 19:15:01 +00:00
Stanislav Shwartsman
bf16e720f8 add faststring mode for REP MOVSW in 32-bit mode 2019-10-14 18:12:37 +00:00
Stanislav Shwartsman
fe7acbb6a0 more faststring cleanup 2019-10-14 14:54:07 +00:00
Stanislav Shwartsman
ee3f1b91a3 allow fast string only for forward strings and simplify the code 2019-10-14 14:45:01 +00:00
Stanislav Shwartsman
f0245b5f2b introduce special handlers for zero-idiom instructions - ~1% speedup to simulation. infra for fast string emulation in 64-bit mode 2019-10-14 06:40:19 +00:00
Stanislav Shwartsman
d6e08702e4 add Icelake-U model to CPUDB database. TODO: verify its VMX features 2019-09-24 20:26:14 +00:00
Stanislav Shwartsman
2ae332cce8 patch by Luigu.B - significantly speedup multi-threaded guest simulation 2019-08-09 19:57:13 +00:00
Stanislav Shwartsman
2eb47f866f added minor clarifications based on most recent AMD SDM published 2019-07-30 18:17:21 +00:00
Stanislav Shwartsman
49ebaf8397 typofix: attached MASK_K0 attr to wrong opcode 2019-05-25 19:10:55 +00:00
Stanislav Shwartsman
bc4af1b08d add missing break statement in disasm.cc 2019-05-25 19:08:39 +00:00
Stanislav Shwartsman
4d10852c04 impemented recently published VP2INTERSECTD/Q instructions 2019-05-25 19:07:09 +00:00
Stanislav Shwartsman
85780d939a extract MONITOR/MWAIT stuff to separate trsnlation unit 2019-05-25 18:32:17 +00:00
Stanislav Shwartsman
55d2dc6b0c add some CPUID and VMCS definitions from latest SDM 2019-05-22 18:22:22 +00:00
Stanislav Shwartsman
0c28705b18 fixed compilation under MAC env 2019-05-18 04:50:07 +00:00
Stanislav Shwartsman
662b252507 added missing endif 2019-04-17 16:04:34 +00:00
Stanislav Shwartsman
a022d71774 fixed compilation 2019-04-14 04:05:04 +00:00
Stanislav Shwartsman
54bdb24e4b remove MOVDIRI opcode extension for now until fugured out how nicely do MOVDIR64B, they better to be both done with same CPUID feature name 2019-02-22 19:15:53 +00:00
Stanislav Shwartsman
3e007fbdea fixed copy-pasted issue with decoding 2019-02-17 21:54:38 +00:00
Stanislav Shwartsman
c3f7a34cf5 fixed copy-pasted issue with decoding 2019-02-17 21:41:45 +00:00
Stanislav Shwartsman
3da93728b3 split some opcode reference tables in new decoder between x86-64 and 32 for better perf 2019-02-17 21:22:54 +00:00
Stanislav Shwartsman
cd79d22113 fixes for 32-bit mode only compilation 2019-02-16 19:42:04 +00:00
Stanislav Shwartsman
bfd7bb2c13 remove redundant VL512 runtime check, redundant with new decoder 2019-02-16 19:25:32 +00:00
Stanislav Shwartsman
4f625b23e0 enable yet another Bochs new decoder. It is a bit slower than old one but it is much more extendable so adding new opcode won't be nightmare anymore 2019-02-16 15:23:24 +00:00
Stanislav Shwartsman
61dcc4ace7 remove unreferenced decode table 2019-01-29 13:44:39 +00:00
Stanislav Shwartsman
f8ec18acd5 fix decode/disasm of AVX512-VBMI2 VPSH*D* opcodes 2019-01-27 18:52:03 +00:00
Stanislav Shwartsman
0b18a42e4e fixed decoding of AVX-512 opcodes 2019-01-27 17:35:21 +00:00
Stanislav Shwartsman
5cb4639891 fixed decoding of AVX-512 opcodes 2019-01-27 17:31:28 +00:00
Stanislav Shwartsman
6dc5cfe80b fixed typo in opcode name 2019-01-24 20:10:46 +00:00
Stanislav Shwartsman
af75c2a81e fixed comment in the opcode table for EVEX 2019-01-22 18:31:39 +00:00
Stanislav Shwartsman
9bc7faf493 dump all supported CPU fetures into Bochs log from CPUID object 2019-01-05 20:17:39 +00:00
Stanislav Shwartsman
264b797363 fixed compilation without VMX=2 2019-01-03 06:28:15 +00:00
Stanislav Shwartsman
098791bf95 report MONITOR/MWAITX for Ryzen configuration in CPUID 2018-12-01 12:15:57 +00:00
Stanislav Shwartsman
7a183ab520 fixed PDE4M reserved bits checking if physical address wider than 40 bit 2018-11-22 11:51:33 +00:00
Stanislav Shwartsman
eff201773f convert some defines to enums and const expressions 2018-11-17 12:45:44 +00:00
Stanislav Shwartsman
e387876145 Enable PML VMX feature in Skylake-X 2018-10-26 19:54:22 +00:00
Stanislav Shwartsman
2e192372c0 fixes for CNL CPUID 2018-10-26 19:46:56 +00:00
Stanislav Shwartsman
a9aa1040c1 add Intel Cannonlake CPU model to CPUDB featuring AVF512FMA52 and SHA instructions 2018-10-26 09:23:58 +00:00
Stanislav Shwartsman
cf41679b53 closing bug report: Missing TLB_flush on VMX_VMEXIT_EPT_VIOLATION 2018-08-30 20:18:27 +00:00
Stanislav Shwartsman
3995dc13aa fixed compilation of CLZERO pn cpu-level<6 2018-08-26 18:11:10 +00:00
Stanislav Shwartsman
965bcc2606 support 64-bit in 'info tab' debugger command and also speed it up significantly 2018-08-14 08:09:09 +00:00
Stanislav Shwartsman
eebdb4d63a avoid gcc 7.3 warning 2018-05-27 19:09:59 +00:00
Stanislav Shwartsman
a8413aa838 update comments base on latest AMD spec 2018-05-27 18:13:24 +00:00
Stanislav Shwartsman
fcd9ce1634 fix compilation without x86_64 2018-04-15 14:22:16 +00:00
Stanislav Shwartsman
d000e21001 added MOVDIRI opcode implementation 2018-04-06 05:06:36 +00:00
Stanislav Shwartsman
fd15b61d94 keep def of YMM/ZMM register even if AVX or EVEX are not compiled in and let reading/writing them to MEM 2018-04-04 19:31:56 +00:00
Stanislav Shwartsman
8c9f7f54b6 update CPUID definitions with recently published EAS-33 extensions document 2018-04-04 18:15:44 +00:00