2002-09-13 19:53:22 +04:00
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/////////////////////////////////////////////////////////////////////////
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2011-02-25 00:54:04 +03:00
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// $Id$
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2002-09-13 19:53:22 +04:00
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/////////////////////////////////////////////////////////////////////////
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//
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2015-01-25 23:55:10 +03:00
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// Copyright (C) 2001-2015 The Bochs Project
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2002-09-13 19:53:22 +04:00
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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2009-01-16 21:18:59 +03:00
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
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2007-11-17 21:08:46 +03:00
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/////////////////////////////////////////////////////////////////////////
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2002-09-13 19:53:22 +04:00
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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2006-03-07 01:03:16 +03:00
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#include "cpu.h"
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2002-09-13 19:53:22 +04:00
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#define LOG_THIS BX_CPU_THIS_PTR
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2002-11-19 08:47:45 +03:00
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#if BX_SUPPORT_X86_64
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2002-09-13 19:53:22 +04:00
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2011-07-07 00:01:18 +04:00
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_RRXIq(bxInstruction_c *i)
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2002-09-13 19:53:22 +04:00
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{
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2012-08-05 17:52:40 +04:00
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BX_WRITE_64BIT_REG(i->dst(), i->Iq());
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2011-07-07 00:01:18 +04:00
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BX_NEXT_INSTR(i);
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2002-09-13 19:53:22 +04:00
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}
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2011-07-07 00:01:18 +04:00
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV64_GdEdM(bxInstruction_c *i)
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2008-09-07 01:10:40 +04:00
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{
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2015-05-17 00:06:59 +03:00
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Bit64u eaddr = BX_CPU_RESOLVE_ADDR_64(i);
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2014-10-21 01:08:29 +04:00
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Bit32u val32 = read_linear_dword(i->seg(), get_laddr64(i->seg(), eaddr));
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2012-08-05 17:52:40 +04:00
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BX_WRITE_32BIT_REGZ(i->dst(), val32);
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2011-07-07 00:01:18 +04:00
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BX_NEXT_INSTR(i);
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2008-09-07 01:10:40 +04:00
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}
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2011-07-07 00:01:18 +04:00
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV64_EdGdM(bxInstruction_c *i)
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2009-04-06 22:44:28 +04:00
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{
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2015-05-17 00:06:59 +03:00
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Bit64u eaddr = BX_CPU_RESOLVE_ADDR_64(i);
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2009-04-06 22:44:28 +04:00
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2014-10-21 01:08:29 +04:00
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write_linear_dword(i->seg(), get_laddr64(i->seg(), eaddr), BX_READ_32BIT_REG(i->src()));
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2011-07-07 00:01:18 +04:00
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BX_NEXT_INSTR(i);
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2009-04-06 22:44:28 +04:00
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}
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2011-07-07 00:01:18 +04:00
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_EqGqM(bxInstruction_c *i)
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2002-09-13 19:53:22 +04:00
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{
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2015-05-17 00:06:59 +03:00
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bx_address eaddr = BX_CPU_RESOLVE_ADDR_64(i);
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2008-01-10 22:37:56 +03:00
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2014-10-21 01:08:29 +04:00
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write_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr), BX_READ_64BIT_REG(i->src()));
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2011-07-07 00:01:18 +04:00
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BX_NEXT_INSTR(i);
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2002-09-13 19:53:22 +04:00
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}
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2012-03-25 15:54:32 +04:00
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV64S_EqGqM(bxInstruction_c *i)
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2007-11-18 21:24:46 +03:00
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{
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2015-05-17 00:06:59 +03:00
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bx_address eaddr = BX_CPU_RESOLVE_ADDR_64(i);
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2008-01-10 22:37:56 +03:00
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2012-08-05 17:52:40 +04:00
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stack_write_qword(eaddr, BX_READ_64BIT_REG(i->src()));
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2012-03-25 15:54:32 +04:00
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_GqEqM(bxInstruction_c *i)
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{
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2015-05-17 00:06:59 +03:00
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bx_address eaddr = BX_CPU_RESOLVE_ADDR_64(i);
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2014-10-21 01:08:29 +04:00
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Bit64u val64 = read_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
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2012-03-25 15:54:32 +04:00
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2012-08-05 17:52:40 +04:00
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BX_WRITE_64BIT_REG(i->dst(), val64);
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2011-07-07 00:01:18 +04:00
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BX_NEXT_INSTR(i);
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2007-11-18 21:24:46 +03:00
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}
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2002-09-13 19:53:22 +04:00
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2012-03-25 15:54:32 +04:00
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV64S_GqEqM(bxInstruction_c *i)
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{
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2015-05-17 00:06:59 +03:00
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bx_address eaddr = BX_CPU_RESOLVE_ADDR_64(i);
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2012-03-25 15:54:32 +04:00
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2012-08-05 17:52:40 +04:00
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BX_WRITE_64BIT_REG(i->dst(), stack_read_qword(eaddr));
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2012-03-25 15:54:32 +04:00
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BX_NEXT_INSTR(i);
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}
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2011-07-07 00:01:18 +04:00
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_GqEqR(bxInstruction_c *i)
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2007-11-18 21:24:46 +03:00
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{
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2012-08-05 17:52:40 +04:00
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BX_WRITE_64BIT_REG(i->dst(), BX_READ_64BIT_REG(i->src()));
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2011-07-07 00:01:18 +04:00
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BX_NEXT_INSTR(i);
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2002-09-13 19:53:22 +04:00
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}
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2011-07-07 00:01:18 +04:00
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LEA_GqM(bxInstruction_c *i)
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2002-09-13 19:53:22 +04:00
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{
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2015-05-17 00:06:59 +03:00
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bx_address eaddr = BX_CPU_RESOLVE_ADDR_64(i);
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2008-01-10 22:37:56 +03:00
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2012-08-05 17:52:40 +04:00
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BX_WRITE_64BIT_REG(i->dst(), eaddr);
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2011-07-07 00:01:18 +04:00
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BX_NEXT_INSTR(i);
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2002-09-13 19:53:22 +04:00
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}
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2011-07-07 00:01:18 +04:00
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_ALOq(bxInstruction_c *i)
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2002-09-13 19:53:22 +04:00
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{
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2014-10-21 01:08:29 +04:00
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AL = read_linear_byte(i->seg(), get_laddr64(i->seg(), i->Iq()));
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2011-07-07 00:01:18 +04:00
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BX_NEXT_INSTR(i);
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2002-09-13 19:53:22 +04:00
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}
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2011-07-07 00:01:18 +04:00
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_OqAL(bxInstruction_c *i)
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2002-09-13 19:53:22 +04:00
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{
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2014-10-21 01:08:29 +04:00
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write_linear_byte(i->seg(), get_laddr64(i->seg(), i->Iq()), AL);
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2011-07-07 00:01:18 +04:00
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BX_NEXT_INSTR(i);
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2002-09-13 19:53:22 +04:00
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}
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2011-07-07 00:01:18 +04:00
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_AXOq(bxInstruction_c *i)
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2002-09-13 19:53:22 +04:00
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{
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2014-10-21 01:08:29 +04:00
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AX = read_linear_word(i->seg(), get_laddr64(i->seg(), i->Iq()));
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2011-07-07 00:01:18 +04:00
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BX_NEXT_INSTR(i);
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2002-09-13 19:53:22 +04:00
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}
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2011-07-07 00:01:18 +04:00
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_OqAX(bxInstruction_c *i)
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2002-09-13 19:53:22 +04:00
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{
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2014-10-21 01:08:29 +04:00
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write_linear_word(i->seg(), get_laddr64(i->seg(), i->Iq()), AX);
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2011-07-07 00:01:18 +04:00
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BX_NEXT_INSTR(i);
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2002-09-13 19:53:22 +04:00
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}
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2011-07-07 00:01:18 +04:00
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_EAXOq(bxInstruction_c *i)
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2002-09-13 19:53:22 +04:00
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{
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2014-10-21 01:08:29 +04:00
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RAX = read_linear_dword(i->seg(), get_laddr64(i->seg(), i->Iq()));
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2011-07-07 00:01:18 +04:00
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BX_NEXT_INSTR(i);
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2002-09-13 19:53:22 +04:00
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}
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2011-07-07 00:01:18 +04:00
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_OqEAX(bxInstruction_c *i)
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2002-09-13 19:53:22 +04:00
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{
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2014-10-21 01:08:29 +04:00
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write_linear_dword(i->seg(), get_laddr64(i->seg(), i->Iq()), EAX);
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2011-07-07 00:01:18 +04:00
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BX_NEXT_INSTR(i);
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2002-09-13 19:53:22 +04:00
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}
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2011-07-07 00:01:18 +04:00
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_RAXOq(bxInstruction_c *i)
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2002-09-13 19:53:22 +04:00
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{
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2014-10-21 01:08:29 +04:00
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RAX = read_linear_qword(i->seg(), get_laddr64(i->seg(), i->Iq()));
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2011-07-07 00:01:18 +04:00
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BX_NEXT_INSTR(i);
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2002-09-13 19:53:22 +04:00
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}
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2011-07-07 00:01:18 +04:00
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_OqRAX(bxInstruction_c *i)
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2002-09-13 19:53:22 +04:00
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{
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2014-10-21 01:08:29 +04:00
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write_linear_qword(i->seg(), get_laddr64(i->seg(), i->Iq()), RAX);
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2011-07-07 00:01:18 +04:00
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BX_NEXT_INSTR(i);
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2002-09-13 19:53:22 +04:00
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}
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2011-07-07 00:01:18 +04:00
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_EqIdM(bxInstruction_c *i)
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2002-09-13 19:53:22 +04:00
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{
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2007-11-17 15:44:10 +03:00
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Bit64u op_64 = (Bit32s) i->Id();
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2008-01-10 22:37:56 +03:00
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2015-05-17 00:06:59 +03:00
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bx_address eaddr = BX_CPU_RESOLVE_ADDR_64(i);
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2008-01-10 22:37:56 +03:00
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2014-10-21 01:08:29 +04:00
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write_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr), op_64);
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2011-07-07 00:01:18 +04:00
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BX_NEXT_INSTR(i);
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2007-11-17 15:44:10 +03:00
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}
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2005-05-21 00:06:50 +04:00
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2011-07-07 00:01:18 +04:00
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_EqIdR(bxInstruction_c *i)
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2007-11-17 15:44:10 +03:00
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{
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Bit64u op_64 = (Bit32s) i->Id();
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2012-08-05 17:52:40 +04:00
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BX_WRITE_64BIT_REG(i->dst(), op_64);
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2011-07-07 00:01:18 +04:00
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BX_NEXT_INSTR(i);
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2002-09-13 19:53:22 +04:00
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}
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2011-07-07 00:01:18 +04:00
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVZX_GqEbM(bxInstruction_c *i)
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2002-09-13 19:53:22 +04:00
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{
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2015-05-17 00:06:59 +03:00
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bx_address eaddr = BX_CPU_RESOLVE_ADDR_64(i);
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2008-01-10 22:37:56 +03:00
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2014-10-21 01:08:29 +04:00
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Bit8u op2_8 = read_linear_byte(i->seg(), get_laddr64(i->seg(), eaddr));
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2007-11-18 21:24:46 +03:00
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/* zero extend byte op2 into qword op1 */
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2012-08-05 17:52:40 +04:00
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BX_WRITE_64BIT_REG(i->dst(), (Bit64u) op2_8);
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2011-07-07 00:01:18 +04:00
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BX_NEXT_INSTR(i);
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2007-11-18 21:24:46 +03:00
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}
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2011-07-07 00:01:18 +04:00
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVZX_GqEbR(bxInstruction_c *i)
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2007-11-18 21:24:46 +03:00
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{
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2012-08-05 17:52:40 +04:00
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Bit8u op2_8 = BX_READ_8BIT_REGx(i->src(), i->extend8bitL());
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2002-09-13 19:53:22 +04:00
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2005-05-21 00:06:50 +04:00
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/* zero extend byte op2 into qword op1 */
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2012-08-05 17:52:40 +04:00
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BX_WRITE_64BIT_REG(i->dst(), (Bit64u) op2_8);
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2011-07-07 00:01:18 +04:00
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BX_NEXT_INSTR(i);
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2002-09-13 19:53:22 +04:00
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}
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2011-07-07 00:01:18 +04:00
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVZX_GqEwM(bxInstruction_c *i)
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2002-09-13 19:53:22 +04:00
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{
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2015-05-17 00:06:59 +03:00
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bx_address eaddr = BX_CPU_RESOLVE_ADDR_64(i);
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2008-01-10 22:37:56 +03:00
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2014-10-21 01:08:29 +04:00
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Bit16u op2_16 = read_linear_word(i->seg(), get_laddr64(i->seg(), eaddr));
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2002-09-13 19:53:22 +04:00
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2005-05-21 00:06:50 +04:00
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/* zero extend word op2 into qword op1 */
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2012-08-05 17:52:40 +04:00
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BX_WRITE_64BIT_REG(i->dst(), (Bit64u) op2_16);
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2011-07-07 00:01:18 +04:00
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BX_NEXT_INSTR(i);
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2002-09-13 19:53:22 +04:00
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}
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2011-07-07 00:01:18 +04:00
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVZX_GqEwR(bxInstruction_c *i)
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2007-11-18 21:24:46 +03:00
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{
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2012-08-05 17:52:40 +04:00
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Bit16u op2_16 = BX_READ_16BIT_REG(i->src());
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2007-11-18 21:24:46 +03:00
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/* zero extend word op2 into qword op1 */
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2012-08-05 17:52:40 +04:00
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BX_WRITE_64BIT_REG(i->dst(), (Bit64u) op2_16);
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2011-07-07 00:01:18 +04:00
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BX_NEXT_INSTR(i);
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2007-11-18 21:24:46 +03:00
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}
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2011-07-07 00:01:18 +04:00
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVSX_GqEbM(bxInstruction_c *i)
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2002-09-13 19:53:22 +04:00
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{
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2015-05-17 00:06:59 +03:00
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bx_address eaddr = BX_CPU_RESOLVE_ADDR_64(i);
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2008-01-10 22:37:56 +03:00
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|
|
2014-10-21 01:08:29 +04:00
|
|
|
Bit8u op2_8 = read_linear_byte(i->seg(), get_laddr64(i->seg(), eaddr));
|
2002-09-13 19:53:22 +04:00
|
|
|
|
2005-05-21 00:06:50 +04:00
|
|
|
/* sign extend byte op2 into qword op1 */
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_WRITE_64BIT_REG(i->dst(), (Bit8s) op2_8);
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_INSTR(i);
|
2002-09-13 19:53:22 +04:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVSX_GqEbR(bxInstruction_c *i)
|
2007-11-18 21:24:46 +03:00
|
|
|
{
|
2012-08-05 17:52:40 +04:00
|
|
|
Bit8u op2_8 = BX_READ_8BIT_REGx(i->src(), i->extend8bitL());
|
2007-11-18 21:24:46 +03:00
|
|
|
|
|
|
|
/* sign extend byte op2 into qword op1 */
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_WRITE_64BIT_REG(i->dst(), (Bit8s) op2_8);
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_INSTR(i);
|
2007-11-18 21:24:46 +03:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVSX_GqEwM(bxInstruction_c *i)
|
2002-09-13 19:53:22 +04:00
|
|
|
{
|
2015-05-17 00:06:59 +03:00
|
|
|
bx_address eaddr = BX_CPU_RESOLVE_ADDR_64(i);
|
2008-01-10 22:37:56 +03:00
|
|
|
|
2014-10-21 01:08:29 +04:00
|
|
|
Bit16u op2_16 = read_linear_word(i->seg(), get_laddr64(i->seg(), eaddr));
|
2002-09-13 19:53:22 +04:00
|
|
|
|
2005-05-21 00:06:50 +04:00
|
|
|
/* sign extend word op2 into qword op1 */
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_WRITE_64BIT_REG(i->dst(), (Bit16s) op2_16);
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_INSTR(i);
|
2002-09-13 19:53:22 +04:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVSX_GqEwR(bxInstruction_c *i)
|
2007-11-18 21:24:46 +03:00
|
|
|
{
|
2012-08-05 17:52:40 +04:00
|
|
|
Bit16u op2_16 = BX_READ_16BIT_REG(i->src());
|
2007-11-18 21:24:46 +03:00
|
|
|
|
|
|
|
/* sign extend word op2 into qword op1 */
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_WRITE_64BIT_REG(i->dst(), (Bit16s) op2_16);
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_INSTR(i);
|
2007-11-18 21:24:46 +03:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVSX_GqEdM(bxInstruction_c *i)
|
2002-09-13 19:53:22 +04:00
|
|
|
{
|
2015-05-17 00:06:59 +03:00
|
|
|
bx_address eaddr = BX_CPU_RESOLVE_ADDR_64(i);
|
2008-01-10 22:37:56 +03:00
|
|
|
|
2014-10-21 01:08:29 +04:00
|
|
|
Bit32u op2_32 = read_linear_dword(i->seg(), get_laddr64(i->seg(), eaddr));
|
2002-09-13 19:53:22 +04:00
|
|
|
|
2005-05-21 00:06:50 +04:00
|
|
|
/* sign extend word op2 into qword op1 */
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_WRITE_64BIT_REG(i->dst(), (Bit32s) op2_32);
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_INSTR(i);
|
2002-09-13 19:53:22 +04:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVSX_GqEdR(bxInstruction_c *i)
|
2007-11-18 21:24:46 +03:00
|
|
|
{
|
2012-08-05 17:52:40 +04:00
|
|
|
Bit32u op2_32 = BX_READ_32BIT_REG(i->src());
|
2007-11-18 21:24:46 +03:00
|
|
|
|
|
|
|
/* sign extend word op2 into qword op1 */
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_WRITE_64BIT_REG(i->dst(), (Bit32s) op2_32);
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_INSTR(i);
|
2007-11-18 21:24:46 +03:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XCHG_EqGqM(bxInstruction_c *i)
|
2002-09-13 19:53:22 +04:00
|
|
|
{
|
2015-05-17 00:06:59 +03:00
|
|
|
bx_address eaddr = BX_CPU_RESOLVE_ADDR_64(i);
|
2008-01-10 22:37:56 +03:00
|
|
|
|
2015-01-26 23:01:25 +03:00
|
|
|
Bit64u op1_64 = read_RMW_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
|
2012-08-05 17:52:40 +04:00
|
|
|
Bit64u op2_64 = BX_READ_64BIT_REG(i->src());
|
2005-05-21 00:06:50 +04:00
|
|
|
|
2015-01-25 23:55:10 +03:00
|
|
|
write_RMW_linear_qword(op2_64);
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_WRITE_64BIT_REG(i->src(), op1_64);
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_INSTR(i);
|
2007-11-18 21:24:46 +03:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XCHG_EqGqR(bxInstruction_c *i)
|
2007-11-18 21:24:46 +03:00
|
|
|
{
|
2012-08-05 17:52:40 +04:00
|
|
|
Bit64u op1_64 = BX_READ_64BIT_REG(i->dst());
|
|
|
|
Bit64u op2_64 = BX_READ_64BIT_REG(i->src());
|
2005-05-21 00:06:50 +04:00
|
|
|
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_WRITE_64BIT_REG(i->src(), op1_64);
|
|
|
|
BX_WRITE_64BIT_REG(i->dst(), op2_64);
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_INSTR(i);
|
2002-09-13 19:53:22 +04:00
|
|
|
}
|
|
|
|
|
2007-12-15 01:41:43 +03:00
|
|
|
// Note: CMOV accesses a memory source operand (read), regardless
|
|
|
|
// of whether condition is true or not. Thus, exceptions may
|
|
|
|
// occur even if the MOV does not take place.
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVO_GqEqR(bxInstruction_c *i)
|
2007-12-15 01:41:43 +03:00
|
|
|
{
|
|
|
|
if (get_OF())
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_WRITE_64BIT_REG(i->dst(), BX_READ_64BIT_REG(i->src()));
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_INSTR(i);
|
2007-12-15 01:41:43 +03:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNO_GqEqR(bxInstruction_c *i)
|
2007-12-15 01:41:43 +03:00
|
|
|
{
|
|
|
|
if (!get_OF())
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_WRITE_64BIT_REG(i->dst(), BX_READ_64BIT_REG(i->src()));
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_INSTR(i);
|
2007-12-15 01:41:43 +03:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVB_GqEqR(bxInstruction_c *i)
|
2007-12-15 01:41:43 +03:00
|
|
|
{
|
|
|
|
if (get_CF())
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_WRITE_64BIT_REG(i->dst(), BX_READ_64BIT_REG(i->src()));
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_INSTR(i);
|
2007-12-15 01:41:43 +03:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNB_GqEqR(bxInstruction_c *i)
|
2007-12-15 01:41:43 +03:00
|
|
|
{
|
|
|
|
if (!get_CF())
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_WRITE_64BIT_REG(i->dst(), BX_READ_64BIT_REG(i->src()));
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_INSTR(i);
|
2007-12-15 01:41:43 +03:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVZ_GqEqR(bxInstruction_c *i)
|
2007-12-15 01:41:43 +03:00
|
|
|
{
|
|
|
|
if (get_ZF())
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_WRITE_64BIT_REG(i->dst(), BX_READ_64BIT_REG(i->src()));
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_INSTR(i);
|
2007-12-15 01:41:43 +03:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNZ_GqEqR(bxInstruction_c *i)
|
2007-12-15 01:41:43 +03:00
|
|
|
{
|
|
|
|
if (!get_ZF())
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_WRITE_64BIT_REG(i->dst(), BX_READ_64BIT_REG(i->src()));
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_INSTR(i);
|
2007-12-15 01:41:43 +03:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVBE_GqEqR(bxInstruction_c *i)
|
2007-12-15 01:41:43 +03:00
|
|
|
{
|
|
|
|
if (get_CF() || get_ZF())
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_WRITE_64BIT_REG(i->dst(), BX_READ_64BIT_REG(i->src()));
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_INSTR(i);
|
2007-12-15 01:41:43 +03:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNBE_GqEqR(bxInstruction_c *i)
|
2007-12-15 01:41:43 +03:00
|
|
|
{
|
|
|
|
if (! (get_CF() || get_ZF()))
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_WRITE_64BIT_REG(i->dst(), BX_READ_64BIT_REG(i->src()));
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_INSTR(i);
|
2007-12-15 01:41:43 +03:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVS_GqEqR(bxInstruction_c *i)
|
2002-09-13 19:53:22 +04:00
|
|
|
{
|
2007-12-15 01:41:43 +03:00
|
|
|
if (get_SF())
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_WRITE_64BIT_REG(i->dst(), BX_READ_64BIT_REG(i->src()));
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_INSTR(i);
|
2007-12-15 01:41:43 +03:00
|
|
|
}
|
2002-09-13 19:53:22 +04:00
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNS_GqEqR(bxInstruction_c *i)
|
2007-12-15 01:41:43 +03:00
|
|
|
{
|
|
|
|
if (!get_SF())
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_WRITE_64BIT_REG(i->dst(), BX_READ_64BIT_REG(i->src()));
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_INSTR(i);
|
2007-12-15 01:41:43 +03:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVP_GqEqR(bxInstruction_c *i)
|
2007-12-15 01:41:43 +03:00
|
|
|
{
|
|
|
|
if (get_PF())
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_WRITE_64BIT_REG(i->dst(), BX_READ_64BIT_REG(i->src()));
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_INSTR(i);
|
2007-12-15 01:41:43 +03:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNP_GqEqR(bxInstruction_c *i)
|
2007-12-15 01:41:43 +03:00
|
|
|
{
|
|
|
|
if (!get_PF())
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_WRITE_64BIT_REG(i->dst(), BX_READ_64BIT_REG(i->src()));
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_INSTR(i);
|
2007-12-15 01:41:43 +03:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVL_GqEqR(bxInstruction_c *i)
|
2007-12-15 01:41:43 +03:00
|
|
|
{
|
|
|
|
if (getB_SF() != getB_OF())
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_WRITE_64BIT_REG(i->dst(), BX_READ_64BIT_REG(i->src()));
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_INSTR(i);
|
2007-12-15 01:41:43 +03:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNL_GqEqR(bxInstruction_c *i)
|
2007-12-15 01:41:43 +03:00
|
|
|
{
|
|
|
|
if (getB_SF() == getB_OF())
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_WRITE_64BIT_REG(i->dst(), BX_READ_64BIT_REG(i->src()));
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_INSTR(i);
|
2007-12-15 01:41:43 +03:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVLE_GqEqR(bxInstruction_c *i)
|
2007-12-15 01:41:43 +03:00
|
|
|
{
|
|
|
|
if (get_ZF() || (getB_SF() != getB_OF()))
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_WRITE_64BIT_REG(i->dst(), BX_READ_64BIT_REG(i->src()));
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_INSTR(i);
|
2007-12-15 01:41:43 +03:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNLE_GqEqR(bxInstruction_c *i)
|
2007-12-15 01:41:43 +03:00
|
|
|
{
|
|
|
|
if (! get_ZF() && (getB_SF() == getB_OF()))
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_WRITE_64BIT_REG(i->dst(), BX_READ_64BIT_REG(i->src()));
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_INSTR(i);
|
2007-12-15 01:41:43 +03:00
|
|
|
}
|
|
|
|
|
2002-11-19 08:47:45 +03:00
|
|
|
#endif /* if BX_SUPPORT_X86_64 */
|