Change-Id: Ia16e66a7bdac37019e6256405b9f10024909c69a
Reviewed-on: https://review.haiku-os.org/c/haiku/+/6215
Tested-by: Automation <automation@haiku-os.org>
Reviewed-by: Fredrik Holmqvist <fredrik.holmqvist@gmail.com>
Reviewed-by: Alex von Gluck IV <kallisti5@unixzen.com>
we detect basically the cpu info before loading the microcode,
to be able to detect the vendor, and avoid any update on hypervisor.
I couldn't test because my cpu doesn't have any update available.
Change-Id: I6aea830158423b3ee13b640be8a788fc9041e23c
Reviewed-on: https://review.haiku-os.org/c/haiku/+/5859
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
Reviewed-by: Jérôme Duval <jerome.duval@gmail.com>
tested on Zen2 (Ryzen 3 5300U)
This support was submitted in October for inclusion in Linux.
Haiku supports only two profiles. We could probably add some more, and let the driver says which it supports.
Change-Id: Id7754b445bc32a691d58a1e4af630351562abc22
Reviewed-on: https://review.haiku-os.org/c/haiku/+/5826
Reviewed-by: waddlesplash <waddlesplash@gmail.com>
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
* set PXN for all page tables below KERNEL_BASE
* also set PXN for physical page mapper
PXN, Privileged execute-never
When the PXN bit is 1, a Permission fault is generated if the processor
is executing at PL1 and attempts to execute an instruction fetched from
the corresponding memory region.
Change-Id: I3056cbed151004ac9edfbc81ebeada328aeb603c
Reviewed-on: https://review.haiku-os.org/c/haiku/+/5607
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
Reviewed-by: waddlesplash <waddlesplash@gmail.com>
Use the Privileged Only Thread ID Register aka TPIDRPRW to store
the current thread pointer.
The Privileged Only Thread ID Register is only accessible
in privileged modes, and is read/write.
see: ARMv7 Architecture Reference Manual,
section B3.12.46 CP15 c13 Software Thread ID registers
Change-Id: I5273bee8a80b78cdc547b2f6c96632d120eb3d55
Reviewed-on: https://review.haiku-os.org/c/haiku/+/5608
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
Reviewed-by: waddlesplash <waddlesplash@gmail.com>
GICv2 can use interrupt numbers up to 1019:
* 0-15 are SGIs aka ICIs
* 16-31 are PPIs
* 32-1019 are SPIs
Change-Id: I1c19be77105683da3f6988a5607b14dc10a899db
Reviewed-on: https://review.haiku-os.org/c/haiku/+/5565
Reviewed-by: Fredrik Holmqvist <fredrik.holmqvist@gmail.com>
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
Set AP[2:0] and XN flags based on page attributes.
PXN is not implemented as it seems to be available only
in L1 descriptors on ARMv7.
Set TEX, B, C flags based on memoryType:
* B_MTR_UC is mapped to Strongly Ordered (TEX=0, B=0, C=0)
* B_MTR_WC is mapped to Shareable Device Memory (TEX=0, B=1, C=0)
* B_MTR_WT is mapped to Outer and Inner Write-Through, no Write-Allocate (TEX=0, B=0, C=1)
* B_MTR_WB is mapped to Outer and Inner Write-Back, no Write-Allocate (TEx=0, B=1, C=1)
* B_MTR_WP has no direct equivalent on the ARM so it's mapped as B_MTR_WB
* default is Write-Back
Implement ARMPagingMethod32Bit::AttributesToPageTableEntryFlags()
for mapping from page attributes to AP[2:0] and XN flags.
Implement ARMPagingMethod32Bit::PageTableEntryFlagsToAttributes()
for the reverse mapping used in Query() and QueryInterrupt()
i.e. recover page attributes from AP[2:0] and XN flags.
Implement ARMPagingMethod32Bit::MemoryTypeToPageTableEntryFlags()
fr mapping from memoryType to TEX, B, C flags.
Implement ARMVMTranslationMap32Bit::Protect() which used to be commented out.
Accessed and modified flags are not implemented yet, so no such
flags are returned from Query() and QueryInterrupt().
Also because of this, we just invalidate TLB on any call to Protect()
without checking whether the page has been accessed.
Change-Id: I027af5c02bd6218d9f92a58044aeb26373e1956b
Reviewed-on: https://review.haiku-os.org/c/haiku/+/5236
Reviewed-by: Adrien Destugues <pulkomandy@gmail.com>
Reviewed-by: Fredrik Holmqvist <fredrik.holmqvist@gmail.com>
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
Bootloader:
* set permissions to kernel read/write, no user access
for initially mapped memory areas
* set permissions to kernel read/write, no execute,
no user access for UART
Kernel:
* physical memory mapper uses kernel read/write mapping
with no-execute bit enabled
* all other pages are mapped as read/write/execute for
kernel and user
* proper access permissions and memory types to be
implemented later
Enforce memory access permissions by setting DACR to
client mode for domain #0, no access for other domains.
see ARM Architecture Reference Manual, section B3.7 Memory access control
and in particular the following subsections:
B3.7.1 Access permissions
B3.7.2 Execute-never restrictions on instruction fetching
B3.7.3 Domains, Short-descriptor format only
Change-Id: I8127b4c72dc516d013cb9751d80d6f3a9ec835e6
Reviewed-on: https://review.haiku-os.org/c/haiku/+/5233
Reviewed-by: Adrien Destugues <pulkomandy@gmail.com>
vendor_id shall come after the bitfields
Move hpet_address to separate struct definition so we can apply
the correct packed flags.
see also: https://wiki.osdev.org/HPET
Change-Id: Iced005846fedd4b895910e9b61137d5349db5b41
Reviewed-on: https://review.haiku-os.org/c/haiku/+/4859
Reviewed-by: Jérôme Duval <jerome.duval@gmail.com>
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
* Working under qemu smp 1,2+
* Working on SiFive Unmatched
* x86_64 efi not broken by smp_boot_other_cpus change
Change-Id: I32ebc17913e46ed082be9ade8f56448bbf12f16e
Reviewed-on: https://review.haiku-os.org/c/haiku/+/4705
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
Reviewed-by: Alex von Gluck IV <kallisti5@unixzen.com>
For now this is used on RISCV64 to indicate that interrupts will always
be on CPU 0. However, in the future, some architectures may want
or require interrupts to be "steered" in various ways, and this
also paves the way for that.
Change-Id: Iec79870cf5c4898d102d0e624de19602271ae772
Reviewed-on: https://review.haiku-os.org/c/haiku/+/4721
Reviewed-by: waddlesplash <waddlesplash@gmail.com>
Reviewed-by: Alex von Gluck IV <kallisti5@unixzen.com>
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
we don't sample if the last sample is too recent and use the cached result.
Change-Id: I17ed29bda7fe7276f1a4148b3e1985c9d32ae032
Reviewed-on: https://review.haiku-os.org/c/haiku/+/4101
Reviewed-by: Jérôme Duval <jerome.duval@gmail.com>
Reviewed-by: Adrien Destugues <pulkomandy@gmail.com>
This reverts commit 3e8376c6dd.
Reason for revert: Bootloader currently fails to load kernel
It should be added back once the kernel can start.
Change-Id: Iebefbf8681aff4dff09cef7b7eb832b61f7789c7
Reviewed-on: https://review.haiku-os.org/c/haiku/+/4579
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
Reviewed-by: Alex von Gluck IV <kallisti5@unixzen.com>
Change-Id: Ifadd47204be1ec688017a567d43dca38c80bd1df
Reviewed-on: https://review.haiku-os.org/c/haiku/+/4431
Reviewed-by: Alex von Gluck IV <kallisti5@unixzen.com>
Reviewed-by: Fredrik Holmqvist <fredrik.holmqvist@gmail.com>