kernel/int: Allow arch_int_assign_to_cpu to make its own decisions.
For now this is used on RISCV64 to indicate that interrupts will always be on CPU 0. However, in the future, some architectures may want or require interrupts to be "steered" in various ways, and this also paves the way for that. Change-Id: Iec79870cf5c4898d102d0e624de19602271ae772 Reviewed-on: https://review.haiku-os.org/c/haiku/+/4721 Reviewed-by: waddlesplash <waddlesplash@gmail.com> Reviewed-by: Alex von Gluck IV <kallisti5@unixzen.com> Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
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@ -34,7 +34,7 @@ void arch_int_enable_io_interrupt(int irq);
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void arch_int_disable_io_interrupt(int irq);
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void arch_int_configure_io_interrupt(int irq, uint32 config);
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bool arch_int_are_interrupts_enabled(void);
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void arch_int_assign_to_cpu(int32 irq, int32 cpu);
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int32 arch_int_assign_to_cpu(int32 irq, int32 cpu);
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#ifdef __cplusplus
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}
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@ -84,12 +84,14 @@ arch_int_disable_io_interrupt(int irq)
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/* arch_int_*_interrupts() and friends are in arch_asm.S */
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void
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int32
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arch_int_assign_to_cpu(int32 irq, int32 cpu)
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{
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// intentionally left blank; no SMP support (yet)
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// Not yet supported.
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return 0;
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}
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static void
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print_iframe(const char *event, struct iframe *frame)
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{
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@ -39,10 +39,11 @@ arch_int_disable_io_interrupt(int irq)
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}
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void
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int32
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arch_int_assign_to_cpu(int32 irq, int32 cpu)
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{
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// intentionally left blank; no SMP support (yet)
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// Not yet supported.
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return 0;
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}
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@ -95,10 +95,11 @@ arch_int_disable_io_interrupt(int irq)
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/* arch_int_*_interrupts() and friends are in arch_asm.S */
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void
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int32
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arch_int_assign_to_cpu(int32 irq, int32 cpu)
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{
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// intentionally left blank; no SMP support (yet)
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// Not yet supported.
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return 0;
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}
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@ -571,7 +571,9 @@ ppc_set_current_cpu_exception_context(struct ppc_cpu_exception_context *context)
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}
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void
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int32
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arch_int_assign_to_cpu(int32 irq, int32 cpu)
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{
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// Not yet supported.
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return 0;
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}
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@ -549,8 +549,9 @@ arch_int_disable_io_interrupt(int irq)
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}
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void
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int32
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arch_int_assign_to_cpu(int32 irq, int32 cpu)
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{
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// SMP not yet supported
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// Not yet supported.
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return 0;
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}
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@ -50,7 +50,9 @@ arch_int_disable_io_interrupt(int irq)
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}
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void
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int32
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arch_int_assign_to_cpu(int32 irq, int32 cpu)
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{
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// Not yet supported.
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return 0;
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}
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@ -424,7 +424,7 @@ arch_int_are_interrupts_enabled(void)
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}
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void
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int32
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arch_int_assign_to_cpu(int32 irq, int32 cpu)
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{
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switch (sVectorSources[irq]) {
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@ -440,6 +440,7 @@ arch_int_assign_to_cpu(int32 irq, int32 cpu)
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default:
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break;
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}
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return cpu;
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}
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@ -468,7 +468,7 @@ install_io_interrupt_handler(long vector, interrupt_handler handler, void *data,
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&& sVectors[vector].assigned_cpu->cpu == -1) {
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int32 cpuID = assign_cpu();
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arch_int_assign_to_cpu(vector, cpuID);
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cpuID = arch_int_assign_to_cpu(vector, cpuID);
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sVectors[vector].assigned_cpu->cpu = cpuID;
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cpu_ent* cpu = &gCPU[cpuID];
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@ -743,10 +743,9 @@ void assign_io_interrupt_to_cpu(long vector, int32 newCPU)
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list_remove_item(&cpu->irqs, sVectors[vector].assigned_cpu);
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locker.Unlock();
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newCPU = arch_int_assign_to_cpu(vector, newCPU);
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sVectors[vector].assigned_cpu->cpu = newCPU;
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cpu = &gCPU[newCPU];
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locker.SetTo(cpu->irqs_lock, false);
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sVectors[vector].assigned_cpu->cpu = newCPU;
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arch_int_assign_to_cpu(vector, newCPU);
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list_add_item(&cpu->irqs, sVectors[vector].assigned_cpu);
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}
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