device is not compatible, after all.
* No longer accept color changes if the mode is not an 8 bit one. I think that
BWindowScreen does that after changing the mode, so that is messes up the
colors, at least that's the theory, will test on real iron now.
* Use VGA as a fallback if setting the palette via VBE failed. This brings back
the colors for ParticlesII in Qemu (but not in VirtualBox, which seems to be
completely broken in this regard).
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@32359 a95241bf-73f2-0310-859d-f6bbb57e9c96
* The vesa driver no longer uses VGA programming if the chip does not support
VGA compatibility.
* The VESA driver now tries to set the DAC to 8 bits per color gun.
* In VESA modes, the driver no longer tries to use VGA programming; introduced
the new vesa_set_indexed_colors() that is now used for palette programming.
This should fix wrong colors of 8 bit BWindowScreen users with VESA on real
hardware (emulators usually didn't mind either way).
* Note that the app_server needs to maintain a palette per 8 bit screen, as
right now, the colors are garbled after a workspace switch. Stefano, are you
looking into that already?
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@32347 a95241bf-73f2-0310-859d-f6bbb57e9c96
be broken in the app_server now, but I haven't checked yet.
* Fixed typo in vesa.h.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@32141 a95241bf-73f2-0310-859d-f6bbb57e9c96
mode informations are available.
* This is passed to the graphics card when the mode is set in the hopes that it
will be more conforming.
* Not yet tested on real hardware, though, therefore the VESA driver doesn't
do anything like this yet. I will test next, but please report any problems
with this nonetheless.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@28390 a95241bf-73f2-0310-859d-f6bbb57e9c96
* The hardware cursor is now disabled at 640x480 with a Virge VX (before it
was just invisible).
* EDID info can now be read for all S3 chips.
* For the Savage IX, Savage MX, and SuperSavage chips the display is no
longer expanded to fill a laptop LCD display when the mode resolution is
less than the size of LCD display.
* Savage IX, Savage MX, and SuperSavage chips will now display mode
1400x1050 on a 1400x1050 laptop LCD display. Previously the display was
blank at that resolution.
* Previously about half the Savage chips would not draw properly at
1400x1050. That is, the image was badly skewed and unusable. All of
them now draw properly at 1400x1050.
* Some code was reorganized to remove unnecessary and redundant code.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@27863 a95241bf-73f2-0310-859d-f6bbb57e9c96
be put into a boot_item in frame_buffer_console_init().
* The VESA driver now supports gettings the EDID information as well; this
is necessary now, since the app_server no longer takes over the mode the
boot loader had chosen.
* Note, we might want to do this via vm86 instead in the future, and remove
the kernel part again.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@25786 a95241bf-73f2-0310-859d-f6bbb57e9c96
* Use vm86 mode to call the VESA BIOS to do the actual mode switching by
providing an ioctl in the vesa driver.
* Fix vm86.h.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@25680 a95241bf-73f2-0310-859d-f6bbb57e9c96
Gerald Zajac. Thanks a lot!
* Also put it on the image by default.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@25583 a95241bf-73f2-0310-859d-f6bbb57e9c96
we now always only use the primary ring buffer.
* Removed secondary ring buffer allocation and member fields.
* Increased size of the primary ring buffer to 65536 bytes.
* The bytes per row register is computed differently for 9xx chips.
* On G33, the overlay does not need a physical address anymore, so we
don't pass B_APERTURE_NEED_PHYSICAL to the allocation anymore for that
device.
* intel_free_memory() accidently added the aperture base to the allocation
and would therefore never free any memory.
* INTEL_RING_BUFFER_SIZE_MASK was shifted one bit to the right, didn't
cause any harm with our buffer sizes, yet, though.
* With these changes, the driver runs stable on a G33 chipset (I have not
yet tested the hardware cursor, though, it might need some work, too).
The only known issue left is that overlay flickers a bit if its buffer
is partially backed up by reserved and allocated memory.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@23798 a95241bf-73f2-0310-859d-f6bbb57e9c96
* Removed "physical" parameter of GART's bind_aperture() - I don't think this
be of use to anyone.
* Fixed binding/unbinding pages in the Intel GART driver; I accidently shifted
the page offset twice.
* Actually forgot handling of allocated memory in Aperture::BindMemory().
* Minor cleanup.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@23796 a95241bf-73f2-0310-859d-f6bbb57e9c96
* Now uses the AGP GART module for memory management. This greatly simplifies
the memory handling, and memory is now actually allocated on demand,
instead of a fixed size (stolen memory is not freed, though).
* The Intel GART module should now also work with older chipsets.
* No longer remove the GTT size from the stolen memory; this appears to have
been a mistake in the X driver. Not sure about the BIOS popup yet.
* The AGP module (in combination with the Intel GART module) is now mandatory
to use the Intel driver.
* Removed now superfluous settings (like memory size). Only enabling/disabling
the hardware cursor is still supported.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@23781 a95241bf-73f2-0310-859d-f6bbb57e9c96
* It now also serves as a generic GART manager and accepts bus modules as well
as custom modules of graphics drivers if they want to (could be used for the
Radeon PCI GART stuff, for example).
* Implemented GART support module for Intel i965 and G33 chipsets (the other
Intel chips will come later).
* Renamed agp bus manager to agp_gart to reflect its new functionality (even
though the AGP functionality is already outdated (due to PCIe), the GART
stuff remains current).
* Adapted existing users of the AGP bus manager to the API changes.
* Not very well tested yet...
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@23754 a95241bf-73f2-0310-859d-f6bbb57e9c96
* Added some defines needed when playing with the bridge controller.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@23753 a95241bf-73f2-0310-859d-f6bbb57e9c96
* set_gtt_entry() used the wrong index to fill the GTT - this could have never
worked correctly when you specified more memory than the amount of stolen
memory.
* Implementing maintaining resources for emulating overlay using the 3D engine
on i965. I don't yet commit the actual overlay code, as that is a) ugly, and
b) does not work yet.
* Moved AreaKeeper into its own header.
* Minor cleanup.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@23709 a95241bf-73f2-0310-859d-f6bbb57e9c96
* Implemented mapping the GTT area for i9xx chips other than the i965. This should also fix the
driver working with these chips at all.
* The memory used by the driver now take the GTT area into account - before the GTT could be
overwritten theoretically...
* Added fix for some i965 quirks from the X driver.
* Added some overlay definitions for the i965.
* Started support for G33 overlay (not complete yet).
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@23220 a95241bf-73f2-0310-859d-f6bbb57e9c96
- in order to set cursor position SVGA_CURSOR_ON_SHOW has to be written to register SVGA_REG_CURSOR_ON.
- do not use alpha cursor because it does not support inverting of source pixels.
- Fixed wrong usage of if-statement inside switch-statement
- Sync at end of SCREEN_TO_SCREEN_BLIT so that app_server does not write to frame buffer while accelerated operation is still running.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@23193 a95241bf-73f2-0310-859d-f6bbb57e9c96
* Implemented MakeSpace() (not yet tested).
* Changed intel_wait_engine_idle() to spin() between reads and to timeout
after 1 second of waiting (could probably be done way earlier).
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@23120 a95241bf-73f2-0310-859d-f6bbb57e9c96
acceleration works fine, but overlay doesn't - that's next on my list.
Turns out the i965 differentiates between RGB-32 and RGB-32-alpha, and
didn't like trying to use the latter as display mode (the i865 didn't
care at all)... finding that took me *way* too long, though.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@22780 a95241bf-73f2-0310-859d-f6bbb57e9c96
will happen on earlier i9xx chips for now...). Not yet tested.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@22589 a95241bf-73f2-0310-859d-f6bbb57e9c96
* Now supports the new B_GET_EDID_INFO hook under Haiku.
* Fixed build under BeOS.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@22551 a95241bf-73f2-0310-859d-f6bbb57e9c96
to create their mode list. Once it's done, it should cover all possible cases,
and allow the base mode list to reside in the app_server (under Haiku, at least),
so that all drivers will benefit from an updated list.
Right now, it might already work to a degree, but it's not yet tested.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@22517 a95241bf-73f2-0310-859d-f6bbb57e9c96
not take the VCO limits into account; both could (and would during testing) create invalid
frequencies.
* Also reverted the order in which the PLL divisors are traversed to match the order of what
is used in the X driver to create comparable output (our error computation is based on float,
though, and should therefore create more accurate values).
* The i965 introduced a special register for the surface; the former display base register
is now only used for the view offset. Instead of setting the base manually here and there,
there is now a set_frame_buffer_base() function.
* The DPMS code will now also turn off/on the PLL clock generator.
* The code needs some more cleanup, and while the driver now produces the correct timing on
my i965 system, I'm now greeted by a black screen after startup.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@22289 a95241bf-73f2-0310-859d-f6bbb57e9c96
