The intel_extreme driver now finally works with the i965 chipset;
acceleration works fine, but overlay doesn't - that's next on my list. Turns out the i965 differentiates between RGB-32 and RGB-32-alpha, and didn't like trying to use the latter as display mode (the i865 didn't care at all)... finding that took me *way* too long, though. git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@22780 a95241bf-73f2-0310-859d-f6bbb57e9c96
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@ -204,7 +204,7 @@ struct intel_free_graphics_memory {
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#define DISPLAY_CONTROL_CMAP8 (2UL << 26)
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#define DISPLAY_CONTROL_RGB15 (4UL << 26)
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#define DISPLAY_CONTROL_RGB16 (5UL << 26)
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#define DISPLAY_CONTROL_RGB32 (7UL << 26)
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#define DISPLAY_CONTROL_RGB32 (6UL << 26)
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#define INTEL_VGA_DISPLAY_CONTROL 0x71400
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#define VGA_DISPLAY_DISABLED (1UL << 31)
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@ -483,12 +483,7 @@ if (first) {
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write32(INTEL_DISPLAY_A_PLL, pll);
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read32(INTEL_DISPLAY_A_PLL);
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spin(150);
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#if 0
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write32(INTEL_DISPLAY_A_PLL, DISPLAY_PLL_ENABLED | DISPLAY_PLL_2X_CLOCK
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| DISPLAY_PLL_NO_VGA_CONTROL | DISPLAY_PLL_DIVIDE_4X
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| (((divisors.post1 - 2) << DISPLAY_PLL_POST1_DIVISOR_SHIFT) & DISPLAY_PLL_POST1_DIVISOR_MASK)
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| (divisorRegister == INTEL_DISPLAY_A_PLL_DIVISOR_1 ? DISPLAY_PLL_DIVISOR_1 : 0));
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#endif
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// update timing parameters
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write32(INTEL_DISPLAY_A_HTOTAL, ((uint32)(target.timing.h_total - 1) << 16)
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| ((uint32)target.timing.h_display - 1));
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@ -513,6 +508,9 @@ if (first) {
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| ((target.timing.flags & B_POSITIVE_VSYNC) != 0 ? DISPLAY_MONITOR_POSITIVE_VSYNC : 0));
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}
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// TODO: verify the two comments below: the X driver doesn't seem to
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// care about both of them!
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// These two have to be set for display B, too - this obviously means
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// that the second head always must adopt the color space of the first
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// head.
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@ -650,6 +648,8 @@ intel_get_display_mode(display_mode *_currentMode)
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status_t
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intel_get_edid_info(void* info, size_t size, uint32* _version)
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{
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TRACE(("intel_get_edid_info()\n"));
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if (!gInfo->has_edid)
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return B_ERROR;
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if (size < sizeof(struct edid1_info))
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