backend.
The VME2chip can use this to translate a VMEbus irq to a cpu irq.
The VMEchip (on mvme147) can't deal with the VMEbus irq and cpu irq
being different so we just panic in that case for now.
respond in the allotted time if they're told to TALK immediately after
completing a LISTEN command. Experimentation with adb_op_sync() yielded
consistent results when the timeout was increased from the documented
6900 usec to 8000 usec, so we'll make that change here.
(Accurate and complete documentation of the hardware sure would help...)
and a front-end driver for the Ether3. Only semantic change is to remove
ea_claimirq() and ea_releaseirq() on the grounds that the seem too spurious
to warrant a callback to the front-end.
in the MIPS prom loader we have to be very careful how the sections are
ordered and the number of sections defined. For this reason the standard
linker scripts cannot be used.
The exact rules don't appear to be documented and a little experimentation
is required.
and alpha ports.
Uses PROM standalone I/O functions but due to the lack of a lseek function
it currently only works with version 5.40 of the firmware. A more portable
solution is being worked on.
installboot utility requires several changes in order to correctly install
the bootstrap code - there is a "volume directory" which contains a list
of filenames, start sectors and length. We need to add a "boot" entry of
the correct length starting at block 2. The boot file has to be ecoff
which means we waste another 0.5k
Normally the Mips filesystem has a ~500k partition for this purpose but it
should be possible to squeeze it all into the first 7k "BSD Style" (1k is
required for 2 different copies of the partition table)
Only the bootxx_ffs first stage bootstrap has been tested via bootp() which
loads the second stage off disk and then boots the kernel.
in syscall() anymore. By defition, processor was in SR_INT_IE turn
on prior to have syscall exception. MIPS1 assembler hook arranges
to enable the bit for its own. MIPS3 does the same effect by
turning off EXL bit.
fact the direct mapped cache makes address alias effect.
- Just turn on processor master interrupt mask IEc (SR_INT_IE) bit prior
to call syscall() kernel entry point. IEp is always 1 in this case
by defition.
and data cache sizes). R4000 uses 2^(12+IC) and 2^(12+DC). IDT32364
uses 2^(9+IC) and 2^(9+DC).
abstract around the problem by making the base a parameter to the
MIPS3_CONFIG_CACHE_SIZE macro. we pass the base down from mips_vector_init
to mips3_vector_init and to mips3_ConfigCache (where it is used).
XXX: someone with an MIPS3_4100 should switch to this and get rid
of the ugly ifdefs in cpuregs.h
- Don't fall into infinite loop even if the # of iteration necessary isn't 1.
- Don't interpret lower 8bit of AL, which is # of iteration, as a descriptor.
w/ Chuq Silvers. Fixes a panic when a program with wired pages that
has run for a long time when the system is under heavy memory load
exits (specific case was ntpd, reported by Simon Burge).
routine. Works similarly fto pmap_prefer(), but allows callers
to specify a minimum power-of-two alignment of the region.
How we ever got along without this for so long is beyond me.
a whole 0.01us in lmbench lat_syscall null on our 250Mhz QED system.
$at is still saved just to be safe, although it looks like it does
not need to be. $v1 is used in syscall(), although I'm not sure why.
process's segtab, retiring 'pcb_segtab' field from 'struct pcb'.
This would be another MULTIPROCESSOR unfriendly and the necessity
might be eliminated when the way to hold PTE is redesigned.
The bootloader has been improved by Kazuma Arino.
- dialog style main window
- support to read compressed kernel image
- automatic boot with timer
- human readable configrarion file
version no gets '1.15.00 2000.08.29'
all of physical memory, i.e. it conceptually is pv_table[0..avail_end].
The previous version could lead to an off-by-one error in the page allocation
for pv_table[] in some memory configurations.
it look at casual inspection like 1 nop is needed but play other tricks.
Still have reduced by 1 nop. Hopefully this covers the NEC 41[x]1. Could
not find info for those processors.
and large page support. This version is a bit more intelligent about
how it deals with kernel text pages.
Now that this is fixed, don't map the kernel text read-write if
DDB is configured.
Currently, the major onboard devices are supported (disk, network,
rs232 and VMEbus). However, work is still need to support the remaining
devices (eg. IndustryPack sites).
These boards are available with a dazzling array of build options. At
this time, the following options are *required*:
o Real floating point hardware (the 68LC040 model isn't tested),
o The VMEchip2 must be present,
o If offboard VMEbus RAM is not present, at least 8MB of onboard
RAM is required.
o Even if offboard VMEbus RAM *is* present, at least 4MB of onboard
RAM is required. (Boards with 1 or 2MB onboard RAM *can* be
supported with offboard RAM, but not without some funky values in
the VMEbus Master mapping registers.)
There is no support for boards other than those in the -LX 200/300 series.
Give rest of clock interrupt code a revamp. Because we are using an external
cycle counter we can now handle loosing several hundred interrupts without
the time slipping.
- Return FALSE if the PTE does not have PG_V set (previously, you would
get always get true of the PDE was valid, even if the PTE was not).
- Teach it about 4MB pages.
* For MIPS RISC/os based diskl labels create partition 8 which is used
by sash (and where bootstrap code hides).
* If existing MIPS RISC/os label is present update disk parameter information
issueing a 'DIOCGPART' at every read. Avoid re-reading the label at
every format-verify (or read/write on the block-device) by fetching the label
at open-time and caching it until we close.
- dialog style main window
- support to read compressed kernel image
- automatic boot with timer
- human readable configrarion file
version no gets '1.15.00 2000.08.29'
If the machine uses a Z85230 ESCC device with deep buffers, we observe
output glitches when printing the zstty{0,1} probe lines when the device
is reset & reprogrammed during startup.
There is no easy 'hook' in the MI Z8530 driver, so we wait for output
buffer to drain before changing the baud rate generator prescaler value.
consistant with other ports.
Prevent uninitialized time from being written back to the RTC (1-Jan-1970)
if the machine is halted from the root device name prompt
(bootflags & RB_ASKNAME)
If the DMA chaning interrupt couldn't be serviced immediately (higher spl
level when kernel doing something else) a few microseconds later the NCR
controller will fill its FIFO and also interrupt the CPU.
The SCSI interrupt sees the terminal count has been reached, calls
asc_dma_intr to finish the job off. The FIFO cannot be flushed because
the block count hasn't been setup for the last dma segment (DMA chaining
still wasn't serviced).
Since the NCR 53c94 FIFO is only 16 bytes in size, any short DMA in this
size combined with the machine 'doing something else' causes the problem
to occur.
Servicing the DMA chaining interrupt before the NCR SCSI interrupt solves
this problem.
Add tests to ensure the DMA FIFO has been flushed correctly at the end of
each DMA operation just to be on the safe side.
never got the wired bit set. This caused panics if a swapped out process
was swapped in again and the kernel stack had not yet been unmapped.
While here, add a forgotten lock initializer.
locked, cpu_exit needs to do that too. Since in the lock debug case we
have to use a CALLS which wipes out R0-R6, change the convention for Swtch
so that the proc is passed in R6 and that R6 is clobbered. This is so
Swtch itself doesn't have to save/restore the proc pointer explicitly.
the stack, and remove the no-longer-necessary PHOLD()/PRELE() calls
in fdformat().
(This eliminates 1/3 of the instances of PHOLD()/PRELE() in the kernel code.)
XXX We still have too many mostly-redundant floppy drivers.
