(Hopefully) fix clock skew on machines that us %tick for the clock (UIIi).
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eeh
parent
f23bd81c97
commit
cc7f95986b
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@ -1,4 +1,4 @@
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/* $NetBSD: clock.c,v 1.30 2000/09/09 23:29:06 eeh Exp $ */
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/* $NetBSD: clock.c,v 1.31 2000/09/11 23:29:31 eeh Exp $ */
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/*
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* Copyright (c) 1992, 1993
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@ -693,15 +693,15 @@ tickintr(cap)
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extern int rom_console_input;
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#endif
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hardclock((struct clockframe *)cap);
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if (poll_console)
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setsoftint();
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s = splhigh();
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/* Reset the interrupt */
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next_tick(tick_increment);
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splx(s);
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hardclock((struct clockframe *)cap);
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if (poll_console)
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setsoftint();
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return (1);
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: locore.s,v 1.95 2000/08/31 20:14:55 eeh Exp $ */
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/* $NetBSD: locore.s,v 1.96 2000/09/11 23:29:31 eeh Exp $ */
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/*
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* Copyright (c) 1996-1999 Eduardo Horvath
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* Copyright (c) 1996 Paul Kranenburg
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@ -70,7 +70,7 @@
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#define PMAP_PHYS_PAGE /* Use phys ASIs for pmap copy/zero */
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#define DCACHE_BUG /* Flush D$ around ASI_PHYS accesses */
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#undef NO_TSB /* Don't use TSB */
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#undef TICK_IS_TIME /* Keep %tick synchronized with time */
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#define TICK_IS_TIME /* Keep %tick synchronized with time */
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#undef SCHED_DEBUG
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#include "opt_ddb.h"
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@ -4224,14 +4224,6 @@ _C_LABEL(sparc_interrupt):
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set _C_LABEL(intrlev), %g3
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wr %g0, 1, CLEAR_SOFTINT
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DLFLUSH(%g3, %g2)
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#ifndef TICK_IS_TIME
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rd TICK_CMPR, %g2
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rd %tick, %g5
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srax %g2, 1, %g2
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cmp %g2, %g5
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tg %xcc, 1
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wrpr %g0, 0, %tick ! Reset %tick so we'll get another interrupt
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#endif
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ba,pt %icc, setup_sparcintr
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LDPTR [%g3 + PTRSZ], %g5 ! intrlev[1] is reserved for %tick intr.
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0:
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@ -5317,6 +5309,7 @@ print_dtlb:
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.align 8
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dostart:
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wrpr %g0, 0, %tick ! XXXXXXX clear %tick register for now
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wr %g0, TICK_CMPR ! XXXXXXX clear %tick_cmpr as well
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/*
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* Startup.
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*
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@ -5540,7 +5533,7 @@ _C_LABEL(cpu_initialize):
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or %l4, 0xfff, %l4 ! We can just load this in 12 (of 13) bits
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andn %l1, %l4, %l1 ! Mask the phys page number
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andn %o1, %l4, %o1 ! Mask the phys page number
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andn %g1, %l4, %g1 ! Mask the phys page number
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or %l2, %l1, %l1 ! Now take care of the high bits
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or %l2, %g1, %g1 ! Now take care of the high bits
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@ -9357,12 +9350,12 @@ ENTRY(pseg_get)
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/*
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* In 32-bit mode:
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*
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* extern void pseg_set(struct pmap* %o0, vaddr_t addr %o1, int64_t tte %o2:%o3,
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* extern int pseg_set(struct pmap* %o0, vaddr_t addr %o1, int64_t tte %o2:%o3,
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* paddr_t spare %o4:%o5);
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*
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* In 64-bit mode:
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*
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* extern void pseg_set(struct pmap* %o0, vaddr_t addr %o1, int64_t tte %o2,
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* extern int pseg_set(struct pmap* %o0, vaddr_t addr %o1, int64_t tte %o2,
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* paddr_t spare %o3);
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*
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* Set a pseg entry to a particular TTE value. Returns 0 on success, 1 if it needs to fill
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@ -11133,34 +11126,57 @@ tlimit:
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.xword 0
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.text
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ENTRY(next_tick)
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#ifndef TICK_IS_TIME
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/*
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* Synchronizing %tick with time is hard. Just reset it to zero.
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* This entire %tick thing will break on an MPU.
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*/
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wr %o0, TICK_CMPR ! Make sure we enable the interrupt
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retl
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wrpr %g0, 0, %tick ! Reset the clock
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#else
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sethi %hi(tlimit), %o1
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ldx [%o1 + %lo(tlimit)], %o2
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add %o2, %o0, %o2
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rd TICK_CMPR, %o2
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rdpr %tick, %o1
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mov 1, %o2
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sllx %o2, 63, %o2
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andn %o1, %o2, %o3 ! Mask off the NPT bit
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add %o3, %o0, %o3 ! Add increment
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brlez,pn %o3, 1f ! Overflow?
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mov 1, %o3 ! Mask off high bits of these registers
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sllx %o3, 63, %o3
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andn %o1, %o3, %o1
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andn %o2, %o3, %o2
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cmp %o1, %o2 ! Did we wrap? (tick < tick_cmpr)
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bgt,pt %icc, 1f
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add %o1, 1000, %o1 ! Need some slack so we don't lose intrs.
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/*
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* Handle the unlikely case of %tick wrapping.
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*
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* This should only happen every 10 years or more.
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*
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* We need to increment the time base by the size of %tick in
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* microseconds. This will require some divides and multiplies
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* which can take time. So we re-read %tick.
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*
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*/
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/* XXXXX NOT IMPLEMENTED */
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1:
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add %o2, %o0, %o2
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andn %o2, %o3, %o4
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brlz,pn %o4, Ltick_ovflw
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cmp %o2, %o1 ! Has this tick passed?
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blt,pn %xcc, 1b ! Yes
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nop
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retl
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wr %o3, TICK_CMPR
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1:
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wrpr %g0, %tick ! XXXXX Reset %tick on overflow
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wr %o2, TICK_CMPR
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Ltick_ovflw:
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/*
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* When we get here tick_cmpr has wrapped, but we don't know if %tick
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* has wrapped. If bit 62 is set then we have not wrapped and we can
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* use the current value of %o4 as %tick. Otherwise we need to return
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* to our loop with %o4 as %tick_cmpr (%o2).
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*/
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srlx %o3, 1, %o5
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btst %o5, %o1
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bz,pn %xcc, 1b
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mov %o4, %o2
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retl
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wr %o0, TICK_CMPR
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#endif
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wr %o2, TICK_CMPR
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ENTRY(setjmp)
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save %sp, -CC64FSZ, %sp ! Need a frame to return to.
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