Note on multi-architecture kernels: most architecture dependent traps are
forked off directly by having a separate trap table for each (sun4,sun4c,sun4m)
This reduces the number of tests on `cputyp' significantly, and it's easier
on the mind. There are still some entry points that need to test `cputyp',
most notably microtime().. yuck.
Note: multi-architecture kernels use function pointers for several PMAP
entry points.
Cut down the `#if defined(SUN4*)' mess severely by using CPU_ISSUN4*
macros (see machine/param.h) wherever possible.
* cut-and-paste all the code for both r2000 (MIPS-I) and r4000 (MIPS-III)
into both the pica and pmax locore.S.
* Change the names of the small segments of vector code that are
bcopied to the machine vector locations, to avoid clashing.
Get rid of the Sprite MachXXX names for the vector code, and
use use mips_r2000_xxx and mips_r4000_xxx instead.
Update the names used in the vector-copying code and trap handlers
to match.
* Most of the rest of the pica locore.S was copied from the pmax
locore.S, and then edited to work on an r4000. The names of
functions and of manifest constants stayed the same, although
both assmbler code and constant values changed.
cut-and-paste such code into contiguous blocks protected by
#if / #endif. Much of the cache and trap-handling code
needs r3000-only register fields, on the r3000, and r4000-only
insns and registers on the r4000.
* change the pmax r2000 exception-handling code to extract a trap
code with the user/kernel bit at 0x20 rather than 0x10.
(r2000s have 4-bit execption codes, r4000s have 5-bit.)
Use the a 16 from-user-space + 16-from-kernel space jump table,
just like on the r4000 pica port.
* add NOPs to the common code where required by the r4000 pipeline
constraints.
* add _C_LABEL() macros to the r4000 locore.
Comitted to provide a snapshot for others to test, and work on a cleaner merge.
it) looks truncated. At least the return(1) is missing, which I now add as
a first stopgap. Somebody needs to find out if anything else is missing for
these boards.
* Add a MIPS-I (r3000) exception handler to the Pica locore.S.
Change the names of the masks used to extract the exception code
to the new MIPS_xxx names.
* Rename the vector code from MachException() to
mips_r4000_exception, in both locore and in the init_main()
code that copies it from locore to the exception vector locations.
* Change the locore and C code to use the new MIPS_SR_INT_IE
name for the Status register master interrupt-enable bit.
Similar changes to the pmax equivalents are in progress.
arch/pica/pica/trap.c, a generic mips trap handler
arch/pica/pica/pica_trap.c, a handler for Pica interrupts.
so that the common pmax and pica trap handling can eventually be
merged and moved to arch/mips/mips/trap.c
* Add cast to hardclock when it's used directly as an interrupt handler.
* Add a null-interrupt-establish function, to avoid int vs void lint
in pica/dev/dma.c.
* fix include in pica/include/pccons.h to work with "standard"
kernel-compile include path.
* add "MIPS_3k_" for the MIPS-I r[23]000-specific register definitions.
* add "MIPS_4k_" for the MIPS-II/III r4000-specific register definitions.
* add #defines that provide the old values for locore and user
code, so the existing code continues to compile.
Regression-tested against the old headers by grepping for #define's,
editing out the defined symbols, and preprocessing with both the previous
machConst.h headers and this version.
Some unused symbols (CPU and FPU must-be-zero constants) are no longer defined.
Pica interrupt masks are now constant expressions instead of constant
values.
TODO:
* factor out the common #defines into src/sys/arch/mips.
* Get rid of the Sprite coding-style names (MACH_xxx).
* Separate out the r3k/r4k differences from the Pica/pmax differences.
* Figure out how to have a run-time choice of r3k vs. r4k support,
instead of a compile-time choice.
bus memory and I/O space access functions/macros, to be used by
machine-independent code for more sane access to bus resources.
New functions will be added to this set, in the future, as appropriate,
but this is a good starting set. Defines:
bus_{io,mem}_{map,unmap}
bus_{io,mem}_{read,write}_{1,2,4,8}
functions, and several types to go with them.
(soon to be documented on mailing lists; eventually in section 9 manual
pages), most importantly:
(1) support interrupt pin swizzling on non-i386 systems with
PCI-PCI bridges (per PPB spec; done, but meaningless, on i386).
(2) provide pci_{io,mem}_find(), to determine what I/O or memory
space is described by a given PCI configuration space
mapping register.
(3) provide pci_intr_map(), pci_intr_string(), and
pci_intr_{,dis}establish() to manipulate and print info about
PCI interrupts.
(4) deprecate the pci_map_* functions, and provide them only
as compatibility interfaces (in pci_compat.c) which will
eventually go away, implemented as wrappers around
the functions described above.
(5) make pci functions take as an argument a machine-dependent
cookie, to allow more flexibility in implementation.
- getcontext() fills the stack_t portion of the context with an 8k size
stack, 0 flags, and below our current stack pointer. I am not sure where
to set the pointer. Thanks pk [2-2] for noticing that.
Now netscape and java work...
or for which the Pica port is an older revision of the pmax branch.
A merged version with the NetBSD/pmax revision history is in mips/mips/.
cpu_exec.c
elf.c
mem.c
process_machdep.c
* Delete pmax-specific functions and declarations from trap.c
* Delete mips-geeneric functions and declaratinos from pmax_trap.c
* Rename the function pointer used to handle hardware interrupts to
"mips_hardware_intr". Define it in trap.c. Change references elsewhere,
including machdep.c.
Verified to boot on a 5000/200.
* Add spl4() and spl5() functions from the Pica port.
* Add MachFPTrap() as an alternate entry point for MachFPInterrupt.
The r4k reports floating-point execptions as a trap, not an interrupt,
and the Pica port uses the name MachFPTrap().
* Add nops to the Mach_spl?() functions and MachFPInterrupt, as required
for the r4k port.
Commit "floppy" interrupt counter for vmstat -i.
always be eight digits.
Copy the kn02 memory-interrupt reporting function to the kn03 (5k/240)
memory-error handler, since the 3MAXPLUS seems to use the same ECC hardware
as the 3MAX.
to mips/include/asm.h.
Until all references to <machine/machAsmDefs.h> in the pmax and
pica tree are changed to use <mips/asm.h> directly, just do
#include <mips/asm.h>, for compatibility.
Update the include-idempotency preprocessor token to match.
References to machAsmDefs in vendor (sprite, 4.4bsd) headers left unchanged,
for historical accuracy.
provide r3k and r4k versions of each, and move to sys/arch/mips/include.
Note in comments where each mips-based port should provide
definitions in its own cpu.h after including this file.
opcodes from the Pica port. Per Fogelstrom claims the latter are all
supposedly MIPS-II (r6000) instructions, rather than MIPS-III (R4000),
but we haven't checked to be sure. Are LL/SC really in MIPS-II?
CVS:: ----------------------------------------------------------------------
code following the MIPS ELF abi.
* Move the kn01 interrupt handler outside of #ifdef DS5000, to support
3100-only kernels.
* Add #ifdef DS3100 around kn01_enable_intr() to allow configuring
turbochannel-only kernels.
Configuration-time support for specific models of DECstation still needs
more thought/work.
the "Fast Assembler Version of the copy loop)
- Yet another sanity check included: initialize unused receive buffers to
zero sender id; and test for sender hardware id of zero in the receiver.
Gives us better error messages in case flaky hardware causes spurious
receive interupts.
Replace header files from src/sys/arch/pmax/include/ with versions that
include equivalent files from <mips/include>.
(cvs magic copied the previous revisions, with history, to
src/sys/arch/mips/include).
with versions that include equivalent files from <mips/include>,
after merging changes from the pmax and pica ports into the
src/sys/arch/mips/include tree.
ptrace.h cdefs.h pmap.h signal.h kdbparam.h