modify these to provide a new, better-specified PCI interface
(soon to be documented on mailing lists; eventually in section 9 manual
pages), most importantly:
(1) support interrupt pin swizzling on non-i386 systems with
PCI-PCI bridges (per PPB spec; done, but meaningless, on i386).
(2) provide pci_{io,mem}_find(), to determine what I/O or memory
space is described by a given PCI configuration space
mapping register.
(3) provide pci_intr_map(), pci_intr_string(), and
pci_intr_{,dis}establish() to manipulate and print info about
PCI interrupts.
(4) deprecate the pci_map_* functions, and provide them only
as compatibility interfaces (in pci_compat.c) which will
eventually go away, implemented as wrappers around
the functions described above.
(5) make pci functions take as an argument a machine-dependent
cookie, to allow more flexibility in implementation.
This commit is contained in:
cgd
parent
360590468a
commit
da3136aba8
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@ -1,4 +1,4 @@
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# $NetBSD: files.i386,v 1.69 1996/03/25 18:44:29 perry Exp $
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# $NetBSD: files.i386,v 1.70 1996/03/27 04:01:10 cgd Exp $
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#
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# new style config file for i386 architecture
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#
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@ -64,6 +64,7 @@ file arch/i386/i386/mainbus.c mainbus
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include "../../../dev/pci/files.pci"
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file arch/i386/pci/pci_machdep.c pci
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file arch/i386/pci/pci_compat.c pci # XXX compatibility
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#
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# ISA and mixed ISA+EISA or ISA+PCI drivers
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@ -0,0 +1,128 @@
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/* $NetBSD: pci_compat.c,v 1.1 1996/03/27 04:01:13 cgd Exp $ */
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/*
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* Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
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* Copyright (c) 1994 Charles Hannum. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
|
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* modification, are permitted provided that the following conditions
|
||||
* are met:
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||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
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* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Charles Hannum.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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||||
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Compatibility functions, for use with old NetBSD/i386 PCI code.
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*
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* These should go away when all drivers are converted to the new
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* interfaces.
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*/
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <vm/vm.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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__warn_references(pci_map_int,
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"uses pci_map_int() compatibility interface");
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void *
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pci_map_int(tag, level, func, arg)
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pcitag_t tag;
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int level;
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int (*func) __P((void *));
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void *arg;
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{
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pci_intr_handle_t ih;
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pcireg_t data;
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int pin, line;
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const char *intrstr;
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void *rv;
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data = pci_conf_read(NULL, tag, PCI_INTERRUPT_REG);
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pin = PCI_INTERRUPT_PIN(data);
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line = PCI_INTERRUPT_LINE(data);
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if (pci_intr_map(NULL, tag, pin, line, &ih))
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return NULL;
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intrstr = pci_intr_string(NULL, ih);
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rv = pci_intr_establish(NULL, ih, level, func, arg);
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if (rv == NULL)
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printf("pci_map_int: failed to map interrupt\n");
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else if (intrstr != NULL)
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printf("pci_map_int: interrupting at %s\n", intrstr);
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return (rv);
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}
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__warn_references(pci_map_io,
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"uses pci_map_io() compatibility interface");
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int
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pci_map_io(tag, reg, iobasep)
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pcitag_t tag;
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int reg;
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int *iobasep;
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{
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bus_io_addr_t ioaddr;
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bus_io_size_t iosize;
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bus_io_handle_t ioh;
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if (pci_io_find(NULL, tag, reg, &ioaddr, &iosize))
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return (1);
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if (bus_io_map(NULL, ioaddr, iosize, &ioh))
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return (1);
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*iobasep = ioh;
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return 0;
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}
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__warn_references(pci_map_mem,
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"uses pci_map_mem() compatibility interface");
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int
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pci_map_mem(tag, reg, vap, pap)
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pcitag_t tag;
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int reg;
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vm_offset_t *vap, *pap;
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{
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bus_mem_addr_t memaddr;
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bus_mem_size_t memsize;
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bus_mem_handle_t memh;
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int cacheable;
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if (pci_mem_find(NULL, tag, reg, &memaddr, &memsize, &cacheable))
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return (1);
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if (bus_mem_map(NULL, memaddr, memsize, cacheable, &memh))
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return (1);
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*vap = (vm_offset_t)memh;
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*pap = memaddr;
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return 0;
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}
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@ -1,6 +1,7 @@
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/* $NetBSD: pci_machdep.c,v 1.20 1996/03/04 19:39:31 cgd Exp $ */
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/* $NetBSD: pci_machdep.c,v 1.21 1996/03/27 04:01:14 cgd Exp $ */
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/*
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* Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
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* Copyright (c) 1994 Charles Hannum. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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@ -67,8 +68,37 @@ int pci_mode = -1;
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#define PCI_MODE2_ENABLE_REG 0x0cf8
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#define PCI_MODE2_FORWARD_REG 0x0cfa
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void
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pci_attach_hook(parent, self, pba)
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struct device *parent, *self;
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struct pcibus_attach_args *pba;
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{
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if (pba->pba_bus == 0)
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printf(": configuration mode %d", pci_mode);
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}
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int
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pci_bus_maxdevs(pc, busno)
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pci_chipset_tag_t pc;
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int busno;
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{
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/*
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* Bus number is irrelevant. If Configuration Mechanism 2 is in
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* use, can only have devices 0-15 on any bus. If Configuration
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* Mechanism 1 is in use, can have devices 0-32 (i.e. the `normal'
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* range).
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*/
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if (pci_mode == 2)
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return (16);
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else
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return (32);
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}
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pcitag_t
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pci_make_tag(bus, device, function)
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pci_make_tag(pc, bus, device, function)
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pci_chipset_tag_t pc;
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int bus, device, function;
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{
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pcitag_t tag;
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@ -107,7 +137,8 @@ mode2:
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}
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pcireg_t
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pci_conf_read(tag, reg)
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pci_conf_read(pc, tag, reg)
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pci_chipset_tag_t pc;
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pcitag_t tag;
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int reg;
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{
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@ -143,7 +174,8 @@ mode2:
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}
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void
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pci_conf_write(tag, reg, data)
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pci_conf_write(pc, tag, reg, data)
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pci_chipset_tag_t pc;
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pcitag_t tag;
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int reg;
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pcireg_t data;
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@ -221,137 +253,22 @@ not1:
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}
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int
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pci_map_io(tag, reg, iobasep)
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pcitag_t tag;
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int reg;
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int *iobasep;
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{
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pcireg_t address;
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int iobase;
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if (reg < PCI_MAPREG_START || reg >= PCI_MAPREG_END || (reg & 3))
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panic("pci_map_io: bad request");
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address = pci_conf_read(tag, reg);
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if (PCI_MAPREG_TYPE(address) != PCI_MAPREG_TYPE_IO)
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panic("pci_map_io: not an I/O mapping register");
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iobase = PCI_MAPREG_IO_ADDR(address);
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*iobasep = iobase;
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return 0;
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}
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int
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pci_map_mem(tag, reg, vap, pap)
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pcitag_t tag;
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int reg;
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vm_offset_t *vap, *pap;
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{
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pcireg_t address, mask;
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int cachable;
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vm_size_t size;
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vm_offset_t va, pa;
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if (reg < PCI_MAPREG_START || reg >= PCI_MAPREG_END || (reg & 3))
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panic("pci_map_mem: bad request");
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/*
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* Section 6.2.5.1, `Address Maps', tells us that:
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*
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* 1) The builtin software should have already mapped the device in a
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* reasonable way.
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*
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* 2) A device which wants 2^n bytes of memory will hardwire the bottom
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* n bits of the address to 0. As recommended, we write all 1s and see
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* what we get back.
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*/
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address = pci_conf_read(tag, reg);
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pci_conf_write(tag, reg, 0xffffffff);
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mask = pci_conf_read(tag, reg);
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pci_conf_write(tag, reg, address);
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if (PCI_MAPREG_TYPE(address) == PCI_MAPREG_TYPE_IO)
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panic("pci_map_mem: I/O mapping register");
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switch (address & PCI_MAPREG_MEM_TYPE_MASK) {
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case PCI_MAPREG_MEM_TYPE_32BIT:
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case PCI_MAPREG_MEM_TYPE_32BIT_1M:
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break;
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case PCI_MAPREG_MEM_TYPE_64BIT:
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printf("pci_map_mem: 64-bit memory mapping register\n");
|
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return EOPNOTSUPP;
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default:
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printf("pci_map_mem: reserved mapping register type\n");
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return EINVAL;
|
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}
|
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|
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pa = PCI_MAPREG_MEM_ADDR(address);
|
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size = ~PCI_MAPREG_MEM_ADDR(mask) + 1;
|
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if (size < NBPG)
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size = NBPG;
|
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va = kmem_alloc_pageable(kernel_map, size);
|
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if (va == 0) {
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printf("pci_map_mem: not enough memory\n");
|
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return ENOMEM;
|
||||
}
|
||||
|
||||
/*
|
||||
* Tell the driver where we mapped it.
|
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*
|
||||
* If the region is smaller than one page, adjust the virtual address
|
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* to the same page offset as the physical address.
|
||||
*/
|
||||
*vap = va + (pa & PGOFSET);
|
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*pap = pa;
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||||
|
||||
#if 1
|
||||
printf("pci_map_mem: mapping memory at virtual %08x, physical %08x\n", *vap, *pap);
|
||||
#endif
|
||||
|
||||
/* Map the space into the kernel page table. */
|
||||
cachable = PCI_MAPREG_MEM_CACHEABLE(address);
|
||||
pa &= ~PGOFSET;
|
||||
while (size) {
|
||||
pmap_enter(pmap_kernel(), va, pa, VM_PROT_READ | VM_PROT_WRITE,
|
||||
TRUE);
|
||||
if (!cachable)
|
||||
pmap_changebit(pa, PG_N, ~0);
|
||||
else
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pmap_changebit(pa, 0, ~PG_N);
|
||||
va += NBPG;
|
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pa += NBPG;
|
||||
size -= NBPG;
|
||||
}
|
||||
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||||
return 0;
|
||||
}
|
||||
|
||||
void *
|
||||
pci_map_int(tag, level, func, arg)
|
||||
pcitag_t tag;
|
||||
int level;
|
||||
int (*func) __P((void *));
|
||||
void *arg;
|
||||
{
|
||||
pcireg_t data;
|
||||
pci_intr_map(pc, intrtag, pin, line, ihp)
|
||||
pci_chipset_tag_t pc;
|
||||
pcitag_t intrtag;
|
||||
int pin, line;
|
||||
pci_intr_handle_t *ihp;
|
||||
{
|
||||
|
||||
data = pci_conf_read(tag, PCI_INTERRUPT_REG);
|
||||
|
||||
pin = PCI_INTERRUPT_PIN(data);
|
||||
line = PCI_INTERRUPT_LINE(data);
|
||||
|
||||
#define BAD { *ihp = -1; return 1; }
|
||||
if (pin == 0) {
|
||||
/* No IRQ used. */
|
||||
return 0;
|
||||
BAD;
|
||||
}
|
||||
|
||||
if (pin > 4) {
|
||||
printf("pci_map_int: bad interrupt pin %d\n", pin);
|
||||
return NULL;
|
||||
printf("pci_intr_map: bad interrupt pin %d\n", pin);
|
||||
BAD;
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -369,22 +286,58 @@ pci_map_int(tag, level, func, arg)
|
|||
* the BIOS has not configured the device.
|
||||
*/
|
||||
if (line == 0 || line == 255) {
|
||||
printf("pci_map_int: no mapping for pin %c\n", '@' + pin);
|
||||
return NULL;
|
||||
printf("pci_intr_map: no mapping for pin %c\n", '@' + pin);
|
||||
BAD;
|
||||
} else {
|
||||
if (line >= ICU_LEN) {
|
||||
printf("pci_map_int: bad interrupt line %d\n", line);
|
||||
return NULL;
|
||||
printf("pci_intr_map: bad interrupt line %d\n", line);
|
||||
BAD;
|
||||
}
|
||||
if (line == 2) {
|
||||
printf("pci_map_int: changed line 2 to line 9\n");
|
||||
printf("pci_intr_map: changed line 2 to line 9\n");
|
||||
line = 9;
|
||||
}
|
||||
}
|
||||
|
||||
#if 1
|
||||
printf("pci_map_int: pin %c mapped to line %d\n", '@' + pin, line);
|
||||
#endif
|
||||
|
||||
return isa_intr_establish(line, IST_LEVEL, level, func, arg);
|
||||
*ihp = line;
|
||||
return 0;
|
||||
#undef BAD
|
||||
}
|
||||
|
||||
const char *
|
||||
pci_intr_string(pc, ih)
|
||||
pci_chipset_tag_t pc;
|
||||
pci_intr_handle_t ih;
|
||||
{
|
||||
static char irqstr[8]; /* 4 + 2 + NULL + sanity */
|
||||
|
||||
if (ih == 0 || ih >= ICU_LEN || ih == 2)
|
||||
panic("pci_intr_string: bogus handle 0x%x\n", ih);
|
||||
|
||||
sprintf(irqstr, "irq %d", ih);
|
||||
return (irqstr);
|
||||
|
||||
}
|
||||
|
||||
void *
|
||||
pci_intr_establish(pc, ih, level, func, arg)
|
||||
pci_chipset_tag_t pc;
|
||||
pci_intr_handle_t ih;
|
||||
int level, (*func) __P((void *));
|
||||
void *arg;
|
||||
{
|
||||
|
||||
if (ih == 0 || ih >= ICU_LEN || ih == 2)
|
||||
panic("pci_intr_establish: bogus handle 0x%x\n", ih);
|
||||
|
||||
return isa_intr_establish(ih, IST_LEVEL, level, func, arg);
|
||||
}
|
||||
|
||||
void
|
||||
pci_intr_disestablish(pc, cookie)
|
||||
pci_chipset_tag_t pc;
|
||||
void *cookie;
|
||||
{
|
||||
|
||||
return isa_intr_disestablish(cookie);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,6 +1,7 @@
|
|||
/* $NetBSD: pci_machdep.h,v 1.4 1996/03/14 02:37:59 cgd Exp $ */
|
||||
/* $NetBSD: pci_machdep.h,v 1.5 1996/03/27 04:01:16 cgd Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
|
||||
* Copyright (c) 1994 Charles Hannum. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
|
|
@ -31,54 +32,63 @@
|
|||
|
||||
/*
|
||||
* Machine-specific definitions for PCI autoconfiguration.
|
||||
*
|
||||
* See the comments in pci_machdep.c for more explanation.
|
||||
*/
|
||||
|
||||
/*
|
||||
* i386-specific PCI structure and type definitions.
|
||||
* NOT TO BE USED DIRECTLY BY MACHINE INDEPENDENT CODE.
|
||||
*
|
||||
* Configuration tag; created from a {bus,device,function} triplet by
|
||||
* pci_make_tag(), and passed to pci_conf_read() and pci_conf_write().
|
||||
* We could instead always pass the {bus,device,function} triplet to
|
||||
* the read and write routines, but this would cause extra overhead.
|
||||
*
|
||||
* Machines other than PCs are likely to use the equivalent of mode 1
|
||||
* tags always. Mode 2 is historical and deprecated by the Revision
|
||||
* 2.0 specification.
|
||||
* Mode 2 is historical and deprecated by the Revision 2.0 specification.
|
||||
*/
|
||||
typedef union {
|
||||
u_long mode1;
|
||||
union i386_pci_tag_u {
|
||||
u_int32_t mode1;
|
||||
struct {
|
||||
u_short port;
|
||||
u_char enable;
|
||||
u_char forward;
|
||||
u_int16_t port;
|
||||
u_int8_t enable;
|
||||
u_int8_t forward;
|
||||
} mode2;
|
||||
} pcitag_t;
|
||||
};
|
||||
|
||||
/*
|
||||
* Type of a value read from or written to a configuration register.
|
||||
* Always 32 bits.
|
||||
* Types provided to machine-independent PCI code
|
||||
*/
|
||||
typedef u_int32_t pcireg_t;
|
||||
typedef void *pci_chipset_tag_t;
|
||||
typedef union i386_pci_tag_u pcitag_t;
|
||||
typedef int pci_intr_handle_t;
|
||||
|
||||
/*
|
||||
* PCs which use Configuration Mechanism #2 are limited to 16
|
||||
* devices per bus.
|
||||
*/
|
||||
#define PCI_MAX_DEVICE_NUMBER (pci_mode == 2 ? 16 : 32)
|
||||
|
||||
/*
|
||||
* Hook for PCI bus attach function to do any necessary machine-specific
|
||||
* operations.
|
||||
*/
|
||||
|
||||
#define pci_md_attach_hook(parent, sc, pba) \
|
||||
do { \
|
||||
if (pba->pba_bus == 0) \
|
||||
printf(": configuration mode %d", pci_mode); \
|
||||
} while (0);
|
||||
|
||||
/*
|
||||
* Miscellaneous variables and functions.
|
||||
* i386-specific PCI variables and functions.
|
||||
* NOT TO BE USED DIRECTLY BY MACHINE INDEPENDENT CODE.
|
||||
*/
|
||||
extern int pci_mode;
|
||||
extern int pci_mode_detect __P((void));
|
||||
int pci_mode_detect __P((void));
|
||||
|
||||
/*
|
||||
* Functions provided to machine-independent PCI code.
|
||||
*/
|
||||
void pci_attach_hook __P((struct device *, struct device *,
|
||||
struct pcibus_attach_args *));
|
||||
int pci_bus_maxdevs __P((pci_chipset_tag_t, int));
|
||||
pcitag_t pci_make_tag __P((pci_chipset_tag_t, int, int, int));
|
||||
pcireg_t pci_conf_read __P((pci_chipset_tag_t, pcitag_t, int));
|
||||
void pci_conf_write __P((pci_chipset_tag_t, pcitag_t, int,
|
||||
pcireg_t));
|
||||
int pci_intr_map __P((pci_chipset_tag_t, pcitag_t, int, int,
|
||||
pci_intr_handle_t *));
|
||||
const char *pci_intr_string __P((pci_chipset_tag_t, pci_intr_handle_t));
|
||||
void *pci_intr_establish __P((pci_chipset_tag_t, pci_intr_handle_t,
|
||||
int, int (*)(void *), void *));
|
||||
void pci_intr_disestablish __P((pci_chipset_tag_t, void *));
|
||||
|
||||
/*
|
||||
* Compatibility functions, to map the old i386 PCI functions to the new ones.
|
||||
* NOT TO BE USED BY NEW CODE.
|
||||
*/
|
||||
void *pci_map_int __P((pcitag_t, int, int (*)(void *), void *));
|
||||
int pci_map_io __P((pcitag_t, int, int *));
|
||||
int pci_map_mem __P((pcitag_t, int, vm_offset_t *, vm_offset_t *));
|
||||
|
|
|
|||
Loading…
Reference in New Issue