- Add reset attribute sequences for bold, underline, and reverse
- Add insert/delete line sequences
- Recognize but ignore G0/G1 character set sequences
Performance:
- Speed up clear_line() when clearing the entire line
Also, some stylistic changes for checking/setting scroll region bounds
and in putc_getpars().
These changes make the ITE work properly with the 1.2 termcap file.
- The boundary argument to bus_space_alloc() should be a bus_size_t, not
a bus_addr_t.
- The buffer arguments in the "multiple write" methods should have
const qualifiers.
And one from me:
- Make bus_space_barrier() eat up the arguments passed to it so that
the compiler doesn't needlessly whine.
the variable `dumpsize' (used by savecore(8)) and that the CPU specific data
gets dumped first.
Also, squash a typo that prevented the crash dump to be shifted towards the
end of the swap partition. In fact, the entire dumpconf() routine has been
redone, mostly by pasting large chunks from the alpha port.
have an Apple Sound Chip. Make sure that we have configured the device
before allowing accesses to ASC memory. Among other things, this
prevents the 660AV and 840AV from getting a kernel bus error when trying
to beep on the console.
everything before the beginning of the "a" partition on a disk
is read-only except when accessed via RAW_PART. (a problem if
"a" isn't at the front of the disk). pointed out by pk back
in july.
* Only FFS is needed for the install kernel.
* Configure the console to 8N1 (that's what the pc532's rom monitor uses).
* The install kernel doesn't need to know about CDROM drives.
* Use the new mi ramdisk.
the wrong thing with standby mode (as some older ThinkPAD 701c BIOSes do, for
example.) Rename APM_NOIDLE to APM_NO_IDLE for consistency and "niceness,"
and error out (with a useful error message) if APM_NOIDLE is defined.
floppy driver.
- Fixup format types in the debug-printf's
- Don't print empty lines on unconfigured drives.
- When a drive is detected, show it's default format.
---- Warning: minor numbers are shifted! ---
instead of 0x400.
- Restructure interrupt handling for more performance--continue to
read/write data as long as the device keeps us in a data xfer phase.
There is still a lot of room for speed improvement here. Perhaps it
lies is speeding up the interrupt path in general?
naming for fmovem, while breaking it for fmove. We probably never will
see normal fmove in the kernel, nevertheless it should be corrected while
somebody remembers.
Besides, the correct patch is smaller and thus easier to verify than the
origininal one.
Added support the new instructions defined in the ARM V4 Architecture
Reference manual (long multiplies, half word load and stores,
half word/byte signed loads).
Added support for the ARM810 IMB architecture defined SWIs.
Fixed bug in calculating some immediate constants.
Added support for the wfs, rfs, wfc, rfc instructions
Added support for the floating point compare instructions
Added ldf, stf, ldc and stc instructions.
Fixed mis-disassembly of some msr/mrs instructions.
The ldm and stm instructions will modify the direction identifier to
use the stack variations if the base register is r13.
variant of the CG4 (the one with the AMD colormap DACs). This has
been tested only on the "Type B" H/W at this point (Brooktree DACs).
Thanks to Ezra Story and Scott Ellis for the "Type A" support.
some guesses for the machines that have two of these buggers (I don't have
such a machine). This driver is a copy of the sparc/alpha esp with a
minimum of changes--after we get it performing a bit more respectably,
we should see about re-normalizing the sources.
- add a missing return; at the end of a case, leading to wrong disassembly
of the next few instructions after fmovem.
- while we're here, correct the same bug in PBcc.
XXX there are a few other dubious fallthroughs in this file (which are
not explicitly marked with /* FALLTHROUGH */), which I didn't yet analyze.
* Fix other FMOVEM interpretation bugs:
- correct printing of FP data register lists if all are used (only FP0
would be mentioned)
- correct printing of FP data register lists in the case the list is reversed
(would have printed nothing)
- correct mapping of fp0-fp7 to register list bits (was reversed)
- correct printing of FP control register lists (this list is never reversed)
- correct printing of FMOVEM with FP control registers (the data direction
was interpreted the wrong way)
* While we're here, enhance the comments in MOVC's list of cpu control
registers
second on Sun4m machines. Although this was in the noise of the unstable
Sun clock crystals before, the discrepancy amounted to about 100 ppm, and
thus made NTP perform poorly. NTP now works happily on my SS20...
- Sync with hp300 version.
Machdep.c:
- Notify the vm-system that kernel-text is read/execute
- Notify the vm-system that page zero isn't mapped
[ Grrr.. How do you cancel a check-in when you find out too late they
should have different comments ]
comment to note that this printf still isn't quite right (possibly
because this is now a pseudodevice), and the autoconf printout when
mounting root on a ramdisk isn't right, either. This should both be
fixed.
- No more distinction between i/o-mapped and memory-mapped
devices. It's all "bus space" now, and space tags
differentiate the space with finer grain than the
bus chipset tag.
- Add memory barrier methods.
- Implement space alloc/free methods.
- Implement region read/write methods (like memcpy to/from
bus space).
This interface provides a better abstraction for dealing with
machine-independent chipset drivers.
VM_PROT_READ|VM_PROT_EXECUTE. The previous default (VM_PROT_ALL)
would cause the following scenario:
- someone attempts to write kernel text (my test was writing
to an offset of /dev/kmem which was known to be in the text
segment, while in single-user mode).
- enter trap() with MMU fault (because of RO pte).
- trap() calls vm_fault(), which looks up vm_map_entry for
fauling address.
- vm_fault interprets write fault and VM_PROT_WRITE (in VM_PROT_ALL)
as COW; new page allocated, data copied to new page, new page
mapped in at trunc_page(<faulting va>).
- wow, look at the fireworks!
Fixes two potential symptoms:
- kernacc() returns TRUE when checking for permission to write
an offset in kernel text, which is bogus, since the text has
been mapped RO by pmap_bootstrap().
- Handling of a stray pointer that attempted to scribble into
kernel text would not be executed properly.
don't do this, kernacc() will bogusly return TRUE for page 0, causing a
NULL pointer dereference in uiomove() when reading /dev/kmem.
Thanks to Scott Reynolds for noticing the problem.
Still untested on -1260/-1230, and hangs when enforcing SFAS_NO_DMA on 2060;
but works with DMA on the latter.
Still untested in a NetBSD-12A environment. (Sorry, don't have the hardware
myself.)
Thanks to Laurent Baroukh for being the guinea pig, and to Jerome Lovy
for forwarding the hardware information Phase V gave him, and to Phase
V for providing it.
- Fix up usage of MBD_ISPID(). (from Jason Thorpe)
- Be careful not to deref bad pointers in the MMU fault handler. (ditto)
- Ensure trap() never deals with a NULL proc, and if our proc has
no pcb, punt. (Suggested by Gordon Ross)
- Initialize proc0.p_addr just after setting up the kernel stack, to avoid
getting NULL pointers in trap(). Change suggested by Gordon Ross.
- Panic if main() returns.
create an assembly label, and SYSCALLNUM to convert a syscall name into
the macro that's defined to be its number. Add a CALLSYS_NOERROR macro
which invokes the named system call. (CALLSYS_NOERROR is here since
it's used in locore, for sigcode.)
* kill scc_tty[] and needs-count.
* Add usable-when-cold version of sccparam().
* Add pre-autconf() console initialization entrypoint.
* remove lint for gcc -Wall
* wbflush() -> tc_mb()
all but the last of which have been fed through cgd and committed to the
Alpha scc driver.
code as video memory must be reserved from main memory for the display.
In addition this adds generic support for using DRAM for video memory
on all machines. All video memory accessing should use the video_memory_t
structure.
Added support for the RC7500 motherboard. The RC7500 support includes a
replacement init_arm() function. This also supports the RC7500 prom debug
monitor for debugging the kernel boot.
dumps now work so call dumpsys() following a panic.
Added support for the SA110. This mainly consists of making sure the data
cache is cleaned when appropriate and that the instruction cache is
kept in sync during the bootstrap and when signal handlers are built on
the stack.
Use a larger UND32 mode stack if we are configured for KGDB.
Remove KERNEL_PT_KSTACK references as these should have died with the
removal of double mapped kstacks eons ago.
Make sure we call doshutdownhooks() if boot is called while we are still
cold.
Cleaned up prototypes declarations.
Sorted out comment indentation.
autoconfiguration. It clears the RPB's per-cpu-slot BIP flag and
sets up the RPB's restore_term and restart vectors, etc. add a
console_restart() function, which causes a panic and system dump,
that is invoked (indirectly) via those vectors.
eventually, the restart HWRPB vector), which calls console_restart. This
is invoked when the console halt switch is used and the user enters 'c'
at the console prompt, and eventually causes a system crash dump to be
generated.
clean and tlb flush code along with write buffer drains that are
dependant on the definition of CPU_SA110.
The memory reserved for the L1 pagetables is now wired into the memory map
during the pmap_init rather than at L1 pagetable allocation time.
The L1 pages tables are zeroed during initialisation and when they are
released rather than when they are allocated.
When searching for a free L1 page table start search at the page table
after the last one allocated rather than always starting from the first one.
Added some extra DIAGNOSTIC checks for invalidate page index numbers.
Removed some old debugging code that escaped the last clean up.
Idented comments in line with code.
The irq delivery code has been rewritten. On entry to the irq vector the
processor is switched to SVC32 mode so all interrupt routines now run
in SVC32 mode rather than IRQ32 mode. This fixes lots of irq re-enabling
problems.
Interrupt latency times are now vastly improved for high priority interrupts.
Cleaned up calling ast() before returning to USR32 mode (don't need to
mess about with trapframe copying.
Cleaned up all the comments and sorted out their indentation.
Rewritten the soft interrupt delivery code.
Added generic ARM7500 support rather than just RC7500 support.
Added support for the SA110. This cpu does not need any register fix-ups
following a data abort.
Return valid signal code values on SEGV's. See machine/signal.h for
decoding SEGV signal codes.
required during pagemove() and vmapbuf() and vunmapbuf().
The kernel and undefined mode stack checks are now guarded with
#ifdef STACKCHECKS.
Tidied up comments.
cache needs to be cleans and the instruction and data caches need to
be invalidate along with the instruction and data tlbs when
the TTB is reloaded during a context switch.