Commit Graph

369 Commits

Author SHA1 Message Date
jeffs
0b5e00636a Fix a bug in how .S routines call _mcount to allocate stack before
use.  By Ethan Solomita (ethan@geocast.com).
2000-08-09 22:52:36 +00:00
tshiozak
51a53de0d5 Preparation for the future introduction of multibyte locale.
- MB_LEN_MAX is increased to 32.
 - To ensure binary compatibility for old executables
   under multibyte locale, versioned setlocale is added.
 - __mb_len_cur definision is added in setlocale.c
   and enable it in stdlib.h .
   It is also important for multibyte locale stuffs,
   but I just forgot.
2000-08-08 22:31:13 +00:00
cgd
b63ed164a1 convert PRID handling to use macros on an int, not bit-fields.
there's no reason to use bit-fields, and they just complexity to
the header.
2000-07-27 17:29:05 +00:00
cgd
4adc7b9704 add nops after jals in PANIC and PRINTF. (these macros are often used in
code which has noreorder set, and they're not used with nops afterwards,
as is appropriate in that case, so put the nops in the macros.)
2000-07-27 05:01:06 +00:00
jeffs
3a90817270 Add option to apply additional mask to the SR at run-time for MIPS3 platforms.
By default this is off, and only slightly changes the code to load SR when
a temp register is available.  This can be used by the platform code to
handle slow to clear interrupts (our case) or to mask off any interrupt
any interrupt at run-time.  This can be very useful for embedded platforms
that have less than desirable interrupt properties.
2000-07-25 17:56:05 +00:00
jeffs
2ebdfcd251 Make pmap_prefer() use a global setting based on cache size
instead of assuming 64KB.   This allows best fit and will
support bigger caches.
2000-07-20 18:33:40 +00:00
jeffs
f7dacc7a8e Use spl*_noprof routines to raise and lower spl for kernel profiling.
This keeps the SR management more contained in locore, and should
be roughly the same performance as the .text size is less.  Talked
to simonb and he was ok with this change.
2000-07-18 06:25:32 +00:00
jeffs
5961b67774 if MIPS3_ENABLE_CLOCK_INTR is defined, set MIPS3_[HARD_]INT_MASK
appropriately.  This supports ports that use the internal clock.
Add 2 diag register defines that are specific to QED processors.
2000-07-17 23:35:13 +00:00
jeffs
0e0c4d24e8 Move platform db_trap callback from arch/mips into ddb as suggested by
jhawk.  This callback is used by platform code to manage things like
watchdogs that should be disabled while in ddb.  Done as a callback
for processors such as mips that support lots of different systems.
2000-07-17 19:57:49 +00:00
jeffs
116a6f8233 Pull in geocast mips ddb improvements and start bringing in kgdb support.
Add ddb support for QED opcodes, fill in enough routines so "next" usually
works, kdbpoke support for any size.  Add callback that ports can hook when
entering and leaving ddb.  This can be used for things like turning
off watchdogs while in ddb.
2000-07-17 07:04:19 +00:00
jeffs
ef9531850e Add comment that overriding the sysctl defines in machine/cpu.h
breaks userland binary compatiabiltiy between mips ports.  Move
check down so common values are always defined here.
2000-07-13 07:37:11 +00:00
jeffs
f6812b853b Only define machdep sysctls if CPU_MAXID is not defined by machine/cpu.h.
This lets mips ports have additional machdep sysctl.  Define CPUISMIPS3
for MIPS1+MIPS2 as cpu_arch >= 3 to support mips4.  Add cpu_intr()
prototype so this is defined in one place.
2000-07-11 06:34:57 +00:00
jeffs
6b28794054 Add support for 3 QED special2 opcodes. 2000-07-11 06:27:58 +00:00
jeffs
54a85cb3af For 64b clean 32b compilation, do not bother setting SX And KX.
The current code does not maintain these in SR, and they are not
needed by 32b kernel code for mips3/4 instructions.
2000-07-11 06:26:08 +00:00
uch
e8ebb2a377 use mips3 cache op.
invalidate -> write-back invalidate
(although NetBSD/hpcmips run on write-through mode.)
suggested by cgd.
2000-07-10 16:23:18 +00:00
cgd
7e975cacbe un-__P, clean up spacing a little bit, put fwd struct decl(s) near top
rather than embedded.  no functional changes.
2000-06-29 06:00:43 +00:00
kleink
bb2ed0f487 G/c _BSD_INTPTR_T_ and _BSD_UINTPTR_T_. 2000-06-27 05:53:22 +00:00
kleink
47b5c5e3b1 Resolve some formatting nits; add __intptr_t and __uintptr_t. 2000-06-27 04:58:51 +00:00
kleink
e695f72a2e Add <machine/int_types.h>, which provides namespace-pure definitions
of exact-width integer types.
2000-06-26 15:42:16 +00:00
mrg
4c698e84f6 <vm/vm_param.h> -> <uvm/uvm_param.h> 2000-06-26 14:58:58 +00:00
nisimura
074a952030 Abandon {mips1,mips3}_TBRPL()s which have little gain. They were
expected to be better than MachTLBUpdate(). After all, TLBUpdate()
is rather harmful and should be replaced with TBIS().
2000-06-26 02:55:45 +00:00
kleink
133ea38323 Add a WEAK_ALIAS() macro. 2000-06-23 12:18:45 +00:00
soda
76baab0725 3rd argument of TBRPL() is not paddr_t but PTE.
XXX - mips3_TBRPL seems to be never called.
2000-06-20 05:54:03 +00:00
soren
d78ff1cd5b Add mips3_write_config(). 2000-06-20 02:57:17 +00:00
castor
751cd4ffb0 Profiling fixes from Ethan Solomita <ethan@geocast.com>.
Merge Kernel MCOUNT and user MCOUNT.

The earlier code which was inserted to call _mcount in profiling
assembler routines is busted badly.  This gets it working with PIC
code and should work with any arbitrary assembler routine.
2000-06-12 23:42:10 +00:00
soda
2047c95e49 Decrease MIPS3_TLB_WIRED_ENTRIES from 8 to 2,
and rename it to MIPS3_TLB_WIRED_UPAGES.
The value of wired register becomes variable on arc port,
and arc is the only mips3 port which uses the wired TLB entries 2..7.
2000-06-09 06:06:57 +00:00
soda
26c2cf79c0 rename
vad_to_pfn() -> mips_paddr_to_tlbpfn()
	pfn_to_vad() -> mips_tlbpfn_to_paddr()
as suggested by thorpej on port-mips Mar 27.
2000-06-09 05:51:42 +00:00
soda
b1438dd751 make paddr_t 64bit on arc port by introducing _MIPS_PADDR_T_64BIT. 2000-06-09 04:36:43 +00:00
soda
44769378c9 this header don't have to include <machine/locore.h>,
include <mips/locore.h> instead.
2000-06-09 04:24:22 +00:00
soda
9fee25ddfa USRIOSIZE had to be changed from 32 to 128,
when MAXBSIZE was changed from 16KB to 64KB(MAXPHYS)
on <sys/param.h> revision 1.28.
2000-06-09 04:18:19 +00:00
soren
a2bda06df5 Typo. 2000-06-06 17:41:58 +00:00
soren
5e4ca4defb Rename RM5200 cache ops to mips3_*_2way in anticipation of using them
for other CPUs with 2-way set associative L1 caches as well.
2000-06-06 17:41:07 +00:00
soren
d8e5d1fa7d Add rnd(4) glue for the MIPS3 cycle counter. 2000-06-06 02:24:00 +00:00
nisimura
58d84e19a6 savefpregs() and loadfpregs() are defined in mips_machdep.c 2000-05-30 02:05:36 +00:00
thorpej
a7d0570e67 First sweep at scheduler state cleanup. Collect MI scheduler
state into global and per-CPU scheduler state:

	- Global state: sched_qs (run queues), sched_whichqs (bitmap
	  of non-empty run queues), sched_slpque (sleep queues).
	  NOTE: These may collectively move into a struct schedstate
	  at some point in the future.

	- Per-CPU state, struct schedstate_percpu: spc_runtime
	  (time process on this CPU started running), spc_flags
	  (replaces struct proc's p_schedflags), and
	  spc_curpriority (usrpri of processes on this CPU).

	- Every platform must now supply a struct cpu_info and
	  a curcpu() macro.  Simplify existing cpu_info declarations
	  where appropriate.

	- All references to per-CPU scheduler state now made through
	  curcpu().  NOTE: this will likely be adjusted in the future
	  after further changes to struct proc are made.

Tested on i386 and Alpha.  Changes are mostly mechanical, but apologies
in advance if it doesn't compile on a particular platform.
2000-05-26 21:19:19 +00:00
simonb
52e7cddaa7 Fix kernel profiling so that it actually works:
- Add 16 bytes to the stack on entry to _mcount so we don't
   overflow it.
 - Use inline interrupt {dis,en}abling instead of calling
   profiled function in locore.
2000-05-25 03:07:10 +00:00
soren
a255740671 MachForceCacheUpdate and cacheflush_bug have never been used in NetBSD,
so remove references them, and do a little other cleanup.
2000-05-23 04:21:39 +00:00
soren
abbe53961a Add R12K PRID. 2000-05-21 04:03:34 +00:00
soren
2779a53005 Include opt_cputype.h. 2000-05-21 03:23:15 +00:00
nisimura
66ecdc15d3 Remove unused PSL_USERCLR defines for processor status register. 2000-05-15 08:36:32 +00:00
nisimura
de13b44edd Have mips_locoresw[] of 3 entry pointer array for different
implementation of locore routines between MIPS1 and MIPS3.  It's
independent from mips_locore_jumpvec_t which is for cache/TLB
manipulating routines peculiar to processor designs.  mips_locore_jumpvec_t
will be replaced with "processor closures" encapsulating implementation
parameters (cpuinfo) and pointers to conventaion routines (cpuops),
eventually.
2000-05-10 01:34:13 +00:00
nisimura
0cb6da487c Remove unused mapin(pte, v, pfnum, prot) macro. 2000-05-06 05:19:32 +00:00
thorpej
855b79db92 Let each platform typedef the new __cpu_simple_lock_t, which should
be the most efficient type used for the atomic operations in the
simplelock structure, and should also be __volatile.
2000-05-02 04:41:04 +00:00
thorpej
f51470a514 Require that each each MACHINE/MACHINE_ARCH supply a lock.h. This file
contains the values __SIMPLELOCK_LOCKED and __SIMPLELOCK_UNLOCKED, which
replace the old SIMPLELOCK_LOCKED and SIMPLELOCK_UNLOCKED.  These files
are also required to supply inline functions __cpu_simple_lock(),
__cpu_simple_lock_try(), and __cpu_simple_unlock() if locking is to be
supported on that platform (i.e. if MULTIPROCESSOR is defined in the
_KERNEL case).  Change these functions to take an int * (&alp->lock_data)
rather than the struct simplelock * itself.

These changes make it possible for userland to use the locking primitives
by including <machine/lock.h>.
2000-04-29 03:31:45 +00:00
soren
2cfb26c801 Zero free pages in the idle loop. 2000-04-28 19:25:55 +00:00
soda
c56a43535d remove following symbols which became unnecessary in recent cpu_intr() change:
mips_hardware_intr
	MIPS3_INTERNAL_TIMER_INTERRUPT
	mips3_intr_cycle_count
	mips3_timer_delta
2000-04-15 22:05:51 +00:00
soren
0ce39b7430 Typo; user stack only needs to start one page below 0x80000000. 2000-04-13 22:02:54 +00:00
nisimura
85f3855a8c - Implement mips3_TBIAP().
- Remove obsoluted routines in locore_mips3.S
- addiu -> addu, andi -> and, ori -> or.
2000-04-12 01:05:34 +00:00
nisimura
e342080364 Introduce cpu_intr() whose body is now provided by target ports in
their own ways.  Ugly fixup #define in machine/intr.h have gone.
mips_hardware_intr global variable patch work has gone.
2000-04-11 02:30:14 +00:00
soren
aa4c70110e Move the start of the user stack down a little to account for the
virtual address checking done by the R8000 and some QED CPUs.

From Jeff Smith.
2000-04-07 21:50:08 +00:00