Commit Graph

34129 Commits

Author SHA1 Message Date
jmcneill
c8111254a1 Pass ISA chipset information through to ACPI devices, to allow for porting
of pnpbios(4) glue to acpi(4).
2002-12-28 06:14:07 +00:00
reinoud
ca70f10e3b Add the loadfile_machdep.h as needed for native bootloaders 2002-12-28 02:42:13 +00:00
mrg
122353da40 rename CPU_READY() to CPU_NOTREADY() seeing that's what it checks. 2002-12-28 02:35:56 +00:00
mrg
7d51aacb32 update the vme bus_space_tag_t to reality. 2002-12-28 01:33:00 +00:00
tsutsui
5a1aba72d6 Bump SYMTAB_SPACE to 190000. 2002-12-27 14:59:21 +00:00
tsutsui
fbc8e4748a Add support for SEGA LAN Adapter, MB86967 based Ethernet adapter.
Based on the patches in port-dreamcast/17493 by Christian Groessler,
with several modification by me.
2002-12-27 11:43:38 +00:00
tsutsui
c680050521 Add a set of bus_space(9) functions for g2bus devices with
sparse address space. This is required for SEGA LAN adapter support.
2002-12-27 11:34:05 +00:00
manu
f464631d66 Several things:
1) rights should be shared by the threads within a process. While it would
be easier to handle this with the struct proc/struct lwp split, we attempt to
do this now by sharing the right lists. Because each right holds a reference
to struct proc, this might cause some problems later.
2) in pthread_exit, really exit the thread. Also reintialize the righ tlist to
make sure we will not destroy the parent's right list
3) rights can hold multiple permissions on a port (ie: send and receive). Fix th
is.
4) first attempt on right carried by messages. We still have to do rights carrie
d in the message body (complex messages).
2002-12-27 09:59:24 +00:00
pooka
30d4a8344b sync with mecreg change, ie. make this compile 2002-12-26 22:25:12 +00:00
pooka
a0c298e366 brush up situation with mec register definitions
from Chris Sekiya
2002-12-26 22:24:46 +00:00
pooka
c99132ebb0 Shuffle network interface and phy drivers into alphabetical order and
add comments for them.
2002-12-26 18:26:07 +00:00
martin
ffbcb6d927 Conditionalize T_DBPAUSE trap handling on #ifdef MULTIPROCESSOR to make
single CPU kernels compile again.
2002-12-26 12:14:31 +00:00
junyoung
9f582c3342 Cosmetic changes to reduce diff against GENERIC. 2002-12-26 08:25:20 +00:00
junyoung
41313fe244 #<space>comment...
Pointed out by collver1 via PR#18468.
2002-12-26 08:21:56 +00:00
petrov
89143201f7 add db_dump_itlb. 2002-12-25 22:24:56 +00:00
petrov
70bd8bf51e new function dump_itlb. 2002-12-25 22:05:10 +00:00
uwe
580c60b346 When scanning HP keyboard, disable output on all scan lines except the
one we are currently scanning.  This is what Hitachi's sample WinCE
code does.  Thanks to YAEGASHI Takeshi for pointing this out!
This makes same row chords work properly, most importantly
Ctrl-@, Ctrl-W, Ctrl-S, Ctrl-Alt-F1 (ctrl row), Ctrl-Alt-F3 (alt row).
2002-12-24 11:49:03 +00:00
pooka
87a74ecee8 Use crimereg.h definitions for the crime dog. Also, move watchdog
disable down the very last possible place in cpu_reboot.

from Chris Sekiya
2002-12-23 21:04:23 +00:00
pooka
8ecf5692ac add bus_space_vaddr()
from rafal
2002-12-23 20:41:47 +00:00
pooka
0dd7013e7a MACE register definitions
from Chris Sekiya
2002-12-23 20:05:06 +00:00
pooka
b31b740c2b CRIME register definitions
from Chris Sekiya
2002-12-23 20:04:22 +00:00
pooka
1fcaee0848 add debug printf
from Rafal
2002-12-23 19:49:27 +00:00
pooka
2f32342d20 also create boot.ip32 with the entry point set to the IP32 load address
from Chris Sekiya
2002-12-23 19:31:24 +00:00
pooka
fb83173bb6 add some ethernet interfaces
from Chris Sekiya
2002-12-23 19:18:34 +00:00
jdolecek
fa3da541f9 update for added ktrsyscall() argument
XXX this should probably be converted to use trace_enter()/trace_exit(),
XXX the current code doesn't support systrace
2002-12-23 16:26:13 +00:00
pk
f8055a350c * Use correct PC value for displaying the called function.
* Merge code to display non-kernel frames.
2002-12-23 13:21:10 +00:00
tsutsui
1bfd32c4f3 Fix pasto in comment. 2002-12-23 09:59:25 +00:00
pk
f953a01835 xcallintr() receive a clockframe *' argument, not a trapframe *'.
Setup a DDB context for paused CPUs by defining a soft trap (T_DBPAUSE)
which uses the generic trap handler code to get the trapframe constructed
and then calls on a debugger-defined `suspend' routine.
2002-12-23 00:55:16 +00:00
pk
5c62f82bdf Upon trap exit, update the trapframe with data for the running CPU rather
than the one which was the last target of the `machine cpu' command.
2002-12-23 00:42:37 +00:00
wiz
ea577b210e Debugging is usually spelled with three gs. 2002-12-22 13:50:35 +00:00
ichiro
7bda39e405 Use generic_bs_wr_4 for writing region 2002-12-22 11:28:37 +00:00
ichiro
2c9ff5a338 Use generic_bs_sr_4 2002-12-22 11:24:07 +00:00
mrg
6ee482ef5b change what 'hw.model' reports to be more inline with other netbsd ports, as
well as reporting the actual machine model & cpu, rather than first configured
CPU.  changes for two machines are:

old:
	hw.model = TMS390Z50 v0 or TMS390Z55 @ 75 MHz, on-chip FPU
	hw.model = SUNW,UltraSPARC @ 143.002 MHz, version 0 FPU

new:
	hw.model = SUNW,SPARCstation-20 (TMS390Z50 v0 or TMS390Z55 @ 75 MHz, on-chip FPU)
	hw.model = SUNW,Ultra-1 (SUNW,UltraSPARC @ 143.002 MHz, version 0 FPU)

as per discussion on port-sparc & port-sparc64.
2002-12-22 02:17:24 +00:00
gmcgarry
85dbe5f6c5 Make the DMA controller a separate device attached to intio. Intio
devices can use the DMA controller too.
2002-12-22 00:17:13 +00:00
gmcgarry
75851dc4ed Make this compile with LOCK_DEBUG 2002-12-22 00:11:10 +00:00
manu
4a06119a9d Pass the system call table to trace_enter() and ktrsys() so that it is
possible to use alternate system call tables. This is usefull for
displaying correctly the arguments in Mach binaries traces.

If NULL is given, then the regular systam call table for the process is used.
2002-12-21 16:23:56 +00:00
pk
4e0634669b * xcallintr(): use cpuinfo directly again.
* nmi_soft(): remove most of the obsoleted requests.
2002-12-21 12:55:54 +00:00
pk
0408b1cbc8 tlb_flush_segment() and tlb_flush_region() now take a virtual address
argument instead of segment and region numbers.
2002-12-21 12:52:55 +00:00
pk
82815de0ad Use xcall() to broadcast MMU TLB flushes. 2002-12-21 12:13:38 +00:00
pk
8dcde9f5b1 * cpu_hatch(): enable interrupts upon return from cpu_setup().
* interrupt trap: acquire the kernel lock only for interrupt levels <= PIL_SCHED
2002-12-21 11:57:41 +00:00
pk
1d8dc4daf2 * getcacheinfo_obp(): also initialise the cacheinfo i/d associativity fields
in the case of a unified cache.
* xcall(): slightly optimise the `wait for other CPUs' loop.
2002-12-21 11:48:55 +00:00
thorpej
899e58abe7 Bump ramdisk size to 2920 blocks. 2002-12-20 23:14:14 +00:00
tsutsui
738ea71fdd Remove __P(). 2002-12-20 16:54:15 +00:00
tsutsui
2cac3aae2d Remove __P(). 2002-12-20 16:39:10 +00:00
tsutsui
0687b33b99 Remove __P(). 2002-12-20 16:23:46 +00:00
scw
4e87eae834 Use Software Single Stepping for now when PPC_IBM4xx is defined. The
existing hardware assisted method doesn't work on this cpu.

Also correct the "I_B" constant in db_machine.h.
2002-12-20 15:23:12 +00:00
bsh
9e1fd4dd36 Driver for keyboard controller in the SA-1111 companion chip.
Our PC keyboard driver (sys/dev/pckbc/pckbd.c) works only with 8042
keyboard controller driver (sys/dev/ic/pckbc.c).  So, This file
provides same functions as those of 8042 driver.

XXX: we need cleaner interface between the keyboard driver and
     keyboard controller drivers.

XXX: PS/2 mice are not supported yet.
2002-12-20 04:12:51 +00:00
bsh
7b1d3e8b2b comment out a file that is not in the tree yet. 2002-12-20 01:10:11 +00:00
thorpej
2a39e8388d Merge the IBM 4xx into the common powerpc/locore_subr.S, and
eliminate all the duplicated context switch related code in
the IBM 4xx port.
2002-12-19 19:37:25 +00:00
thorpej
a6dc36fa4e Build LKMs with -msoft-float. 2002-12-19 19:36:26 +00:00
pk
f0a20f1305 * mark selected fields of `struct xpmsg' as volatile, instead of the whole
structure.
* change volatile => __volatile
2002-12-19 16:31:38 +00:00
scw
c10c20ac28 Add a range check for the DCR address in db_ppc4xx_dcr(). 2002-12-19 13:45:03 +00:00
scw
de98ba0a49 Add a "machine dcr" command, for the IBM4XX case, which permits
reading/writing of the cpu's DCR registers.
2002-12-19 13:29:53 +00:00
pk
2fba4e01ff Mark CPUs that did not spin up properly and don't enable them later on. 2002-12-19 11:20:30 +00:00
pk
75c5f270d2 Brush-up the generic cross-call routine and use it to implement the SMP
cache flush ops.
Also a standard soft interrupt handler for standard cross-call notification
reserving the NMI level 15 softint for urgent cross calls.
2002-12-19 10:38:28 +00:00
pk
eaf530d598 Sprinkle volatiles to avoid register allocation, esp. in cross-call
synchronisation functions used in SMP kernels.
2002-12-19 10:30:39 +00:00
pk
ec2b1c3c64 smp_cache_flush() also takes a context parameter. 2002-12-19 10:27:19 +00:00
augustss
1b5acb64d0 Initialize the media to 10baseT. From Steph Bailey. 2002-12-19 07:15:05 +00:00
pk
2076dbdb04 Install the sparc V8 multiply/divide routines after we've collected some
basic information on the CPUs.
2002-12-18 11:56:43 +00:00
mrg
1a854929dd we use nmi_hard and nmi_soft on SUN4D as well 2002-12-18 06:20:36 +00:00
bsh
b757504104 Config information for Intel PXA2xx application processors. 2002-12-18 05:47:31 +00:00
bsh
ee778f8dfa config staff for Lubbock 2002-12-18 04:56:52 +00:00
bsh
5f7d2415b6 back out a part of my previous commit. 2002-12-18 04:25:56 +00:00
bsh
7e91daa3b3 guard against being included twice 2002-12-18 04:20:36 +00:00
bsh
35345c15f5 + protect against including twice
+ add struct sa1111_attach_args for keyboard controller support.
2002-12-18 04:16:09 +00:00
bsh
b454cbf9c6 + protect against including twice
+ add bit definitions in SKCR
+ add keyboard controller registers
2002-12-18 04:09:31 +00:00
gmcgarry
5abd84e433 Use callee-saved registers in RAS processing. 2002-12-17 20:49:07 +00:00
gmcgarry
7443ad1b01 Move to MI runqueue functions. 2002-12-17 19:47:15 +00:00
simonb
5b6caeca74 Mark the Au1x00 CPUs as having a fully coherent data cache that doesn't
require flushing (even in the instruction cache handlers).  This gives
about a 4% improvement in a "make depend" benchmark.

Mark the SB-1 CPUs as having a fully coherent data cache that only
require flushing in the instruction cache handlers.  This gives about
a 5% improvement in a "make depend" benchmark.
2002-12-17 12:07:50 +00:00
simonb
2c1a832f25 Add support for caches where the data cache is fully coherent, and
either requires flushing either only when the I cache ops are used
or not at all.  Currently only used by MIPS32/MIPS64 cache code.
2002-12-17 12:04:29 +00:00
pk
a26cbfba69 Deal with an `unimplemented flush' trap from kernel mode. 2002-12-17 10:04:19 +00:00
jdolecek
30f7194bc4 use the __HAVE_CPU_MAXPROC hook to limit kern.maxproc to number
of available GDT slots
add code in init386() to force maxproc to be maximum cpu_maxproc()

this fixes port-i386/1635 by John Kohl
2002-12-16 18:31:08 +00:00
pk
c2ddc52f2d The cache flush routines now take a CPU context parameter. This is going
to be necessary in SMP kernels.
2002-12-16 16:59:09 +00:00
pk
b036b089a7 Multiple inclusion protection. 2002-12-16 16:24:40 +00:00
fvdl
4bd73a650e Remove leftover declarations used for debugging purposes only. 2002-12-16 16:22:50 +00:00
jdc
0a3a2262cb Increment version number for match function and Cycle 5 IP changes. 2002-12-16 13:02:58 +00:00
jdc
079b83cafa Extend the matching routine to take a function pointer, so that additional
(arbitrary) matching can be done.
Add match function and patch for Cycle 5 IP (Sparc 5 clone).

Reviewed by Uwe.
2002-12-16 13:01:01 +00:00
thorpej
6ff0a8ba21 Initialize pools in pmap_init(); the low-water mark must be set when
it is safe to allocate pages via the normal mechanism.
2002-12-16 07:18:30 +00:00
thorpej
7affeb0071 Add support for RAS (initially added by me on nathanw_sa branch). 2002-12-16 02:15:58 +00:00
thorpej
9ad045c958 Use MI setrunqueue()/remrunqueue(). 2002-12-16 01:56:47 +00:00
martin
ae7d5baab6 Fix pasto - make it compile for !MULTIPROCESSOR 2002-12-15 23:01:09 +00:00
pk
9313f9570d Disable `unimplemented flush' traps during boot. Keep it disabled on
non-MULTIPROCESSOR kernels.
2002-12-15 15:01:08 +00:00
takemura
e9628b7102 Added Vrc4173PIU. (touch panel interface unit on Vrc4173) 2002-12-15 09:24:24 +00:00
christos
cc079cff49 release the kernel lock if trace_enter fails.
XXX[1]: We need to fix all platforms that do this.
XXX[2]: x86 does not check for MPSAFE syscalls before grabbing the lock.
2002-12-14 14:52:24 +00:00
fvdl
b2622c34d6 In syscall_fancy(), drop the kernel lock if trace_enter fails.
From Nick Hudson.
2002-12-14 14:40:36 +00:00
junyoung
16c0ce8d78 Fix comment.
De-__P().
2002-12-14 09:46:36 +00:00
junyoung
058737862e Now that gdt_compact() is gone, #if 0'ed gdt_shrink() doesn't need to be
here, either. Remove other #if 0 code as well.
2002-12-14 09:38:50 +00:00
tsutsui
e0481a14c5 Change type of dumpmag from u_long to u_int32_t to sync with other ports. 2002-12-14 05:23:19 +00:00
christos
0cc4fbf335 add twe control device 2002-12-13 23:26:47 +00:00
fredette
856e98cd30 bcopy -> memcpy, bzero -> memset 2002-12-13 20:44:44 +00:00
drochner
9ab86cb8ae do a TBIAS after modifying cache enable bits 2002-12-13 18:52:56 +00:00
drochner
b36fe906bf scatter some pmap_update(pmap_kernel()) to reduce differences to other ports 2002-12-13 18:50:22 +00:00
drochner
53cb6b767d use <net/netisr_dispatch.h> 2002-12-13 18:49:35 +00:00
fvdl
8cbcf0f7a3 Remove check for 32bit-only access of the old syscall path. 2002-12-13 17:44:13 +00:00
fvdl
81a877b0f1 Restore all registers at sigreturn. 2002-12-13 02:52:10 +00:00
lukem
7f7f9da211 minor delint 2002-12-13 02:36:37 +00:00
fvdl
ac22ef18d8 Remove redundant cli/sti instructions. From Enami Tsugutomo. 2002-12-12 21:39:33 +00:00
christos
61b8a488ba Add empty shells of new functions so we can keep compiling. 2002-12-12 17:42:10 +00:00
christos
09e9a5cde9 This new file is wanted by compat_darwin. 2002-12-12 17:41:53 +00:00
christos
c9498dd93c add missing dependency. 2002-12-12 17:41:19 +00:00