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1232 Commits

Author SHA1 Message Date
simonb ada33c9eac Oops, remove an #endif leftover from the previous change. 2002-05-13 06:11:52 +00:00
simonb c790dd34b6 Add a comment after an #endif to match up with an #ifdef. 2002-05-13 04:15:40 +00:00
simonb ee2264c945 All MIPS ports have been ELF for a long time (most since they were 
created); remove non-ELF assembly support.
 2002-05-13 01:39:17 +00:00
rafal 13c470a169 R4600 and R5000 count registers count at half-cpu-speed as well. 2002-05-03 03:50:11 +00:00
simonb fa61e6cd3b In the LOCKDEBUG case, call exit2() before sched_lock_idle() so 
that the exitting process pointer in a0 doesn't get overwritten by
sched_lock_idle().
 2002-04-25 06:55:53 +00:00
manu 33d1091e95 Removed the IRIX signal trampoline, which is useless now we use the signal 
trampoline provided by IRIX libc.
 2002-04-14 21:52:25 +00:00
manu c56e133974 More comments on the new signal frame/trampoline 2002-04-13 10:52:59 +00:00
manu 5ee554064d Reworked IRIX signal delivery so that ucontext is used instead of sigcontext 
when SA_SIGINFO is used. The IRIX process will hence find the expected
information using the third argument of the signal handler.

We do not provide code and siginfo yet.
 2002-04-12 18:44:57 +00:00
manu 79166f2808 iAdded warning printtf just in case something calls the stubs functions here 2002-04-06 18:03:17 +00:00
simonb 2d7c87ebfb Add a "CPU_MIPS_DOUBLE_COUNT" flag for CPUs where the cp0 count register 
ticks over at half the CPU clock speed, and set this flag for the known
CPUs with this behaviour.  Better names for this flag gratefully accepted!

Also adjust comment about known R4000/R4400 revisions.
 2002-04-05 01:22:16 +00:00
simonb fab269a0eb Backout the .sdata to .data change for now; this broke compiling of 
hpcmips kernels.
 2002-04-03 13:57:47 +00:00
simonb 2548187935 Don't make arch/mips/mips/mips_mcclock.c mandatory for all mips ports 
with an mcclock - pmax is the only one currently using this.
 2002-04-03 13:16:13 +00:00
simonb ccc73cca48 Put a couple of variables in the data section, not the sdata section. 2002-04-03 04:04:31 +00:00
simonb 6fbaedb430 Use the new 2way mips{32,64} cache ops. 2002-04-03 03:55:07 +00:00
simonb 67fd901d75 Include 2way cache ops for mips{32,64} CPUs. 2002-04-03 03:51:00 +00:00
simonb 078e9477f0 Add prototype for badaddr64(). 2002-04-03 03:48:33 +00:00
simonb 85c30a703d Remove a commented-out debug printf. 2002-04-03 03:47:53 +00:00
manu 5f93fe2017 undef SYSCALL_SHIFT after using it so that it is possible to define both 
COMPAT_IRIX and COMPAT_LINUX without getting warnings about SYSCALL_SHIFT
being redefined.
 2002-04-01 21:06:21 +00:00
manu 2e2ba05d0d Moved errno translation so that errno get translated correctly in any case, 
and so that EJUSTRETURN and ERESTART get proprely reported.
 2002-03-28 18:48:31 +00:00
simonb 4a1086db83 There's 8 interrupt_status_N registers, not 7. 2002-03-28 12:49:55 +00:00
simonb de2d1df3a9 Remove the comment that says this is for PCI busses only. 2002-03-23 14:20:41 +00:00
simonb 8e5ab10b05 Add generic chipset memory and I/O "bus" functions for mips, based on 
algor/pci/pci_alignstride_bus_{io,mem}_chipdep.c.
 2002-03-23 14:19:18 +00:00
chs fb88d3b0ba add missing cache flushes in pmap_protect(). fixes PR 15965. 2002-03-20 02:50:19 +00:00
simonb 267b8c65f5 Define all CPU types if _LKM is defined; fixes problems building LKM's 
as noted by FUKAUMI Naoki on port-mips.
 2002-03-19 00:53:46 +00:00
simonb 91785659ba Generic PCI/ISA machdep headers for mips; copied from the algor port. 2002-03-18 03:08:09 +00:00
simonb 7e2ca5e1a8 Copy the algor bus_dma.c for use as a generic bus_dma implementation for 
other MIPS ports.
 2002-03-18 02:32:54 +00:00
simonb e64d2d9708 Oops, balance #ifdef/#endif _KERNEL. 2002-03-18 01:01:54 +00:00
simonb d9aac5ef07 Add generic MIPS bus_space and bus_dma headers; these are a straight 
split of the algor <machine/bus.h>.
 2002-03-18 00:32:21 +00:00
manu c51e325123 Replaced PS_STRINGS by p->p_psstr 2002-03-17 20:54:09 +00:00
simonb 9be5709e65 Fix some whitespace/indentation niggles. 2002-03-17 07:38:28 +00:00
simonb 17162f3d40 Add R4400 reg 0x60 to the MIPS CPU table. 
From PR port-mips/15894 from Thilo Manske.
 2002-03-13 13:18:58 +00:00
simonb 22db14d9e1 All the mips ports had an identical procfs_machdep.c, so use a common 
file under arch/mips/mips.
 2002-03-13 02:55:10 +00:00
uch 552fdb7e1b make this compile and work with MIPS3_5900. 2002-03-11 16:39:39 +00:00
thorpej a180cee23b Pool deals fairly well with physical memory shortage, but it doesn't 
deal with shortages of the VM maps where the backing pages are mapped
(usually kmem_map).  Try to deal with this:

* Group all information about the backend allocator for a pool in a
  separate structure.  The pool references this structure, rather than
  the individual fields.
* Change the pool_init() API accordingly, and adjust all callers.
* Link all pools using the same backend allocator on a list.
* The backend allocator is responsible for waiting for physical memory
  to become available, but will still fail if it cannot callocate KVA
  space for the pages.  If this happens, carefully drain all pools using
  the same backend allocator, so that some KVA space can be freed.
* Change pool_reclaim() to indicate if it actually succeeded in freeing
  some pages, and use that information to make draining easier and more
  efficient.
* Get rid of PR_URGENT.  There was only one use of it, and it could be
  dealt with by the caller.

From art@openbsd.org.
 2002-03-08 20:48:27 +00:00
tsutsui 3c8b0446fe Change type of dumpmag to u_int32_t since it is actually 
a 32bit unsigned magic number.
As per discussion on tech-kern, and fixes port-sparc64/11949.
 2002-03-06 13:10:18 +00:00
simonb 1c904f9d33 Use MIPS_PHYS_TO_KSEG1 instead of cfe's PHYS_TO_K1 macro. 2002-03-06 09:32:04 +00:00
simonb 2bf916e97d Implement a clkread() function for microtime() using a multu/mfhi 
sequence using the reciprocal of the delay divisor to perform the
division.
Set the cp0 compare register so that it doesn't trigger interrupts and
reset the cp0 count register in the hardclock interrupt handler.
 2002-03-06 07:47:57 +00:00
simonb feb24029e7 Add the offset of ci_divisor_delay in struct cpu_info. 2002-03-06 07:32:15 +00:00
simonb 78c9211fca Add a field for the reciprocal of the divisor delay for use by microtime. 2002-03-06 07:31:38 +00:00
simonb 3fe666190f Wrap long line and remove a bogus XXX comment. 2002-03-06 03:25:09 +00:00
simonb 2c68c156c5 Only include <sys/exec_ecoff.h> if EXEC_ECOFF is defined. 
Note that ELF is mandatory.
 2002-03-06 00:22:09 +00:00
simonb 3ab34324e9 Remove a few unneeded include files. 2002-03-06 00:05:06 +00:00
simonb 1b5ddfe411 Add support for the on-chip peripherals on the Broadcom SiByte SB1250 CPU 
and support routines for the Broadcom CFE (Common Firmware Environment).

This code is provided by the Broadband Processor Business Unit at
Broadcom Corp with minor updates by me.
 2002-03-05 23:46:40 +00:00
simonb f1dbc97679 Not used anymore. 2002-03-05 16:08:55 +00:00
simonb 811ee92532 Add support for MIPS32 and MIPS64 architectures: 
- Build mips3/5900/32/64 support subroutines.
 - Move arch/mips/mips/fp.S to central location.
 - Move NOFPU to opt_cputype.h.
 2002-03-05 16:08:00 +00:00
simonb f340c57568 Values related to the MIPS32/MIPS64 Privileged Resource Architecture 
(from Broadcom Corp).
 2002-03-05 16:07:10 +00:00
simonb 9ac7c86a0f Adjust for 5900 include file changes. 2002-03-05 16:06:04 +00:00
simonb 3f2f4c9bf6 r5900_vector_init() is in mips_machdep.c now. 2002-03-05 16:05:26 +00:00
simonb dd756c0ca5 Rename <mips/r5900/cpuregs.h> to <mips/r5900regs.h> and remove some 
content no longer needed.
 2002-03-05 16:04:57 +00:00
simonb fcdc111c1a Cosmestic changes (more like the mips3+ code). 2002-03-05 16:03:22 +00:00