in the non-MULTIPROCESSOR case (LOCKDEBUG requires it). Scheduler
lock is held upon entry to mi_switch() and cpu_switch(), and
cpu_switch() releases the lock before returning.
Largely from Bill Sommerfeld, with some minor bug fixes and
machine-dependent code hacking from me.
- MB_LEN_MAX is increased to 32.
- To ensure binary compatibility for old executables
under multibyte locale, versioned setlocale is added.
- __mb_len_cur definision is added in setlocale.c
and enable it in stdlib.h .
It is also important for multibyte locale stuffs,
but I just forgot.
the _2way and mips3_FlushDCache(). This lets all mips3 cache ops accept
user virtual addresss w/o a tlb miss. Since this is now done in both
ICache flush routines, no need to do it in pmap.c. Fixed R4400
stability problems with setregs() cache flushing.
is illegal to flush on user addresses. In theory the race exists
on MIPS1, but it is rather unlikely in common use. I have
seen it with regress/sys/kern/sigtramp on a QED 5231 system.
Previously we jal to panic which never cleared the tlb fault, so if
on the course of shutdown (like a doshutdownhooks() callback) missed
K2, it would panic again. Fix by setting EPC to panic() and eret.
By default this is off, and only slightly changes the code to load SR when
a temp register is available. This can be used by the platform code to
handle slow to clear interrupts (our case) or to mask off any interrupt
any interrupt at run-time. This can be very useful for embedded platforms
that have less than desirable interrupt properties.
it would hang-up. logstacktrace() actually was the same as stacktrace() so
just make it an XLEAF() for now. Include some DDB code for KGDB compilation.
on mips3 systems, until the kernel actually hooks the vectors.
This makes it easier to debug early problems if the firmware
has provides an exception handler.
This keeps the SR management more contained in locore, and should
be roughly the same performance as the .text size is less. Talked
to simonb and he was ok with this change.
jhawk. This callback is used by platform code to manage things like
watchdogs that should be disabled while in ddb. Done as a callback
for processors such as mips that support lots of different systems.
Add ddb support for QED opcodes, fill in enough routines so "next" usually
works, kdbpoke support for any size. Add callback that ports can hook when
entering and leaving ddb. This can be used for things like turning
off watchdogs while in ddb.
This lets mips ports have additional machdep sysctl. Define CPUISMIPS3
for MIPS1+MIPS2 as cpu_arch >= 3 to support mips4. Add cpu_intr()
prototype so this is defined in one place.
* put #includes of opt headers and headers to get protos used by
net/netisr_dispatch.h in net/netisr.h (if !defined(_LOCORE)) (rather than
in netisr_dispatch.h itself, and potentially nowhere, respectively).
* require netisr.h to be included before netisr_dispatch.h.
* minor additional cleanup of both netisr.h and netisr_dispatch.h.
* clean up uses to remove now-unnecessary header file inclusions, and
local prototypes of the fns.
* convert netisr dispatch implementations which didn't use
netisr_dispatch.h (pc532) to use it.
<vm/pglist.h> -> <uvm/uvm_pglist.h>
<vm/vm_inherit.h> -> <uvm/uvm_inherit.h>
<vm/vm_kern.h> -> into <uvm/uvm_extern.h>
<vm/vm_object.h> -> nothing
<vm/vm_pager.h> -> into <uvm/uvm_pager.h>
also includes a bunch of <vm/vm_page.h> include removals (due to redudancy
with <vm/vm.h>), and a scattering of other similar headers.
"off_t" and the return value is a "paddr_t" to allow mappings
at offsets past 2^31 bytes. Somewhat inspired by FreeBSD, which
only changed the offset to a "vm_offset_t".
Includes updates for the i386, pc532 and sh3 mmmmap from Jason Thorpe.
family) that usually occur in cold marine waters and often have barbels
and three dorsal fins.
code: a set of instructions for a computer.
The latter is more appropriate in the comment corrected here.
use them. Rename them to match the names in See Mips Run; they're not
as orthogonal as values or'd together might make you think... Finally,
actually use them for every bloody cache op.
Merge Kernel MCOUNT and user MCOUNT.
The earlier code which was inserted to call _mcount in profiling
assembler routines is busted badly. This gets it working with PIC
code and should work with any arbitrary assembler routine.
and rename it to MIPS3_TLB_WIRED_UPAGES.
The value of wired register becomes variable on arc port,
and arc is the only mips3 port which uses the wired TLB entries 2..7.
asm statements, obsoluting asm routines in locore.S. They are
designed to work in symmetry as names suggests. savefpregs()
does not clear a global variable fpcurproc. Both would be noops when
NOFPU global symbol is defined.
- MDP_FPUSED flag is not turned on for FPA-less processors like Vr4100
and TX3900 even when processes execute FP insns.
- Nuke external function reference of savefpregs() which is already defined
in mips/cpu.h.
- Adjust the comment tells "let user processes change CP0 status register
freely might be dangerous."
soren