Commit Graph

3280 Commits

Author SHA1 Message Date
mrg 122353da40 rename CPU_READY() to CPU_NOTREADY() seeing that's what it checks. 2002-12-28 02:35:56 +00:00
mrg 7d51aacb32 update the vme bus_space_tag_t to reality. 2002-12-28 01:33:00 +00:00
martin ffbcb6d927 Conditionalize T_DBPAUSE trap handling on #ifdef MULTIPROCESSOR to make
single CPU kernels compile again.
2002-12-26 12:14:31 +00:00
pk f8055a350c * Use correct PC value for displaying the called function.
* Merge code to display non-kernel frames.
2002-12-23 13:21:10 +00:00
pk f953a01835 xcallintr() receive a `clockframe *' argument, not a `trapframe *'.
Setup a DDB context for paused CPUs by defining a soft trap (T_DBPAUSE)
which uses the generic trap handler code to get the trapframe constructed
and then calls on a debugger-defined `suspend' routine.
2002-12-23 00:55:16 +00:00
pk 5c62f82bdf Upon trap exit, update the trapframe with data for the running CPU rather
than the one which was the last target of the `machine cpu' command.
2002-12-23 00:42:37 +00:00
mrg 6ee482ef5b change what 'hw.model' reports to be more inline with other netbsd ports, as
well as reporting the actual machine model & cpu, rather than first configured
CPU.  changes for two machines are:

old:
	hw.model = TMS390Z50 v0 or TMS390Z55 @ 75 MHz, on-chip FPU
	hw.model = SUNW,UltraSPARC @ 143.002 MHz, version 0 FPU

new:
	hw.model = SUNW,SPARCstation-20 (TMS390Z50 v0 or TMS390Z55 @ 75 MHz, on-chip FPU)
	hw.model = SUNW,Ultra-1 (SUNW,UltraSPARC @ 143.002 MHz, version 0 FPU)

as per discussion on port-sparc & port-sparc64.
2002-12-22 02:17:24 +00:00
manu 4a06119a9d Pass the system call table to trace_enter() and ktrsys() so that it is
possible to use alternate system call tables. This is usefull for
displaying correctly the arguments in Mach binaries traces.

If NULL is given, then the regular systam call table for the process is used.
2002-12-21 16:23:56 +00:00
pk 4e0634669b * xcallintr(): use cpuinfo directly again.
* nmi_soft(): remove most of the obsoleted requests.
2002-12-21 12:55:54 +00:00
pk 0408b1cbc8 tlb_flush_segment() and tlb_flush_region() now take a virtual address
argument instead of segment and region numbers.
2002-12-21 12:52:55 +00:00
pk 82815de0ad Use xcall() to broadcast MMU TLB flushes. 2002-12-21 12:13:38 +00:00
pk 8dcde9f5b1 * cpu_hatch(): enable interrupts upon return from cpu_setup().
* interrupt trap: acquire the kernel lock only for interrupt levels <= PIL_SCHED
2002-12-21 11:57:41 +00:00
pk 1d8dc4daf2 * getcacheinfo_obp(): also initialise the cacheinfo i/d associativity fields
in the case of a unified cache.
* xcall(): slightly optimise the `wait for other CPUs' loop.
2002-12-21 11:48:55 +00:00
pk f0a20f1305 * mark selected fields of `struct xpmsg' as volatile, instead of the whole
structure.
* change volatile => __volatile
2002-12-19 16:31:38 +00:00
pk 2fba4e01ff Mark CPUs that did not spin up properly and don't enable them later on. 2002-12-19 11:20:30 +00:00
pk 75c5f270d2 Brush-up the generic cross-call routine and use it to implement the SMP
cache flush ops.
Also a standard soft interrupt handler for standard cross-call notification
reserving the NMI level 15 softint for urgent cross calls.
2002-12-19 10:38:28 +00:00
pk eaf530d598 Sprinkle volatiles to avoid register allocation, esp. in cross-call
synchronisation functions used in SMP kernels.
2002-12-19 10:30:39 +00:00
pk ec2b1c3c64 smp_cache_flush() also takes a context parameter. 2002-12-19 10:27:19 +00:00
pk 2076dbdb04 Install the sparc V8 multiply/divide routines after we've collected some
basic information on the CPUs.
2002-12-18 11:56:43 +00:00
mrg 1a854929dd we use nmi_hard and nmi_soft on SUN4D as well 2002-12-18 06:20:36 +00:00
pk a26cbfba69 Deal with an `unimplemented flush' trap from kernel mode. 2002-12-17 10:04:19 +00:00
pk c2ddc52f2d The cache flush routines now take a CPU context parameter. This is going
to be necessary in SMP kernels.
2002-12-16 16:59:09 +00:00
pk b036b089a7 Multiple inclusion protection. 2002-12-16 16:24:40 +00:00
jdc 0a3a2262cb Increment version number for match function and Cycle 5 IP changes. 2002-12-16 13:02:58 +00:00
jdc 079b83cafa Extend the matching routine to take a function pointer, so that additional
(arbitrary) matching can be done.
Add match function and patch for Cycle 5 IP (Sparc 5 clone).

Reviewed by Uwe.
2002-12-16 13:01:01 +00:00
martin ae7d5baab6 Fix pasto - make it compile for !MULTIPROCESSOR 2002-12-15 23:01:09 +00:00
pk 9313f9570d Disable `unimplemented flush' traps during boot. Keep it disabled on
non-MULTIPROCESSOR kernels.
2002-12-15 15:01:08 +00:00
christos cc079cff49 release the kernel lock if trace_enter fails.
XXX[1]: We need to fix all platforms that do this.
XXX[2]: x86 does not check for MPSAFE syscalls before grabbing the lock.
2002-12-14 14:52:24 +00:00
pk f4fe3fda21 dumpsys(): Use pmap_kremove() to unmap pages mapped pmap_kenter(). 2002-12-12 09:34:04 +00:00
pk 047870f66e softintr_establish(): append handler to the list for the actually choosen
processor interrupt level.
2002-12-11 13:21:19 +00:00
pk e675712f0d * loadfile() return a file descriptor that must be closed.
* check the kernel size before loading
2002-12-11 10:35:06 +00:00
thorpej e8cc3884de Rename __LDPGSZ to AOUT_LDPGSZ, to accurately reflect what it is. 2002-12-10 17:14:02 +00:00
pk 725a6aebf7 Remove the `flags' argument from bus_intr_establish(). 2002-12-10 13:44:47 +00:00
pk 5446e96bac bus_intr_establish() now takes an optional `fast trap' handler argument.
BUS_INTR_ESTABLISH_FASTTRAP and BUS_INTR_ESTABLISH_SOFTINTR are no longer used.
2002-12-10 12:16:25 +00:00
pk 45c45fca81 intr_establish() signature change: pass NULL for the `fast trap' argument. 2002-12-10 12:13:24 +00:00
pk fe233fdc10 The `fast trap' handlers are now pssed as an optional argument to
bus_intr_establish(). Allow fall-back on a regular interrupt handler if
the interrupt level must be shared with another device.
2002-12-10 12:11:21 +00:00
pk 4f62e0f7c8 * intr_establish() now takes an optional `fast trap' routine argument.
* also remove __P().
2002-12-10 12:04:51 +00:00
pk 6f945ab887 Allow a `fast trap' handler installation to be undone if an interrupt level
must be shared. This requires drivers that request the installation of
a `fast trap' handler to supply a regular interrupt handler as well to fall
back on.

The `fast trap' routine (if present) is now passed as an additional
argument to intr_establish().
2002-12-10 12:03:08 +00:00
thorpej 78ea2dd367 Use __LDPGSZ (which must be == USRTEXT) as the text address for a.out
executables, and eliminate the USRTEXT constant, which was only used
by the a.out exec code.
2002-12-10 05:14:24 +00:00
pk 04e582df1b setsoftint() is no longer used. 2002-12-09 16:13:58 +00:00
pk 48a30a2e35 Soft interrupts use their own set of handlers lists. 2002-12-09 16:13:23 +00:00
pk c822c6bd84 Finish the switch to the softintr(9) framework.
To make this work, we now have to use separate handler lists for hardware
and software interrupts as the soft interrupt handlers do not return
an `interrupt handled' status.

Thanks to Matt Fredette for providing an initial set of patches on port-sparc.
2002-12-09 16:11:50 +00:00
pk 74a8332ee9 cpu_switch(): avoid raising the interrupt level and enabling traps at the
same time as this may cause a spurious interrupt in some implementations.
Pointed out by uwe.
2002-12-08 16:16:59 +00:00
uwe 38b8c5689a Use 0x07ffffff for LOADADDR mask. This still provides for 128MB (and
given that PROM maps just 4 or 16 this is not going to be a bottle
neck).  Doesn't really affect normal kernels, need it for the changed
kernel base address (uncommitted) hack for broken javastation OFW.
Ok by pk.
2002-12-08 14:36:55 +00:00
pk 6c8d3fba22 Use MI versions of {set,rem}runqueue(). 2002-12-07 10:27:03 +00:00
pk 9ebe0ee7a6 ienab_bi[cs] are never used in a context common to both sun4/4c and sun4m,
so there's no point in constructing common entry points for them in locore.s.
2002-12-06 17:45:39 +00:00
pk 1b719337bb Pass the `device class interrupt level' on to intr_establish() and use to
raise the ipl in the interrupt handlers to the appropriate level. This avoids
interrupt handler interference if one of the devices actually interrupts at
a lower hardware level than the maximum level assined to a device class.

Based on code from Art Grabowski in openbsd.
2002-12-06 16:04:11 +00:00
pk 721e534a25 Use IPL_SOFTFDC. 2002-12-06 15:37:55 +00:00
pk e093913db8 Use IPL_SOFTAUDIO. 2002-12-06 15:37:39 +00:00
pk 060fa93542 Start using IPL_* constants from intr.h; phase out PIL_* in psl.h 2002-12-06 15:36:45 +00:00