Despite cautioning that S390CPU is needed for upcoming CPUState
refactorings, commit 5d69c547d9 (s390:
I/O interrupt and machine check injection.) added functions
cpu_inject_io() and cpu_inject_crw_mchk() with CPUS390XState argument,
claiming consistency with cpu_inject_ext().
This complicates making cpu_interrupt() take a CPUState even more and it
required to pass &cpu->env from some S390CPU-aware call sites already,
creating inconsistency elsewhere. Address that.
This also eliminates the need for CPUS390XState in s390_virtio_irq().
Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Commit 71e470886f (target-s390x: fix
style) renamed the cpu_s390x_handle_mmu_fault() argument from _vaddr to
orig_vaddr. Update the debug output code.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Since its introduction in d5a439645a
(s390x: helper functions for system emulation) the variable name was
raddr. Fix this.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
CPU_SAVE_VERSION was undefined, so "cpu_common" VMState and
cpu_{save,load}() were not registered. They were no-ops.
Therefore there is no backwards compatibility to keep, so we can mark
S390CPU as unmigratable at device level.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Juan Quintela <quintela@redhat.com>
Map the I/O interruption code before calling into css.
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Trigger the code for our virtual css in case of instruction
intercepts for I/O instructions.
Handle the tsch exit for the subchannel-related part of tsch.
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Provide a mechanism for qemu to provide fully virtual subchannels to
the guest.
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Provide handlers for (most) channel I/O instructions.
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
I/O interrupts are queued per isc. Only crw pending machine checks
are supported.
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Add s390_cpu_physical_memory_{map,unmap} with special handling
for the lowcore.
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Create a lowcore mapping helper that includes a check for sufficient
length.
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
This will allow each architecture to define how the VCPU ID is set on
the KVM_CREATE_VCPU ioctl call.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Acked-by: Gleb Natapov <gleb@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Allow virtio machines to register for different diag500 function
codes and convert s390-virtio to use it.
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Since commit "s390: Add CPU reset handler" the CPU's instance_init
registers a reset callback. Unregister that on instance_finalize.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
In one of the last commits we accidently got 3-space indentation into
the tree. Fix it up so it's 4 spaces wide.
Reported-by: Andreas Faerber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Add a CPU reset handler to have all CPUs in a PoP compliant
state.
Signed-off-by: Jens Freimann <jfrei@linux.vnet.ibm.com>
[agraf: move hw/hw.h into existing ifdef]
Signed-off-by: Alexander Graf <agraf@suse.de>
The function is only used in misc_helper.c, so move it to that file.
This reduces the size of debug executables (compiled without optimization)
because they get unused code and data for each compilation which includes
cpu.h.
Executables with optimization don't change their size.
ebcdic2ascii is currently unused and could be removed (not done here).
The array ascii2ebcdic must be accessed with an unsigned index, therefore
(int)ascii[i] was replaced by (uint8_t)ascii[i]. The old code would have
failed for a signed char less than 0. The current code only converts
"QEMU" and spaces to EBCDIC, so there is no problem today.
Signed-off-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
This enables qemu -cpu help to return a list of supported CPU models
on s390 and also to query for cpu definitions in the monitor.
Initially only cpu model = host is returned. This needs to be reworked
into a full-fledged CPU model handling later on.
This change is needed to allow libvirt exploiters (like OpenStack)
to specify a CPU model.
Signed-off-by: Viktor Mihajlovski <mihajlov@linux.vnet.ibm.com>
Signed-off-by: Jens Freimann <jfrei@linux.vnet.ibm.com>
Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com>
[agraf: fix s390x-linux-user, adjust header locations]
Signed-off-by: Alexander Graf <agraf@suse.de>
IBMs s390 contributions were meant to to be gplv2 or later (since
we were contributing to qemu). Several of the s390 specific files
link to gpl code anyway, so lets clarify the licence statement for
new contributions for those files that we have touched multiple
times or will likely touch again.
This patch does not touch files that mostly deal with tcg.
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Note that target-alpha accesses this field from TCG, now using a
negative offset. Therefore the field is placed last in CPUState.
Pass PowerPCCPU to [kvm]ppc_fixup_cpu() to facilitate this change.
Move common parts of mips cpu_state_reset() to mips_cpu_reset().
Acked-by: Richard Henderson <rth@twiddle.net> (for alpha)
[AF: Rebased onto ppc CPU subclasses and openpic changes]
Signed-off-by: Andreas Färber <afaerber@suse.de>
The division routines do not read or write tcg registers,
but can raise fixed-point divide exceptions.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Don't load the displacement into a register first, add it second
so that tcg_gen_addi_i64 can eliminate zeros. Don't mask the
displacement first so that we don't turn small negative numbers
into large positive numbers.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Giving the proper mask to disas_jcc allows us to generate an inline
comparison generating the carry/borrow with setcond.
In the very worst case, when we must use the external helper to compute
a value for CC, we generate (cc > 1) instead of (cc >> 1), which is only
very slightly slower on common cpus.
In the very best case, when the CC comes from a COMPARE insn and the
compiler is using ALCG with zero, everything folds out to become just
the setcond that the compiler wanted.
Signed-off-by: Richard Henderson <rth@twiddle.net>
After full conversion, we can audit the uses of LTGT cc ops
and see that none of the instructions can ever set CC=3.
Thus we can extend the table to treat that bit as ignored.
This fixes a regression wrt the pre-conversion translation
in which NE was used for both m=6 and m=7.
Signed-off-by: Richard Henderson <rth@twiddle.net>
While they aren't expensive, they aren't free to process. When we
know that the three cc helper variables are dead, don't kill them.
Signed-off-by: Richard Henderson <rth@twiddle.net>
There's no need to force computation of the true cc_op when taking an
exception or single stepping. In either case we'll enter the next TB
with s->cc_op = DYNAMIC and recompute anyway. Just make sure that
s->cc_op is stored back to env->cc_op as needed.
Delete some dead functions, avoid allocating unused TCG temps, drop
the old s->is_jmp setting.
Signed-off-by: Richard Henderson <rth@twiddle.net>
The use of inline restricts detection of static functions that are
no longer used. Limit the use of inline to those functions that
are conditionally used based on CONFIG_USER_ONLY.
Signed-off-by: Richard Henderson <rth@twiddle.net>
While we're at it, list all of the chapter 14 subchannel insns.
Which is easy since all merely need indicate non-operation.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Note that truncating the store to r1 based on PSW_MASK_64
is incorrect. We always modify the entire register.
Signed-off-by: Richard Henderson <rth@twiddle.net>
The code that was in gen_op_mvc was a bit confused wrt what lengths
it wanted to handle. I also disbelieve that the inline memset is
worthwhile.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Change the CC handling to be more like TEST UNDER MASK, with val & mask.
This lets us handle ICMH much more like ICM.
Signed-off-by: Richard Henderson <rth@twiddle.net>
The inline markers hid the fact that {n}abs_32 were unused
because of typos in the main do_calc_cc function. Let the
compiler handle auto-inlining here.
Signed-off-by: Richard Henderson <rth@twiddle.net>
I'm resonably certain that the carry/borrow-out condition for both
helpers was incorrect, failing to take into account the carry-in.
Adding the new CC_OP codes also allows removing the awkward interface
we used for the slb helpers.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Use a new "retxl" member of CPUS290XState to return the "eXtra Low" part
of a 128-bit value. That said, this will get used when two independent
values need returning (e.g. quotient+remainder) as well.
At the same time, shuffle the elements of CPUS390XState to get this new
space from existing padding in the structure.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Make the user path more like the system path. Prepare for more kinds
of runtime exceptions. Rename ILC to ILEN to make it clear that we
want to pass around a full instruction length, rather than a "code"
that happens to be stored one bit left in a larger field.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Lots of duplicated code replaced with a couple of tables. We no longer
attempt to manually invert the logic operation: the comments now match
the code. In the fully general test, constant propagate (1 << (3 - cc))
into (8 >> cc).
The new function will be usable by non-branch insns as well.
Signed-off-by: Richard Henderson <rth@twiddle.net>
We were treating psw.mask as the 32-bit quantity it is in ESA mode.
In particular, the CC field was at the wrong place.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Yes, we're about to rewrite all of this, but having this unconditional
jump recompute cc_op is a large source of "false diff errors" when
trying to examine before and after dumps.
Signed-off-by: Richard Henderson <rth@twiddle.net>
DISAS_EXCP is exit via exception; we wanted DISAS_JUMP.
This matters when we start cleaning up the TB exit paths.
Signed-off-by: Richard Henderson <rth@twiddle.net>
At the same time, tidy other usages of tcg_gen_deposit_i64.
In some cases we can "type cast" rather than extend, and in
others we can allow tcg_gen_deposit_i64 itself to optimize
the HOST_LONG_BITS==32 case.
Signed-off-by: Richard Henderson <rth@twiddle.net>
The real gdb protocol doesn't split out pc or cc as real registers.
Those are pseudos that are extracted as needed from the PSW. Don't
modify env->cc_op during read -- that way lies heisenbugs.
Fill in the XXX for the fp registers.
Remove duplicated defines in cpu.h.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Refactor common code around calls to cpu_restore_state().
tb_find_pc() has now no external users, make it static.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Pass around CPUArchState instead of using global cpu_single_env.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Acked-by: Richard Henderson <rth@twiddle.net>
Acked-by: Aurelien Jarno <aurelien@aurel32.net>
Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn>
For target-mips also change the return type to bool.
Make include paths for cpu-qom.h consistent for alpha and unicore32.
Signed-off-by: Andreas Färber <afaerber@suse.de>
[AF: Updated new target-openrisc function accordingly]
Acked-by: Richard Henderson <rth@twiddle.net> (for alpha)
This adds a more generic infrastructure for handling Service-Call
requests on s390. Currently we only support a small subset of Read
SCP Info directly in target-s390x. This patch provides the base
infrastructure for supporting more commands and moves Read SCP
Info.
In the future we could add additional commands for hotplug, call
home and event handling.
Signed-off-by: Heinz Graalfs <graalfs@linux.vnet.ibm.com>
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
Signed-off-by: Jens Freimann <jfrei@linux.vnet.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Newer kernels provide the guest registers in kvm_run. Lets use
those if available (i.e. the capability is set). This avoids
ioctls on cpu_synchronize_state making intercepts faster.
In addition, we have now the prefix register, the access registers
the control registers up to date. This helps in certain cases,
e.g. for resolving kernel module addresses with gdb on a guest.
On return, we update the registers according to the level statement,
i.e. we put all registers for KVM_PUT_FULL_STATE and _RESET_STATE.
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
Signed-off-by: Jens Freimann <jfrei@linux.vnet.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Rename helper flags to the new ones. This is purely a mechanical change,
it's possible to use better flags by looking at the helpers.
Cc: Alexander Graf <agraf@suse.de>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
target_phys_addr_t is unwieldly, violates the C standard (_t suffixes are
reserved) and its purpose doesn't match the name (most target_phys_addr_t
addresses are not target specific). Replace it with a finger-friendly,
standards conformant hwaddr.
Outstanding patchsets can be fixed up with the command
git rebase -i --exec 'find -name "*.[ch]"
| xargs s/target_phys_addr_t/hwaddr/g' origin
Signed-off-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
The blank lines inside the single dump make it difficult for the
eye to pick out the block. Worse, with interior newlines, but
no blank line following, the PSW line appears to belong to the
next dump block.
Reviewed-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This is already handled generically in cpu_exec.
Reviewed-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Three places in the interrupt code did we not honor the mask.
Reviewed-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Add an explicit CPUState parameter instead of relying on AREG0.
Remove temporary wrappers and switch to AREG0 free mode.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
[agraf: fix conflicts]
Signed-off-by: Alexander Graf <agraf@suse.de>
Make misc helpers take a parameter for CPUState instead
of relying on global env.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
[agraf: fix conflict]
Signed-off-by: Alexander Graf <agraf@suse.de>
Make condition code helpers take a parameter for CPUState instead
of relying on global env.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
