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target-s390: Convert LOAD ZERO

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Signed-off-by: Richard Henderson <rth@twiddle.net>
This commit is contained in:
Richard Henderson 2012-09-05 10:14:24 -07:00
parent 16d7b2a43b
commit 24db8412ec
4 changed files with 18 additions and 40 deletions
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22
target-s390x/fpu_helper.c
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@ -494,28 +494,6 @@ uint32_t HELPER(cfxbr)(CPUS390XState *env, uint32_t r1, uint32_t f2,
return set_cc_nz_f128(v2.q);
}
/* load 32-bit FP zero */
void HELPER(lzer)(CPUS390XState *env, uint32_t f1)
{
env->fregs[f1].l.upper = float32_zero;
}
/* load 64-bit FP zero */
void HELPER(lzdr)(CPUS390XState *env, uint32_t f1)
{
env->fregs[f1].d = float64_zero;
}
/* load 128-bit FP zero */
void HELPER(lzxr)(CPUS390XState *env, uint32_t f1)
{
CPU_QuadU x;
x.q = float64_to_float128(float64_zero, &env->fpu_status);
env->fregs[f1].ll = x.ll.upper;
env->fregs[f1 + 1].ll = x.ll.lower;
}
/* 32-bit FP multiply and add */
uint64_t HELPER(maeb)(CPUS390XState *env, uint64_t f1,
uint64_t f2, uint64_t f3)

3
target-s390x/helper.h
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@ -62,9 +62,6 @@ DEF_HELPER_FLAGS_5(cxb, TCG_CALL_NO_WG_SE, i32, env, i64, i64, i64, i64)
DEF_HELPER_4(cgebr, i32, env, i32, i32, i32)
DEF_HELPER_4(cgdbr, i32, env, i32, i32, i32)
DEF_HELPER_4(cgxbr, i32, env, i32, i32, i32)
DEF_HELPER_2(lzer, void, env, i32)
DEF_HELPER_2(lzdr, void, env, i32)
DEF_HELPER_2(lzxr, void, env, i32)
DEF_HELPER_4(cfebr, i32, env, i32, i32, i32)
DEF_HELPER_4(cfdbr, i32, env, i32, i32, i32)
DEF_HELPER_4(cfxbr, i32, env, i32, i32, i32)

4
target-s390x/insn-data.def
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@ -329,6 +329,10 @@
C(0xe31f, LRVH, RXY_a, Z, 0, m2_16u, new, r1_16, rev16, 0)
C(0xe31e, LRV, RXY_a, Z, 0, m2_32u, new, r1_32, rev32, 0)
C(0xe30f, LRVG, RXY_a, Z, 0, m2_64, r1, 0, rev64, 0)
/* LOAD ZERO */
C(0xb374, LZER, RRE, Z, 0, 0, 0, e1, zero, 0)
C(0xb375, LZDR, RRE, Z, 0, 0, 0, f1, zero, 0)
C(0xb376, LZXR, RRE, Z, 0, 0, 0, x1, zero2, 0)
/* LOAD LENGTHENED */
C(0xb304, LDEBR, RRE, Z, 0, e2, f1, 0, ldeb, 0)

29
target-s390x/translate.c
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@ -1385,21 +1385,6 @@ static void disas_b3(CPUS390XState *env, DisasContext *s, int op, int m3,
tcg_temp_free_i32(tmp32_2);
switch (op) {
case 0x74: /* LZER R1 [RRE] */
tmp32_1 = tcg_const_i32(r1);
gen_helper_lzer(cpu_env, tmp32_1);
tcg_temp_free_i32(tmp32_1);
break;
case 0x75: /* LZDR R1 [RRE] */
tmp32_1 = tcg_const_i32(r1);
gen_helper_lzdr(cpu_env, tmp32_1);
tcg_temp_free_i32(tmp32_1);
break;
case 0x76: /* LZXR R1 [RRE] */
tmp32_1 = tcg_const_i32(r1);
gen_helper_lzxr(cpu_env, tmp32_1);
tcg_temp_free_i32(tmp32_1);
break;
case 0x84: /* SFPC R1 [RRE] */
tmp32_1 = load_reg32(r1);
tcg_gen_st_i32(tmp32_1, cpu_env, offsetof(CPUS390XState, fpc));
@ -3310,6 +3295,20 @@ static ExitStatus op_xori(DisasContext *s, DisasOps *o)
return NO_EXIT;
}
static ExitStatus op_zero(DisasContext *s, DisasOps *o)
{
o->out = tcg_const_i64(0);
return NO_EXIT;
}
static ExitStatus op_zero2(DisasContext *s, DisasOps *o)
{
o->out = tcg_const_i64(0);
o->out2 = o->out;
o->g_out2 = true;
return NO_EXIT;
}
/* ====================================================================== */
/* The "Cc OUTput" generators. Given the generated output (and in some cases
the original inputs), update the various cc data structures in order to