target-s390: Add format based disassassmbly infrastructure

Signed-off-by: Richard Henderson <rth@twiddle.net>
This commit is contained in:
Richard Henderson 2012-08-15 17:16:22 -07:00
parent 51855ecf1a
commit ad044d09de
3 changed files with 858 additions and 364 deletions

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/* ADD */
C(0x1a00, AR, RR_a, Z, r1, r2, new, r1_32, add, adds32)
C(0xb9f8, ARK, RRF_a, DO, r2, r3, new, r1_32, add, adds32)
C(0x5a00, A, RX_a, Z, r1, m2_32s, new, r1_32, add, adds32)
C(0xe35a, AY, RXY_a, LD, r1, m2_32s, new, r1_32, add, adds32)
C(0xb908, AGR, RRE, Z, r1, r2, r1, 0, add, adds64)
C(0xb918, AGFR, RRE, Z, r1, r2_32s, r1, 0, add, adds64)
C(0xb9e8, AGRK, RRF_a, DO, r2, r3, r1, 0, add, adds64)
C(0xe308, AG, RXY_a, Z, r1, m2_64, r1, 0, add, adds64)
C(0xe318, AGF, RXY_a, Z, r1, m2_32s, r1, 0, add, adds64)
/* ADD IMMEDIATE */
C(0xc209, AFI, RIL_a, EI, r1, i2, new, r1_32, add, adds32)
C(0xeb6a, ASI, SIY, GIE, m1_32s, i2, new, m1_32, add, adds32)
C(0xecd8, AHIK, RIE_d, DO, r3, i2, new, r1_32, add, adds32)
C(0xc208, AGFI, RIL_a, EI, r1, i2, r1, 0, add, adds64)
C(0xeb7a, AGSI, SIY, GIE, m1_64, i2, new, m1_64, add, adds64)
C(0xecd9, AGHIK, RIE_d, DO, r3, i2, r1, 0, add, adds64)
/* ADD LOGICAL */
C(0x1e00, ALR, RR_a, Z, r1, r2, new, r1_32, add, addu32)
C(0xb9fa, ALRK, RRF_a, DO, r2, r3, new, r1_32, add, addu32)
C(0x5e00, AL, RX_a, Z, r1, m2_32u, new, r1_32, add, addu32)
C(0xe35e, ALY, RXY_a, LD, r1, m2_32u, new, r1_32, add, addu32)
C(0xb90a, ALGR, RRE, Z, r1, r2, r1, 0, add, addu64)
C(0xb91a, ALGFR, RRE, Z, r1, r2_32u, r1, 0, add, addu64)
C(0xb9ea, ALGRK, RRF_a, DO, r2, r3, r1, 0, add, addu64)
C(0xe30a, ALG, RXY_a, Z, r1, m2_64, r1, 0, add, addu64)
C(0xe31a, ALGF, RXY_a, Z, r1, m2_32u, r1, 0, add, addu64)
/* ADD LOGICAL IMMEDIATE */
C(0xc20b, ALFI, RIL_a, EI, r1, i2_32u, new, r1_32, add, addu32)
C(0xc20a, ALGFI, RIL_a, EI, r1, i2_32u, r1, 0, add, addu64)
/* SUBTRACT */
C(0x1b00, SR, RR_a, Z, r1, r2, new, r1_32, sub, subs32)
C(0xb9f9, SRK, RRF_a, DO, r2, r3, new, r1_32, sub, subs32)
C(0x5b00, S, RX_a, Z, r1, m2_32s, new, r1_32, sub, subs32)
C(0xe35b, SY, RXY_a, LD, r1, m2_32s, new, r1_32, sub, subs32)
C(0xb909, SGR, RRE, Z, r1, r2, r1, 0, sub, subs64)
C(0xb919, SGFR, RRE, Z, r1, r2_32s, r1, 0, sub, subs64)
C(0xb9e9, SGRK, RRF_a, DO, r2, r3, r1, 0, sub, subs64)
C(0xe309, SG, RXY_a, Z, r1, m2_64, r1, 0, sub, subs64)
C(0xe319, SGF, RXY_a, Z, r1, m2_32s, r1, 0, sub, subs64)
/* SUBTRACT LOGICAL */
C(0x1f00, SLR, RR_a, Z, r1, r2, new, r1_32, sub, subu32)
C(0xb9fb, SLRK, RRF_a, DO, r2, r3, new, r1_32, sub, subu32)
C(0x5f00, SL, RX_a, Z, r1, m2_32u, new, r1_32, sub, subu32)
C(0xe35f, SLY, RXY_a, LD, r1, m2_32u, new, r1_32, sub, subu32)
C(0xb90b, SLGR, RRE, Z, r1, r2, r1, 0, sub, subu64)
C(0xb91b, SLGFR, RRE, Z, r1, r2_32u, r1, 0, sub, subu64)
C(0xb9eb, SLGRK, RRF_a, DO, r2, r3, r1, 0, sub, subu64)
C(0xe30b, SLG, RXY_a, Z, r1, m2_64, r1, 0, sub, subu64)
C(0xe31b, SLGF, RXY_a, Z, r1, m2_32u, r1, 0, sub, subu64)
/* SUBTRACT LOGICAL IMMEDIATE */
C(0xc205, SLFI, RIL_a, EI, r1, i2_32u, new, r1_32, sub, subu32)
C(0xc204, SLGFI, RIL_a, EI, r1, i2_32u, r1, 0, sub, subu64)

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/* Description of s390 insn formats. */
/* NAME F1, F2... */
F0(E)
F1(I, I(1, 8, 8))
F2(RI_a, R(1, 8), I(2,16,16))
F2(RI_b, R(1, 8), I(2,16,16))
F2(RI_c, M(1, 8), I(2,16,16))
F3(RIE_a, R(1, 8), I(2,16,16), M(3,32))
F4(RIE_b, R(1, 8), R(2,12), M(3,32), I(4,16,16))
F4(RIE_c, R(1, 8), I(2,32, 8), M(3,12), I(4,16,16))
F3(RIE_d, R(1, 8), I(2,16,16), R(3,12))
F3(RIE_e, R(1, 8), I(2,16,16), R(3,12))
F5(RIE_f, R(1, 8), R(2,12), I(3,16,8), I(4,24,8), I(5,32,8))
F2(RIL_a, R(1, 8), I(2,16,32))
F2(RIL_b, R(1, 8), I(2,16,32))
F2(RIL_c, M(1, 8), I(2,16,32))
F4(RIS, R(1, 8), I(2,32, 8), M(3,12), BD(4,16,20))
/* ??? The PoO does not call out subtypes _a and _b for RR, as it does
for e.g. RX. Our checking requires this for e.g. BCR. */
F2(RR_a, R(1, 8), R(2,12))
F2(RR_b, M(1, 8), R(2,12))
F2(RRE, R(1,24), R(2,28))
F3(RRD, R(1,16), R(2,28), R(3,24))
F4(RRF_a, R(1,24), R(2,28), R(3,16), M(4,20))
F4(RRF_b, R(1,24), R(2,28), R(3,16), M(4,20))
F4(RRF_c, R(1,24), R(2,28), M(3,16), M(4,20))
F4(RRF_d, R(1,24), R(2,28), M(3,16), M(4,20))
F4(RRF_e, R(1,24), R(2,28), M(3,16), M(4,20))
F4(RRS, R(1, 8), R(2,12), M(3,32), BD(4,16,20))
F3(RS_a, R(1, 8), BD(2,16,20), R(3,12))
F3(RS_b, R(1, 8), BD(2,16,20), M(3,12))
F3(RSI, R(1, 8), I(2,16,16), R(3,12))
F2(RSL, L(1, 8, 4), BD(1,16,20))
F3(RSY_a, R(1, 8), BDL(2), R(3,12))
F3(RSY_b, R(1, 8), BDL(2), M(3,12))
F2(RX_a, R(1, 8), BXD(2))
F2(RX_b, M(1, 8), BXD(2))
F2(RXE, R(1, 8), BXD(2))
F3(RXF, R(1,32), BXD(2), R(3, 8))
F2(RXY_a, R(1, 8), BXDL(2))
F2(RXY_b, M(1, 8), BXDL(2))
F1(S, BD(2,16,20))
F2(SI, BD(1,16,20), I(2,8,8))
F2(SIL, BD(1,16,20), I(2,32,16))
F2(SIY, BDL(1), I(2, 8, 8))
F3(SS_a, L(1, 8, 8), BD(1,16,20), BD(2,32,36))
F4(SS_b, L(1, 8, 4), BD(1,16,20), L(2,12,4), BD(2,32,36))
F4(SS_c, L(1, 8, 4), BD(1,16,20), BD(2,32,36), I(3,12, 4))
/* ??? Odd man out. The L1 field here is really a register, but the
easy way to compress the fields has R1 and B1 overlap. */
F4(SS_d, L(1, 8, 4), BD(1,16,20), BD(2,32,36), R(3,12))
F4(SS_e, R(1, 8), BD(2,16,20), R(3,12), BD(4,32,36))
F3(SS_f, BD(1,16,20), L(2,8,8), BD(2,32,36))
F2(SSE, BD(1,16,20), BD(2,32,36))
F3(SSF, BD(1,16,20), BD(2,32,36), R(3,8))

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