Commit Graph

6524 Commits

Author SHA1 Message Date
Stanislav Shwartsman
4f78ff2153 Code cleanup 2007-12-16 21:21:29 +00:00
Stanislav Shwartsman
6f96b119e1 Some compile time checks for configure SSE4A and SSE5A
I don't plan configure support for them now, because the instruction actually still not implemented
2007-12-16 21:06:44 +00:00
Stanislav Shwartsman
46366b5064 Speedup simulation by eliminating CPL==3 check from read/write_virtual* functions 2007-12-16 21:03:46 +00:00
Stanislav Shwartsman
de5838ce80 cleanups and fixes for Immediate_IbIb of SSE4A 2007-12-16 20:47:10 +00:00
Stanislav Shwartsman
8b5eaa5820 Make functions inline 2007-12-16 20:37:59 +00:00
Stanislav Shwartsman
99f4c633d5 Fixed typos in CHANGES 2007-12-16 20:37:25 +00:00
Stanislav Shwartsman
1e843cb462 Decode SSE4A
Rework immediate bytes decoding to make it faster
2007-12-15 17:42:24 +00:00
Stanislav Shwartsman
76882295f7 Small preparation for SSE4A and SSE5A implementation 2007-12-15 17:35:41 +00:00
Stanislav Shwartsman
3a6d714398 Split for JMP_Ew/Ed opcodes from Grp5 2007-12-14 23:15:52 +00:00
Stanislav Shwartsman
fd73390ca5 Split 64-bit CMOVcc opcode 2007-12-14 22:41:43 +00:00
Stanislav Shwartsman
903f6dea35 Split setCC functions - makes code faster and simpler 2007-12-14 21:29:36 +00:00
Stanislav Shwartsman
d9a59c7a1f Added ability to merge traces cross JCC branch instructions
Makes traces longer -> emulation faster in average
2007-12-14 20:41:09 +00:00
Stanislav Shwartsman
db69a25c36 Trace cache instrumentation methods
Next step will be tracing cross non-taken branches
2007-12-14 11:27:44 +00:00
Stanislav Shwartsman
48d815427c According to AMD docs INVLD/WBINVLD instructions not required to flush TLBs 2007-12-14 10:15:12 +00:00
Stanislav Shwartsman
c3e5c71000 post exceptions and print BX_ERROR messages in tasking.cc 2007-12-13 23:17:50 +00:00
Stanislav Shwartsman
d82209e28d A bit speedup 'continue' debugger command 2007-12-13 22:56:35 +00:00
Stanislav Shwartsman
f57e7c4a1f Some more Bit32u -> bx_phy_address changes in the code 2007-12-13 21:53:55 +00:00
Stanislav Shwartsman
85d10e4f72 Added MWAIT callback 2007-12-13 21:41:32 +00:00
Stanislav Shwartsman
f145f4c847 Unify BX_INSTR_MEM_READ and BX_INSTR_MEM_WRITE callbacks to single callback BX_INSTR_MEM_ACCESS
Enable the callback with guest-to-host TLB enabled
Update instrumentation docs
2007-12-13 21:30:05 +00:00
Stanislav Shwartsman
05c7a1e61b Fixed problem with trace cache enabled
String instructions might confise trace cache by finishing instruction execution method without actually completing an instruction (and advancing eip)
2007-12-13 18:42:31 +00:00
Stanislav Shwartsman
05a5923971 Merged Bochs instrumentation patch by Lluis Vilanova 2007-12-13 17:16:21 +00:00
Stanislav Shwartsman
da19b9447a All Jq instructions in 64-bit mode have fixed 64-bit osize 2007-12-10 23:04:18 +00:00
Stanislav Shwartsman
82b4d95077 Fixed typo 2007-12-10 21:01:25 +00:00
Stanislav Shwartsman
e15f7445f8 Faster memory access for 4G limit cases
A bit slower for <4G but usually it is 4G
2007-12-10 19:08:13 +00:00
Stanislav Shwartsman
92f7a3a805 Fixed several compilation errors under OSX 2007-12-10 19:05:07 +00:00
Stanislav Shwartsman
83529c1dd8 Update CHANGES 2007-12-09 18:55:03 +00:00
Stanislav Shwartsman
729bdb1556 Update instrumentation notes 2007-12-09 18:47:54 +00:00
Stanislav Shwartsman
f3de7de659 Remove already merged patch 2007-12-09 18:38:54 +00:00
Stanislav Shwartsman
adda3befd3 Trace cache optimization merged 2007-12-09 18:36:05 +00:00
Stanislav Shwartsman
ee465a7714 misaligned SSE support works only for loads 2007-12-09 17:40:23 +00:00
Volker Ruppert
688cb87e98 - skip SMM init if already done at first boot time (fixes reboot failure) 2007-12-09 15:38:41 +00:00
Stanislav Shwartsman
29267577f0 Fixed HLT problem in SMP binary which runs with single processor only 2007-12-08 09:26:13 +00:00
Stanislav Shwartsman
976af56f6d Split bit.cc to 4 files - new files bit16/32/64.cc 2007-12-07 10:59:18 +00:00
Stanislav Shwartsman
4c16dd71a8 Fixed compilation error in SMP mode 2007-12-07 09:38:42 +00:00
Stanislav Shwartsman
a8169d1cc1 Bugfix from developres mailing list 2007-12-06 22:21:40 +00:00
Stanislav Shwartsman
6fcc7d34ab Next step in lazy flags optimization by Darek MihockA -
get rid of shifts from lazy flags code
2007-12-06 20:39:11 +00:00
Stanislav Shwartsman
d739cca282 small cleanup 2007-12-06 18:35:33 +00:00
Stanislav Shwartsman
d54d537f81 One more step for lazy flags optimization 2007-12-06 16:57:59 +00:00
Stanislav Shwartsman
216f4f2f4f Fixed my BIOS optimization 2007-12-06 16:56:32 +00:00
Stanislav Shwartsman
a835e3f8ff get_FLAG_Lazy not always returns 0/1 2007-12-05 06:27:01 +00:00
Stanislav Shwartsman
295a36ef58 2nd step of lazy flags optimization 2007-12-05 06:17:09 +00:00
Stanislav Shwartsman
88899cf617 Changes for lazy flags handling -> 1st stap in transition to new lazy flags handling by Darek Mihocka (www.emulators.com) 2007-12-04 19:27:23 +00:00
Stanislav Shwartsman
40fc0a3e42 Reduce ICACHE back to 32K entries - reduce ICACHE size from 4M to 2M
Not everybody already have C2D CPU with 4M L2 cache on die ...
2007-12-04 17:34:20 +00:00
Stanislav Shwartsman
91e0db63c4 no need to invalidate prefetch queue for RDMSR/WRMSR 2007-12-03 21:43:14 +00:00
Stanislav Shwartsman
9e6d1cae33 Replace backslashes in WIN32 dialogs
Fix for bug report @SF 1843250  Using forward slashes gives invalid filename
2007-12-03 20:50:24 +00:00
Stanislav Shwartsman
c58e95f611 Make hw breakpoint match check a function - normally it should be called from read/write_virtual as well 2007-12-03 20:49:24 +00:00
Stanislav Shwartsman
dbfa7a51e9 Do not affect CPU state if any exception occured - in this case do not write to MEM and flags 2007-12-03 20:48:02 +00:00
Stanislav Shwartsman
17af54cbbb Fixed warning 2007-12-03 20:38:55 +00:00
Volker Ruppert
147633c460 - inline asm optimizations by Stanislav
- initialize PAM register for ROM-to-RAM copy even after reboot
2007-12-01 19:27:28 +00:00
Stanislav Shwartsman
1bcf42baec oops, fixed incorrect checkin 2007-12-01 16:59:36 +00:00