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1127 Commits

Author SHA1 Message Date
Stanislav Shwartsman
0e4524f38f Implemented CMPccXADD instructions 2022-10-08 20:04:22 +03:00
Stanislav Shwartsman
4aed72e0ef fix issue with AVX IFMA when EVEX is not compiled in 2022-10-02 23:07:05 +03:00
Stanislav Shwartsman
a56144833a add support for AVX encoded VNNI INT8 extensions 2022-10-02 23:00:46 +03:00
Stanislav Shwartsman
1e4f1624c8 remove trailing whitespace from source files 2022-08-23 21:46:04 +03:00
Satoshi Tanda
30ef7f4842
Fix dbg_xlate_linear2phy for NPT (#30) 2022-08-22 07:20:47 +03:00
Stanislav Shwartsman
c9d8413422 allow TLB caching of SPP paging writes 
it is possible that SPP-protected subpage block is allowing write but all others are not.
the TLB entry cannot be cached as writeOK based on SPP subblock check
 2022-08-14 21:09:18 +03:00
Stanislav Shwartsman
4d227d15fb remove instrument.h from bochs.h so it won't be included everywhere 
include it only where required
move PHY_ADDRESS reserved bits consts to cpu.h
 2022-07-30 22:35:43 +03:00
Stanislav Shwartsman
3f65841714
use boolean constants true/false instead of 0/1 (#26) 
* use boolean constants true/false instead of 0/1

* fix code comment

Co-authored-by: Stanislav Shwartsman <sshwarts@users.sourceforge.net>
 2022-07-30 18:38:22 +03:00
Stanislav Shwartsman
f44f4ae753
MBE (Mode Based Execution Control) emulation (#22) 
* MBE (Mode Based Execution Control) emulation
 2022-07-30 15:26:47 +03:00
Stanislav Shwartsman
fb09790846 dos2unix to all files 2022-07-30 14:31:16 +03:00
Stanislav Shwartsman
0cba8b66c9 more robust handling of SVM VMCB host ptr 2021-07-23 09:30:17 +00:00
Stanislav Shwartsman
c87ce2d11a fixed some MSVC wannings in CPU code 2021-02-08 13:06:44 +00:00
Stanislav Shwartsman
1765a06d01 move debug.h from bochs.h and include it only where required 2021-01-31 15:22:58 +00:00
Stanislav Shwartsman
c878933057 remove pc_system.h from bochs.h and include it only where required 
next step: same for gui.h
 2021-01-30 18:29:28 +00:00
Stanislav Shwartsman
1bf18b8aae ! CPUID: Added TigerLake CPU definition (features CET and CLWB support) 
- CPU code refactor, remove uses of bx_bool datatype and use C++ classic bool instead.
  This enable better compiler optimizations and reduce binary size
 2021-01-30 08:35:35 +00:00
Stanislav Shwartsman
bea432dacb fixed compilation with no debugger configured in 2021-01-02 14:04:35 +00:00
Stanislav Shwartsman
41ea50ba22 complete transition to new disasm, remove old disasm from source code 2021-01-02 13:43:10 +00:00
Stanislav Shwartsman
c6050a99d1 implemented AVX encoded VNNI instructions published in recent SDM - not tested yet 2020-10-03 09:23:28 +00:00
Stanislav Shwartsman
4023b640d6 Protection Keys: Implemented Supervisor-Mode Protection Keys (PKS) 2020-05-29 12:35:30 +00:00
Stanislav Shwartsman
b891789c3d implemented (experimental) TSC Adjust MSR 2020-05-21 19:58:16 +00:00
Stanislav Shwartsman
b69f2b052a extract calculation of MSR_IA32_XSS supported bits to a function 2020-01-03 19:33:16 +00:00
Stanislav Shwartsman
016aa349e5 handle supervisor-shadow-stack protection feature in the EPT 2019-12-29 20:40:18 +00:00
Stanislav Shwartsman
9458e25486 reverting commit 13737 and doing correct fix 2019-12-28 13:11:13 +00:00
Stanislav Shwartsman
5d7c6d46b0 fixed compilation after prev commit 2019-12-28 13:02:02 +00:00
Stanislav Shwartsman
1a0237e9af make order in AVX512 broadcast handlers, extract them into separate file 2019-12-21 20:07:03 +00:00
Stanislav Shwartsman
dd1ab303df rename function to correct English 2019-12-21 15:54:52 +00:00
Stanislav Shwartsman
723554d535 AVX512: Allow masked fault suppression for many AVX512 instructions - not all cases reviewed yet, more to come 2019-12-21 15:47:29 +00:00
Stanislav Shwartsman
f90e5f4f44 Add initial implementation of the CET (Control Flow Enforcement Technology) emulation according to SDM071 
Only missing items (to be added soon):
  - Supervisor Shadow Stack EPT Control is not implemented yet
  - SMM placing for SSP
Currently have to be added manually to some CPUID model, for example to ICL-U
To enable configure with --enable-cet
 2019-12-20 07:42:07 +00:00
Stanislav Shwartsman
1b9e0081b4 fixed bugs in recently implemented load methods with fault suppression support 2019-12-19 21:36:13 +00:00
Stanislav Shwartsman
59cad2e156 AVX512: Allow masked fault suppression for many AVX512 instructions - not all cases reviewed yet, more to come 2019-12-19 21:12:23 +00:00
Stanislav Shwartsman
2df60c3b3f AVX512: Allow masked fault suppression for many AVX512 instructions - not all cases reviewed yet, more to come 2019-12-19 20:08:49 +00:00
Stanislav Shwartsman
eca847c8b3 fixed compilation error 2019-12-16 19:47:41 +00:00
Stanislav Shwartsman
895c4b75df rewritten xsave/xrestore implementation in generic way to simplify adding new xsave/xrestore extensions 2019-12-16 16:14:51 +00:00
Stanislav Shwartsman
bcfcaf3958 unify branch_far32 and branhc_far64 methods 2019-12-14 17:20:35 +00:00
Stanislav Shwartsman
e35fcd1782 clarify err message 2019-12-10 20:38:45 +00:00
Stanislav Shwartsman
4b66fecaad split Bochs CPU TLB to DTLB and ITLB to avoid aliasing conflicts between them. ~5% speedup measured 2019-12-09 18:37:02 +00:00
Stanislav Shwartsman
8befc3bf82 make separate class for TLB to be used in CPU class. preparation to DTLB and ITLB split of TLB structure 2019-12-09 16:49:51 +00:00
Stanislav Shwartsman
44b3ebeca2 remove BX_TRUE/BX_FALSE macros, use stdc++ true/false instead 2019-12-09 16:44:36 +00:00
Stanislav Shwartsman
12d228abde split vmx initialization to multiple methods for better code readability, improve VMX error messages 2019-12-08 20:46:51 +00:00
Stanislav Shwartsman
06d826755b increase max configurable msrs to 0x1000 again 2019-12-06 12:31:51 +00:00
Stanislav Shwartsman
0c75e0beaf extract xcr0_support bits calculation to a function 2019-12-06 09:23:28 +00:00
Stanislav Shwartsman
4e9e3f85de simplify code by merging two opcodes with similar behavior 2019-11-27 15:31:32 +00:00
Stanislav Shwartsman
d766cc8112 implemented SCA (Side-Channel-Attack) Prevention reporting and corresponding MSR registers, enabled for Icelake-U CPU definition 2019-10-26 20:09:30 +00:00
Stanislav Shwartsman
bb5ccc97c1 remove unused function parameter 2019-10-16 19:53:04 +00:00
Stanislav Shwartsman
9c61e9e9f5 remove unused function parameter 2019-10-16 19:48:21 +00:00
Stanislav Shwartsman
10c23b5d39 implement fasstring for 64-bit mode as well 2019-10-14 19:50:47 +00:00
Stanislav Shwartsman
ee3f1b91a3 allow fast string only for forward strings and simplify the code 2019-10-14 14:45:01 +00:00
Stanislav Shwartsman
f0245b5f2b introduce special handlers for zero-idiom instructions - ~1% speedup to simulation. infra for fast string emulation in 64-bit mode 2019-10-14 06:40:19 +00:00
Stanislav Shwartsman
2ae332cce8 patch by Luigu.B - significantly speedup multi-threaded guest simulation 2019-08-09 19:57:13 +00:00
Stanislav Shwartsman
4d10852c04 impemented recently published VP2INTERSECTD/Q instructions 2019-05-25 19:07:09 +00:00