Stanislav Shwartsman
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62005d4fd9
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Minimize diff with VMX support branch
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2009-01-23 09:26:24 +00:00 |
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Stanislav Shwartsman
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9929e6ed78
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- updated FSF address
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2009-01-16 18:18:59 +00:00 |
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Stanislav Shwartsman
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bc381e51da
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very small cleanups
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2008-09-19 19:18:57 +00:00 |
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Stanislav Shwartsman
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c1306f7d75
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small non-significant speedups
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2008-09-06 21:10:40 +00:00 |
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Stanislav Shwartsman
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b96f78dc0a
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Some kind of big change in fetchdecode tables invented in order to compress the tables for better host data cache utilization
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2008-08-29 19:23:03 +00:00 |
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Stanislav Shwartsman
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a5a01c4b42
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optimize LEAVE operation
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2008-08-27 21:57:40 +00:00 |
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Stanislav Shwartsman
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70c7c5ceca
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Use LOAD_Eb approach to remove duplicated GbEb methods
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2008-08-11 20:34:05 +00:00 |
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Stanislav Shwartsman
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a8adb36dc2
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Implemented MOVBE Intel Atom(R) instruction
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2008-08-11 18:53:24 +00:00 |
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Stanislav Shwartsman
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b61017e5b6
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Split more opcodes using new LOAD technique
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2008-08-10 21:16:12 +00:00 |
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Stanislav Shwartsman
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1da5943f1a
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More use of LOAD_Ex method
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2008-08-10 19:34:28 +00:00 |
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Stanislav Shwartsman
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0d90ab0478
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Completely new way to handle LD+OP cases - allows to significantly reduce number of BX_CPU_C methods
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2008-08-09 21:05:07 +00:00 |
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Stanislav Shwartsman
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3f5efb6475
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Remove more duplicated methods
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2008-07-13 10:06:07 +00:00 |
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Stanislav Shwartsman
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0127415ba6
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Clear some duplicated arithmetic opcodes - difference only in operands order
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2008-07-13 09:59:59 +00:00 |
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Stanislav Shwartsman
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678ac970aa
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Reorganize ctrl_xfer8.cc code, allows to inline branch32 method
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2008-06-22 03:45:55 +00:00 |
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Stanislav Shwartsman
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46e9d09cbc
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Typo again :)
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2008-06-04 16:31:03 +00:00 |
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Stanislav Shwartsman
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4c93fd4a21
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Fixed typos (patch from @SF)
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2008-06-04 16:27:42 +00:00 |
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Stanislav Shwartsman
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7494b8823b
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- Support of AES CPU extensions, to enable configure with
--enable-aes option
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2008-05-30 20:35:08 +00:00 |
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Stanislav Shwartsman
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ed4be45a8b
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Split shift/rotate opcodes in 32-bit mode and 64-bit mode
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2008-05-02 22:47:07 +00:00 |
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Stanislav Shwartsman
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06c6ac0060
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- Fixed effective address wrap in 64-bit mode with 32-bit address size
- Fixed SMSW instruction in 32-bit and 64-bit modes
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2008-04-28 18:18:08 +00:00 |
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Stanislav Shwartsman
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76a8812876
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correct some opcode aliases
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2008-04-12 10:08:43 +00:00 |
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Stanislav Shwartsman
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1bdddc1f78
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Split SHRD/SHLD instructions
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2008-04-05 19:08:01 +00:00 |
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Stanislav Shwartsman
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5826e2843a
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Inline pop/push functions
Store only single byte of opcode in b1() - speedup shift instructions
Code cleanups
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2008-04-05 17:51:55 +00:00 |
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Stanislav Shwartsman
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2aaafa76a2
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Reorganize fetchdecode tables with another level of redirection - a leap toward future improvements
Currently no speedup and no slowdown - about the same results on my Bochs benchmarking
A lot of code reorganization in fetchdecode
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2008-04-04 22:39:45 +00:00 |
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