Stanislav Shwartsman
6ef7675d03
added new file
2011-07-28 16:21:18 +00:00
Stanislav Shwartsman
6ad0f5ddb2
regenerate dep for CPU
2011-07-28 16:19:30 +00:00
Stanislav Shwartsman
78327d3e5e
First step toward completely configurable CPU.
...
Change CPUID to generic interface which could be chosen from .bochsrc.
Bochs CPU emulation will enable/disable features (like instruction sets) according to CPUID that is selected.
TODO: Add database of CPUID from real hardware CPUs
2011-07-28 16:17:42 +00:00
Stanislav Shwartsman
81f6a283e2
trim cpuid info from save/restore tree
2011-07-27 14:16:51 +00:00
Stanislav Shwartsman
f8e4e7f16b
clean up/fixed instrumentation examples + removed old 2-years old configure options check (deprecated)
2011-07-23 19:58:38 +00:00
Stanislav Shwartsman
d11114ac19
Patch for emulating target with larger memory than host has available by Gary Cameron.
...
The patch was posted in mailing list at Thu 6/16/2011.
Desription for CHANGES:
- Memory
- Added new configure option which enables RAM file backing for large guest
memory with a smaller amount host memory, without causing a panic when
host memory is exhausted (patch by Gary Cameron). To enable configure with
--enable-large-ramfile option.
2011-07-22 17:46:06 +00:00
Stanislav Shwartsman
1e2c7de064
register state for pause-loop exiting
2011-07-22 09:28:31 +00:00
Stanislav Shwartsman
9c3a4b8dab
impemented pause-loop exiting VMX2 control
2011-07-22 09:19:35 +00:00
Stanislav Shwartsman
d1780b66de
typofix
2011-07-21 21:34:56 +00:00
Stanislav Shwartsman
b4118fcbfe
correct natural width VMX field read/write len
2011-07-21 20:58:54 +00:00
Stanislav Shwartsman
a69eeb13f3
move cpuid defs to cpuid.h
2011-07-19 21:14:07 +00:00
Stanislav Shwartsman
cac3c836fa
fixed typo
2011-07-18 21:47:14 +00:00
Stanislav Shwartsman
cddd1e3758
MONITOR/MWAIT: Do monitor on cache line granularity only + bugfix with possible TLB caching of monitored line
2011-07-18 21:44:22 +00:00
Stanislav Shwartsman
f81e47cca2
it is better to handle A20 in paging already
2011-07-18 20:22:59 +00:00
Stanislav Shwartsman
6e993adec7
small cleanup
2011-07-17 19:28:27 +00:00
Stanislav Shwartsman
041605f718
fixed corner case issue with SMP
2011-07-11 17:29:54 +00:00
Stanislav Shwartsman
28a58f4ea5
fix rdtscp code
2011-07-09 22:28:08 +00:00
Stanislav Shwartsman
432bf97197
was playing with SMP and debugger
2011-07-09 22:17:16 +00:00
Stanislav Shwartsman
92c4bd6f2b
forgot to merge file
2011-07-08 14:07:45 +00:00
Stanislav Shwartsman
002c86660a
reword all the CPU code in preparation for future CPU speedup implementation.
...
Bochs emulation can be another 10-15% faster using technique described in paper
"Fast Microcode Interpretation with Transactional Commit/Abort"
http://amas-bt.cs.virginia.edu/2011proceedings/amasbt2011-p3.pdf
2011-07-06 20:01:18 +00:00
Stanislav Shwartsman
82a2ab6325
removed wrongly committed file
2011-07-03 16:05:41 +00:00
Stanislav Shwartsman
909e750549
Implemented VMX preemption timer VMEXIT control (patch by Jianan Hao)
2011-07-03 15:59:48 +00:00
Stanislav Shwartsman
2c168b2855
bugfix
2011-06-28 18:53:20 +00:00
Stanislav Shwartsman
90c4a74362
typo fix
2011-06-28 16:29:11 +00:00
Stanislav Shwartsman
08ba847ce4
fix bug inserted with prev commit + cleanup
2011-06-28 16:04:40 +00:00
Stanislav Shwartsman
f765b9fc58
cleanup
2011-06-27 19:48:13 +00:00
Stanislav Shwartsman
f7c6bd1134
clean code dupication
2011-06-27 19:27:49 +00:00
Stanislav Shwartsman
a1a140682c
cleanup
2011-06-26 20:22:04 +00:00
Stanislav Shwartsman
68f96846fe
no need to define 3b opcodes on < 80x686
2011-06-26 19:39:48 +00:00
Stanislav Shwartsman
87953711b1
cleanup in mmx code
2011-06-26 19:31:42 +00:00
Stanislav Shwartsman
2f582db722
compile less stuff for cpu-level=5
2011-06-26 19:15:30 +00:00
Stanislav Shwartsman
5ef9f8acf8
cleanup
2011-06-26 17:25:25 +00:00
Stanislav Shwartsman
beafa7c88b
improved x86 hw code bp handling
2011-06-24 13:38:34 +00:00
Stanislav Shwartsman
7e57d95364
Fix wrong address translation in debugger
2011-06-24 13:05:36 +00:00
Volker Ruppert
e4fe7f0c8f
- add some symbols required by MSVC for device plugins
2011-06-15 21:55:48 +00:00
Stanislav Shwartsman
31be835056
bugfix + rename function
2011-06-14 19:56:28 +00:00
Stanislav Shwartsman
31914e4a26
fixed compilation with avx off
2011-06-11 20:12:15 +00:00
Stanislav Shwartsman
778154b3b2
one more fix
2011-06-11 18:27:37 +00:00
Stanislav Shwartsman
ef38c9e235
fix decode for VCVTPH2PS
2011-06-11 18:26:05 +00:00
Stanislav Shwartsman
8399dee24c
implemented AVX float16 convert instructions
2011-06-11 13:12:32 +00:00
Stanislav Shwartsman
d7f19bcfd4
optimize sse DAZ feature + optimization for AVX OFF
2011-06-11 12:22:54 +00:00
Stanislav Shwartsman
3f075d1ddf
disasm for invpcid
2011-06-10 12:49:52 +00:00
Stanislav Shwartsman
77e15511be
AVX2 and BMI instructions were published on http://software.intel.com/en-us/avx
2011-06-10 08:46:10 +00:00
Stanislav Shwartsman
acf2175d6d
paging small change
2011-06-03 20:50:55 +00:00
Stanislav Shwartsman
29e3f6e762
remove trace cache disabled mode from the code. next step going to be - introducing new optimization features based on trace cache
2011-06-01 20:34:04 +00:00
Stanislav Shwartsman
04e9254e2c
AMD released new Vol4: 128 and 256 bit vector instructions, dropped SSE4A
2011-05-30 20:15:50 +00:00
Stanislav Shwartsman
1ba77b9f10
fixed defined but not used warnings
2011-05-29 20:42:47 +00:00
Stanislav Shwartsman
0de8b08f24
fixed too few arguments for format warning
2011-05-29 20:09:31 +00:00
Stanislav Shwartsman
5748c6b9f5
first fix for SMEP
2011-05-29 18:08:37 +00:00
Stanislav Shwartsman
ee3f9e36cb
Implemented Supervisor Mode Execution Protection (SMEP)
2011-05-29 16:28:26 +00:00
